Wiring board and method of manufacturing the same
    3.
    发明授权
    Wiring board and method of manufacturing the same 失效
    接线板及其制造方法

    公开(公告)号:US07381902B2

    公开(公告)日:2008-06-03

    申请号:US10951620

    申请日:2004-09-29

    IPC分类号: H05K1/09

    摘要: A wiring board comprises a patterned wiring formed of electrically conductive resin composed primarily of silver and embedded into a substrate in a manner that a surface thereof is exposed above the substrate, and a covering conductor formed primarily of carbon covering the surface of the patterned wiring. The wiring board of this structure is superior in resistance to moisture absorption and water, prevents silver migration attributable to the moisture, and reduces contact resistance in the connection between a terminal portion of the wiring board and an external apparatus.

    摘要翻译: 布线板包括由主要由银构成并以其表面暴露在基板上方的方式嵌入到基板中的导电树脂形成的图案布线,以及主要由覆盖图案化布线表面的碳形成的覆盖导体。 该结构的布线基板具有优异的耐吸湿性和防水性,防止由于水分引起的银迁移,并且降低了布线板的端子部分与外部设备之间的连接中的接触电阻。

    Multilayered circuit board forming method and multilayered circuit board
    5.
    发明授权
    Multilayered circuit board forming method and multilayered circuit board 失效
    多层电路板成型方法和多层电路板

    公开(公告)号:US06971167B2

    公开(公告)日:2005-12-06

    申请号:US10611868

    申请日:2003-07-03

    IPC分类号: H05K3/46 H05K3/00 H01K3/10

    摘要: A multilayered circuit board and a method of forming the multilayered circuit board are provided. In a first circuit forming process, a first circuit is formed on an insulating board with a conductor; in a circuit embedding process, the first circuit is embedded in the insulating board so as to have a predetermined surface flatness and a predetermined parallelism; in a masking process, a pilot hole for a via hole is masked at a part of a surface of the circuit; in an insulating layer forming process P5p, an insulating material is applied as a layer to the surface except that portion thereof covered by the mask; in an insulating material layer flattening process, the surface of the insulating material layer is flattened so as to have the predetermined surface flatness and the predetermined parallelism; and in a pilot hole forming process, the mask is removed.

    摘要翻译: 提供多层电路板和形成多层电路板的方法。 在第一电路形成工艺中,在具有导体的绝缘板上形成第一电路; 在电路嵌入处理中,第一电路被嵌入绝缘板中以具有预定的表面平坦度和预定的平行度; 在掩模处理中,用于通孔的导向孔在电路的表面的一部分被掩蔽; 在绝缘层形成工艺P 5 p中,除了被掩模覆盖的部分之外,绝缘材料作为层施加到表面; 在绝缘材料层平坦化处理中,绝缘材料层的表面被平坦化以具有预定的表面平坦度和预定的平行度; 并且在导向孔形成处理中,去除掩模。

    Circuit board fabrication method and circuit board
    6.
    发明授权
    Circuit board fabrication method and circuit board 失效
    电路板制造方法和电路板

    公开(公告)号:US07353600B2

    公开(公告)日:2008-04-08

    申请号:US10940933

    申请日:2004-09-15

    IPC分类号: H05K3/00 H05K3/12

    摘要: A circuit board fabrication method including: forming first conductive interconnection 2 onto insulator substrate 1; applying resin film 41, which is to be interlevel insulator layer 42 for electrically insulating first conductive interconnection 2 and second conductive interconnection 6, onto insulator substrate 1; either making pillar-like member 3 stand on a prescribed position on first conductive interconnection 2 before applying resin film 41, or press fitting pillar-like member 3 into resin film 41 so as to reach either a surface vicinity of first conductive interconnection 2 or a portion of first conductive interconnection 2 after applying resin film 41; hardening resin film 41 to form interlevel insulator layer 42; pulling out pillar-like member 3 to form opening 5 in interlevel insulator layer 42; and forming second conductive interconnection 6 onto interlevel insulator layer 42 to include opening 5.

    摘要翻译: 一种电路板制造方法,包括:在绝缘体基板1上形成第一导电布线2; 将用于将第一导电互连2和第二导电互连6电绝缘的层间绝缘体层42的树脂膜41施加到绝缘体基板1上; 在施加树脂膜41之前,使柱状构件3立在第一导电布线2的规定位置上,或者将柱状构件3压入树脂膜41中,以到达第一导电布线2的附近或第 在施加树脂膜41之后的第一导电互连2的部分; 硬化树脂膜41以形成层间绝缘体层42; 拉出柱状构件3以在层间绝缘体层42中形成开口5; 以及在层间绝缘体层42上形成第二导电布线6以包括开口5。

    Circuit board fabrication method and circuit board
    10.
    发明申请
    Circuit board fabrication method and circuit board 失效
    电路板制造方法和电路板

    公开(公告)号:US20050060886A1

    公开(公告)日:2005-03-24

    申请号:US10940933

    申请日:2004-09-15

    IPC分类号: H05K3/46 H05K3/00 G03C5/00

    摘要: A circuit board fabrication method comprising the steps of: forming first conductive interconnection 2 onto insulator substrate 1; applying resin film 41, which is to be interlevel insulator layer 42 for electrically insulating first conductive interconnection 2 and second conductive interconnection 6, onto insulator substrate 1; either making pillar-like member 3 stand on a prescribed position on first conductive interconnection 2 before applying resin film 41, or press fitting pillar-like member 3 into resin film 41 in such a manner as to reach either a surface vicinity of first conductive interconnection 2 or a portion of first conductive interconnection 2 after applying resin film 41; hardening resin film 41 to form interlevel insulator layer 42; pulling out pillar-like member 3 to form opening 5 in interlevel insulator layer 42; and (f) forming second conductive interconnection 6 onto interlevel insulator layer 42 in such a manner as to include opening 5.

    摘要翻译: 一种电路板制造方法,包括以下步骤:在绝缘体基板1上形成第一导电布线2; 将用于将第一导电互连2和第二导电互连6电绝缘的层间绝缘体层42的树脂膜41施加到绝缘体基板1上; 在施加树脂膜41之前,使柱状构件3在第一导电布线2上的规定位置上立起,或者将柱状构件3按压到树脂膜41中,使其到达第一导电互连 2或第一导电互连2的一部分; 硬化树脂膜41以形成层间绝缘体层42; 拉出柱状构件3以在层间绝缘体层42中形成开口5; 和(f)以包括开口5的方式在层间绝缘体层42上形成第二导电布线6。