Method for reducing the intrinsic stress of high density plasma films
    3.
    发明授权
    Method for reducing the intrinsic stress of high density plasma films 失效
    降低高密度等离子体膜的固有应力的方法

    公开(公告)号:US07294205B1

    公开(公告)日:2007-11-13

    申请号:US09362504

    申请日:1999-07-27

    Abstract: A layer of reduced stress is formed on a substrate using an HDP-CVD system by delaying or interrupting the application of capacitively coupled RF energy. The layer is formed by introducing a process gas into the HDP system chamber and forming a plasma from the process gas by the application of RF power to an inductive coil. After a selected period, a second layer of the film is deposited by maintaining the inductively-coupled plasma and biasing the plasma toward the substrate to enhance the sputtering effect of the plasma. In a preferred embodiment, the deposited film is a silicon oxide film, and biasing is performed by application of capacitively coupled RF power from RF generators to a ceiling plate electrode and wafer support electrode.

    Abstract translation: 通过延迟或中断电容耦合RF能量的应用,使用HDP-CVD系统在衬底上形成一层减小的应力。 通过将工艺气体引入HDP系统室并通过将RF功率施加到感应线圈从工艺气体形成等离子体而形成该层。 在选定的时间段之后,通过维持电感耦合等离子体并且将等离子体偏压到衬底来沉积膜的第二层,以增强等离子体的溅射效应。 在优选实施例中,沉积膜是氧化硅膜,并且通过将来自RF发生器的电容耦合的RF功率施加到顶板电极和晶片支撑电极来执行偏置。

    Method for reducing the intrinsic stress of high density plasma films
    6.
    发明授权
    Method for reducing the intrinsic stress of high density plasma films 失效
    降低高密度等离子体膜的固有应力的方法

    公开(公告)号:US5976993A

    公开(公告)日:1999-11-02

    申请号:US623445

    申请日:1996-03-28

    Abstract: A layer of reduced stress is formed on a substrate using an HDP-CVD system by delaying or interrupting the application of capacitively coupled RF energy. The layer is formed by introducing a process gas into the HDP system chamber and forming a plasma from the process gas by the application of RF power to an inductive coil. After a selected period, a second layer of the film is deposited by maintaining the inductively-coupled plasma and biasing the plasma toward the substrate to enhance the sputtering effect of the plasma. In a preferred embodiment, the deposited film is a silicon oxide film, and biasing is performed by application of capacitively coupled RF power from RF generators to a ceiling plate electrode and wafer support electrode.

    Abstract translation: 通过延迟或中断电容耦合RF能量的应用,使用HDP-CVD系统在衬底上形成一层减小的应力。 通过将工艺气体引入HDP系统室并通过将RF功率施加到感应线圈从工艺气体形成等离子体而形成该层。 在选定的时间段之后,通过维持电感耦合等离子体并且将等离子体偏压到衬底来沉积膜的第二层,以增强等离子体的溅射效应。 在优选实施例中,沉积膜是氧化硅膜,并且通过将来自RF发生器的电容耦合的RF功率施加到顶板电极和晶片支撑电极来执行偏置。

    High deposition rate recipe for low dielectric constant films
    8.
    发明授权
    High deposition rate recipe for low dielectric constant films 失效
    低介电常数薄膜的高沉积速率配方

    公开(公告)号:US6136685A

    公开(公告)日:2000-10-24

    申请号:US868595

    申请日:1997-06-03

    Abstract: An insulating film with a low dielectric constant is more quickly formed on a substrate by reducing the co-etch rate as the film is deposited. The process gas is formed into a plasma from silicon-containing and fluorine-containing gases. The plasma is biased with an RF field to enhance deposition of the film. Deposition and etching occur simultaneously. The relative rate of deposition to etching is increased in the latter portion of the deposition process by decreasing the bias RF power, which decreases the surface temperature of the substrate and decreases sputtering and etching activities. Processing time is reduced compared to processes with fixed RF power levels. Film stability, retention of water by the film, and corrosion of structures on the substrate are all improved. The film has a relatively uniform and low dielectric constant and may fill trenches with aspect ratios of at least 4:1 and gaps less than 0.5 .mu.m.

    Abstract translation: 当薄膜沉积时,通过降低共蚀刻速率,在衬底上更迅速地形成具有低介电常数的绝缘膜。 工艺气体由含硅和含氟气体形成等离子体。 等离子体被RF场偏置以增强膜的沉积。 沉积和蚀刻同时发生。 通过降低偏压RF功率,沉积过程的后一部分,相对于蚀刻的相对速率增加,这降低了衬底的表面温度并降低了溅射和蚀刻活性。 与具有固定RF功率级别的处理相比,处理时间缩短。 薄膜的稳定性,薄膜的水分保持性以及基板上的结构的腐蚀都得到改善。 该膜具有相对均匀和低的介电常数,并且可以填充具有至少4:1的纵横比和小于0.5μm的间隙的沟槽。

    Vapor deposition of hafnium silicate materials with tris(dimethylamino)silane
    9.
    发明申请
    Vapor deposition of hafnium silicate materials with tris(dimethylamino)silane 审中-公开
    硅酸铪材料与三(二甲基氨基)硅烷的蒸汽沉积

    公开(公告)号:US20060062917A1

    公开(公告)日:2006-03-23

    申请号:US11223896

    申请日:2005-09-09

    CPC classification number: C23C16/308 C23C16/401 C23C16/56

    Abstract: In one embodiment, a method for forming a morphologically stable dielectric material is provided which includes exposing a substrate to a hafnium precursor, a silicon precursor and an oxidizing gas to form hafnium silicate material during a chemical vapor deposition (CVD) process and subsequently and optionally exposing the substrate to a post deposition anneal, a nitridation process and a thermal annealing process. In some examples, the hafnium and silicon precursors used during a metal-organic CVD (MOCVD) process are alkylamino compounds, such as tetrakis(diethylamino)hafnium (TDEAH) and tris(dimethylamino)silane (Tris-DMAS). In another embodiment, other metal precursors may be used to form a variety of metal silicates containing tantalum, titanium, aluminum, zirconium, lanthanum or combinations thereof.

    Abstract translation: 在一个实施方案中,提供了一种用于形成形态稳定的电介质材料的方法,其包括在化学气相沉积(CVD)工艺期间将衬底暴露于铪前体,硅前体和氧化气体以形成硅酸铪材料,随后和任选地 将衬底暴露于后沉积退火,氮化工艺和热退火工艺。 在一些实例中,在金属 - 有机CVD(MOCVD)方法中使用的铪和硅前体是烷基氨基化合物,例如四(二乙基氨基)铪(TDEAH)和三(二甲氨基)硅烷(Tris-DMAS)。 在另一个实施方案中,其它金属前体可用于形成含有钽,钛,铝,锆,镧或其组合的各种金属硅酸盐。

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