公开(公告)号：US12080760B2

公开(公告)日：2024-09-03

申请号：US17263784

申请日：2019-08-05

申请人： ROHM CO., LTD.

发明人： Yuki Nakano ,  Masatoshi Aketa ,  Takui Sakaguchi ,  Yuichiro Nanen

IPC分类号： H01L29/78 ,  H01L29/04 ,  H01L29/06 ,  H01L29/08 ,  H01L29/16

CPC分类号： H01L29/0696 ,  H01L29/045 ,  H01L29/086 ,  H01L29/1608 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7813

摘要： An SiC semiconductor device includes an SiC semiconductor layer having a first main surface and a second main surface, a gate electrode embedded in a trench with a gate insulating layer, a source region of a first conductivity type formed in a side of the trench in a surface laver portion of the first main surface, a body region of a second conductivity type formed in a region at the second main surface side with respect to the source region in the surface layer portion of the first main surface, a drift region of the first conductivity type formed in a region at the second main surface side in the SiC semiconductor layer, and a contact region of the second conductivity type having an impurity concentration of not more than 1.0×1020 cm−3 and formed in the surface layer portion of the first main surface.

公开(公告)号：US12034073B2

公开(公告)日：2024-07-09

申请号：US17410661

申请日：2021-08-24

申请人： Rohm Co., Ltd.

发明人： Yuki Nakano

IPC分类号： H01L29/78 ,  H01L21/04 ,  H01L29/06 ,  H01L29/10 ,  H01L29/16 ,  H01L29/36 ,  H01L29/423 ,  H01L29/66 ,  H01L29/417

CPC分类号： H01L29/7813 ,  H01L21/0465 ,  H01L29/0623 ,  H01L29/063 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/36 ,  H01L29/4236 ,  H01L29/66068 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7827 ,  H01L29/41766

摘要： A semiconductor device (A1) includes a semiconductor layer having a first face with a trench (3) formed thereon and a second face opposite to the first face, a gate electrode (41), and a gate insulating layer (5). The semiconductor layer includes a first n-type semiconductor layer (11), a second n-type semiconductor layer (12), a p-type semiconductor layer (13), and an n-type semiconductor region (14). The trench (3) is formed so as to penetrate through the p-type semiconductor layer (13) and to reach the second n-type semiconductor layer (12). The p-type semiconductor layer (13) includes an extended portion extending to a position closer to the second face of the semiconductor layer than the trench (3) is. Such structure allows suppressing dielectric breakdown in the gate insulating layer (5).

公开(公告)号：US12009213B2

公开(公告)日：2024-06-11

申请号：US17591384

申请日：2022-02-02

申请人： ROHM CO., LTD.

发明人： Yuki Nakano

IPC分类号： H01L29/861 ,  H01L21/02 ,  H01L21/04 ,  H01L21/28 ,  H01L27/04 ,  H01L29/06 ,  H01L29/10 ,  H01L29/16 ,  H01L29/20 ,  H01L29/423 ,  H01L29/51 ,  H01L29/66 ,  H01L29/78 ,  H01L29/872

CPC分类号： H01L21/049 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02241 ,  H01L21/02255 ,  H01L21/02271 ,  H01L21/044 ,  H01L21/28008 ,  H01L21/28264 ,  H01L27/04 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/1602 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66045 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/66446 ,  H01L29/7806 ,  H01L29/7813 ,  H01L29/8611 ,  H01L29/872 ,  H01L2224/0603

摘要： A method for producing a semiconductor power device includes forming a gate trench from a surface of the semiconductor layer toward an inside thereof. A first insulation film is formed on the inner surface of the gate trench. The method also includes removing a part on a bottom surface of the gate trench in the first insulation film. A second insulation film having a dielectric constant higher than SiO2 is formed in such a way as to cover the bottom surface of the gate trench exposed by removing the first insulation film.

公开(公告)号：US11929394B2

公开(公告)日：2024-03-12

申请号：US17575148

申请日：2022-01-13

申请人： ROHM CO., LTD.

发明人： Yuki Nakano ,  Ryota Nakamura

IPC分类号： H01L29/06 ,  H01L29/10 ,  H01L29/16 ,  H01L29/20 ,  H01L29/36 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L29/51 ,  H01L29/78

CPC分类号： H01L29/063 ,  H01L29/0619 ,  H01L29/0657 ,  H01L29/0661 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/1602 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/36 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/4925 ,  H01L29/511 ,  H01L29/517 ,  H01L29/518 ,  H01L29/7809 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7825 ,  H01L29/0649 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/42372 ,  H01L29/42376

摘要： A semiconductor device of the present invention includes a semiconductor layer of a first conductivity type having a cell portion and an outer peripheral portion disposed around the cell portion, formed with a gate trench at a surface side of the cell portion, and a gate electrode buried in the gate trench via a gate insulating film, forming a channel at a portion lateral to the gate trench at ON-time, the outer peripheral portion has a semiconductor surface disposed at a depth position equal to or deeper than a depth of the gate trench, and the semiconductor device further includes a voltage resistant structure having a semiconductor region of a second conductivity type formed in the semiconductor surface of the outer peripheral portion.

公开(公告)号：US11916112B2

公开(公告)日：2024-02-27

申请号：US17266028

申请日：2019-08-08

申请人： ROHM CO., LTD.

发明人： Yasuhiro Kawakami ,  Yuki Nakano ,  Masaya Ueno ,  Seiya Nakazawa ,  Sawa Haruyama ,  Yasunori Kutsuma

IPC分类号： H01L29/16 ,  C30B23/02 ,  C30B29/36 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/04

CPC分类号： H01L29/1608 ,  C30B23/02 ,  C30B29/36 ,  H01L29/7827 ,  H01L29/04 ,  H01L29/0696 ,  H01L29/4236 ,  H01L29/66068

摘要： An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal and having a first main surface as a device surface, a second main surface at a side opposite to the first main surface, and a side surface connecting the first main surface and the second main surface, a main surface insulating layer including an insulating material, covering the first main surface of the SiC semiconductor layer, and having an insulating side surface continuous to the side surface of the SiC semiconductor layer, and a boundary modified layer including a first region that is modified to be of a property differing from the SiC monocrystal and a second region that is modified to be of a property differing from the insulating material, and being formed across the side surface of the SiC semiconductor layer and the insulating side surface of the main surface insulating layer.

公开(公告)号：US11777030B2

公开(公告)日：2023-10-03

申请号：US17680864

申请日：2022-02-25

申请人： ROHM CO., LTD.

发明人： Shuhei Mitani ,  Yuki Nakano ,  Heiji Watanabe ,  Takayoshi Shimura ,  Takuji Hosoi ,  Takashi Kirino

IPC分类号： H01L29/78 ,  H01L21/02 ,  H01L21/04 ,  H01L21/82 ,  H01L29/417 ,  H01L29/423 ,  H01L29/51 ,  H01L29/66 ,  H01L29/10 ,  H01L29/16 ,  H01L29/08 ,  H01L29/45

CPC分类号： H01L29/7827 ,  H01L21/0223 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/02236 ,  H01L21/02247 ,  H01L21/049 ,  H01L21/0445 ,  H01L21/8213 ,  H01L29/0847 ,  H01L29/1087 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42356 ,  H01L29/42368 ,  H01L29/511 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66068 ,  H01L29/78 ,  H01L29/7802 ,  H01L29/7813 ,  H01L21/02252 ,  H01L21/02255 ,  H01L29/086 ,  H01L29/0869 ,  H01L29/45

摘要： A semiconductor device includes a semiconductor layer of a first conductivity type. A well region that is a second conductivity type well region is formed on a surface layer portion of the semiconductor layer and has a channel region defined therein. A source region that is a first conductivity type source region is formed on a surface layer portion of the well region. A gate insulating film is formed on the semiconductor layer and has a multilayer structure. A gate electrode is opposed to the channel region of the well region where a channel is formed through the gate insulating film.

公开(公告)号：US11605707B2

公开(公告)日：2023-03-14

申请号：US17349256

申请日：2021-06-16

申请人： ROHM CO., LTD.

发明人： Minoru Nakagawa ,  Yuki Nakano ,  Masatoshi Aketa ,  Masaya Ueno ,  Seigo Mori ,  Kenji Yamamoto

IPC分类号： H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/16 ,  H01L29/40

摘要： A semiconductor device includes a semiconductor layer of a first conductivity type having a first main surface at one side and a second main surface at another side, a trench gate structure including a gate trench formed in the first main surface of the semiconductor layer, and a gate electrode embedded in the gate trench via a gate insulating layer, a trench source structure including a source trench formed deeper than the gate trench and across an interval from the gate trench in the first main surface of the semiconductor layer, a source electrode embedded in the source trench, and a deep well region of a second conductivity type formed in a region of the semiconductor layer along the source trench, a ratio of a depth of the trench source structure with respect to a depth of the trench gate structure being not less than 1.5 and not more than 4.0, a body region of the second conductivity type formed in a region of a surface layer portion of the first main surface of the semiconductor layer between the gate trench and the source trench, a source region of the first conductivity type formed in a surface layer portion of the body region, and a drain electrode connected to the second main surface of the semiconductor layer.

公开(公告)号：US11417743B2

公开(公告)日：2022-08-16

申请号：US17002359

申请日：2020-08-25

申请人： ROHM CO., LTD.

发明人： Yuki Nakano ,  Ryota Nakamura

IPC分类号： H01L29/423 ,  H01L29/78 ,  H01L29/06 ,  H01L29/417 ,  H01L29/49 ,  H01L29/10 ,  H01L29/16 ,  H01L29/20 ,  H01L29/36 ,  H01L29/51 ,  H01L29/40

摘要： A semiconductor device of the present invention includes a semiconductor layer of a first conductivity type having a cell portion and an outer peripheral portion disposed around the cell portion, and a surface insulating film disposed in a manner extending across the cell portion and the outer peripheral portion, and in the cell portion, formed to be thinner than a part in the outer peripheral portion.

公开(公告)号：US11296223B2

公开(公告)日：2022-04-05

申请号：US17464303

申请日：2021-09-01

申请人： ROHM CO., LTD.

发明人： Shuhei Mitani ,  Yuki Nakano ,  Heiji Watanabe ,  Takayoshi Shimura ,  Takuji Hosoi ,  Takashi Kirino

IPC分类号： H01L29/78 ,  H01L21/02 ,  H01L21/04 ,  H01L21/82 ,  H01L29/417 ,  H01L29/423 ,  H01L29/51 ,  H01L29/66 ,  H01L29/10 ,  H01L29/16 ,  H01L29/08 ,  H01L29/45

摘要： A semiconductor device includes a semiconductor layer of a first conductivity type. A well region that is a second conductivity type well region is formed on a surface layer portion of the semiconductor layer and has a channel region defined therein. A source region that is a first conductivity type source region is formed on a surface layer portion of the well region. A gate insulating film is formed on the semiconductor layer and has a multilayer structure. A gate electrode is opposed to the channel region of the well region where a channel is formed through the gate insulating film.

公开(公告)号：US11004968B2

公开(公告)日：2021-05-11

申请号：US16547007

申请日：2019-08-21

申请人： ROHM CO., LTD.

发明人： Yuki Nakano

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/417 ,  H01L29/423 ,  H01L29/12 ,  H01L29/49 ,  H01L29/16 ,  H01L29/20

摘要： The semiconductor device of the present invention includes a semiconductor layer which includes an active portion and a gate finger portion, an MIS transistor which is formed at the active portion and includes a gate trench as well as a source region, a channel region and a drain region sequentially along a side surface of the gate trench, a plurality of first gate finger trenches arranged by an extended portion of the gate trench at the gate finger portion, a gate electrode embedded each in the gate trench and the first gate finger trench, a second conductive-type first bottom-portion impurity region formed at least at a bottom portion of the first gate finger trench, a gate finger which crosses the plurality of first gate finger trenches and is electrically connected to the gate electrode, and a second conductive-type electric field relaxation region which is formed more deeply than the bottom portion of the first gate finger trench between the mutually adjacent first gate finger trenches.