SEMICONDUCTOR STORAGE DEVICE AND READING METHOD THEREOF
    1.
    发明申请
    SEMICONDUCTOR STORAGE DEVICE AND READING METHOD THEREOF 有权
    半导体存储器件及其读取方法

    公开(公告)号:US20110176366A1

    公开(公告)日:2011-07-21

    申请号:US12978878

    申请日:2010-12-27

    IPC分类号: G11C16/04 G11C16/26

    CPC分类号: G11C16/0408 G11C16/26

    摘要: An embodiment of the invention provides a semiconductor storage device including a NAND string, a SEN node, and a capacitor. The NAND string includes plural series-connected memory cells, and one end of the NAND string is connected to a bit line while the other end is connected to a common source line. The SEN node is configured to be able to be electrically connected to a voltage source and the bit line. In the capacitor, one end is connected to the SEN node while the other end is connected to a CLK node to which a voltage within a predetermined range is applied. A discharge rate of the SEN node is enhanced by decreasing a capacitance during discharge of the SEN node only when a selected memory cell selected from the plural memory cells is an on-cell.

    摘要翻译: 本发明的实施例提供一种包括NAND串,SEN节点和电容器的半导体存储装置。 NAND串包括多个串联存储单元,并且NAND串的一端连接到位线,而另一端连接到公共源极线。 SEN节点被配置为能够电连接到电压源和位线。 在电容器中,一端连接到SEN节点,而另一端连接到施加了预定范围内的电压的CLK节点。 只有当从多个存储单元中选择的所选择的存储单元是开小区时,通过减少SEN节点的放电期间的电容来增强SEN节点的放电率。

    Semiconductor storage device and reading method thereof
    2.
    发明授权
    Semiconductor storage device and reading method thereof 有权
    半导体存储装置及其读取方法

    公开(公告)号:US08284605B2

    公开(公告)日:2012-10-09

    申请号:US12978878

    申请日:2010-12-27

    IPC分类号: G11C11/34

    CPC分类号: G11C16/0408 G11C16/26

    摘要: An embodiment of the invention provides a semiconductor storage device including a NAND string, a SEN node, and a capacitor. The NAND string includes plural series-connected memory cells, and one end of the NAND string is connected to a bit line while the other end is connected to a common source line. The SEN node is configured to be able to be electrically connected to a voltage source and the bit line. In the capacitor, one end is connected to the SEN node while the other end is connected to a CLK node to which a voltage within a predetermined range is applied. A discharge rate of the SEN node is enhanced by decreasing a capacitance during discharge of the SEN node only when a selected memory cell selected from the plural memory cells is an on-cell.

    摘要翻译: 本发明的实施例提供一种包括NAND串,SEN节点和电容器的半导体存储装置。 NAND串包括多个串联存储单元,并且NAND串的一端连接到位线,而另一端连接到公共源极线。 SEN节点被配置为能够电连接到电压源和位线。 在电容器中,一端连接到SEN节点,而另一端连接到施加了预定范围内的电压的CLK节点。 只有当从多个存储单元中选择的所选择的存储单元是开小区时,通过减少SEN节点的放电期间的电容来增强SEN节点的放电率。

    Nonvolatile semiconductor memory
    5.
    发明授权
    Nonvolatile semiconductor memory 有权
    非易失性半导体存储器

    公开(公告)号:US08223543B2

    公开(公告)日:2012-07-17

    申请号:US13193968

    申请日:2011-07-29

    IPC分类号: G11C16/04

    摘要: A memory includes first and second select gate transistors, memory cells, a source line, a bit line, a selected word line which is connected to a selected memory cell as a target of a verify reading, a non-selected word line which is connected to a non-selected memory cell except the selected memory cell, a potential generating circuit for generating a selected read potential which is supplied to the selected word line, and generating a non-selected read potential larger than the selected read potential, which is supplied to the non-selected word line, and a control circuit which classifies a threshold voltage of the selected memory cell to one of three groups by verifying which area among three area which are isolated by two values does a cell current of the selected memory cell belong, when the selected read potential is a first value.

    摘要翻译: 存储器包括第一和第二选择栅极晶体管,存储器单元,源极线,位线,连接到作为验证读取的目标的所选存储单元的选定字线,连接的未选择字线 到除所选存储单元之外的未选择的存储单元,用于产生提供给所选择的字线的所选择的读取电位并产生大于所选择的读取电位的未被选择的读取电位的电位产生电路, 以及控制电路,其通过验证被选择的存储器单元的单元电流属于两个值隔离的三个区域中的哪个区域属于三个组中的一个,将选择的存储单元的阈值电压分类为三个组中的一个 当所选择的读取电位为第一值时。

    Method and apparatus for producing group III nitride based compound semiconductor
    6.
    发明授权
    Method and apparatus for producing group III nitride based compound semiconductor 有权
    制备III族氮化物基化合物半导体的方法和装置

    公开(公告)号:US08123856B2

    公开(公告)日:2012-02-28

    申请号:US12225550

    申请日:2007-04-05

    IPC分类号: C30B19/00 C30B19/06

    摘要: In the flux method, a source nitrogen gas is sufficiently heated before feeding to an Na—Ga mixture.The apparatus of the invention is provided for producing a group III nitride based compound semiconductor. The apparatus includes a reactor which maintains a group III metal and a metal differing from the group III metal in a molten state, a heating apparatus for heating the reactor, an outer vessel for accommodating the reactor and the heating apparatus, and a feed pipe for feeding a gas containing at least nitrogen from the outside of the outer vessel into the reactor. The feed pipe has a zone for being heated together with the reactor by means of the heating apparatus, wherein the zone is heated inside the outer vessel and outside the reactor.

    摘要翻译: 在通量法中,在将氮源充分加热至Na-Ga混合物之前,充分加热。 提供本发明的装置用于制造III族氮化物基化合物半导体。 该装置包括在熔融状态下维持III族金属和不同于III族金属的金属的反应器,用于加热反应器的加热装置,用于容纳反应器的外部容器和加热装置,以及用于 将从外部容器外部至少含有氮气的气体进料到反应器中。 进料管具有通过加热装置与反应器一起加热的区域,其中该区域在外部容器内部和反应器外部被加热。

    NONVOLATILE SEMICONDUCTOR MEMORY, METHOD FOR READING OUT THEREOF, AND MEMORY CARD
    7.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY, METHOD FOR READING OUT THEREOF, AND MEMORY CARD 有权
    非易失性半导体存储器,其读出方法和存储卡

    公开(公告)号:US20110299339A1

    公开(公告)日:2011-12-08

    申请号:US13210431

    申请日:2011-08-16

    IPC分类号: G11C16/26

    摘要: A nonvolatile semiconductor memory includes: a memory cell unit including a plurality of memory cells having an electric charge accumulation layer and a control electrode, said memory cells being electrically connected in series; a plurality of word lines, each of which is electrically connected to said control electrode of said plurality of memory cells; a source line electrically connected to said memory cells at one end of said memory cell unit; a bit line electrically connected to said memory cells at the other end of said memory cell unit; and a control signal generation circuit, which during a data readout operation staggers a timing for selecting the word line connected to said memory cells of said memory cell unit from a timing for selecting a non-selected word line connected to a non-selected memory.

    摘要翻译: 非易失性半导体存储器包括:存储单元单元,包括具有电荷累积层和控制电极的多个存储单元,所述存储单元串联电连接; 多个字线,其各自电连接到所述多个存储单元的所述控制电极; 在所述存储单元单元的一端电连接到所述存储单元的源极线; 在所述存储单元单元的另一端电连接到所述存储单元的位线; 以及控制信号生成电路,其在数据读出操作期间,从连接到未选择的存储器的未选择的字线的选择时刻开始,选择连接到所述存储单元的所述存储单元的字线的定时。

    Bis [Tri (Hydroxypolyalkyleneoxy) Silylalkyl] Polysulfide, Method of Manufacturing Bis [Tri (Hydroxypolyalkyleneoxy) Silylalkyl] Polysulfide, Tire Rubber Additive, And Tire Rubber Composition
    8.
    发明申请
    Bis [Tri (Hydroxypolyalkyleneoxy) Silylalkyl] Polysulfide, Method of Manufacturing Bis [Tri (Hydroxypolyalkyleneoxy) Silylalkyl] Polysulfide, Tire Rubber Additive, And Tire Rubber Composition 失效
    双[三(羟基聚亚烷氧基)硅烷基烷基]多硫化物,制备双[三(羟基聚亚烷氧基)硅烷基烷基]多硫化物,轮胎橡胶添加剂和轮胎橡胶组合物的方法

    公开(公告)号:US20110040000A1

    公开(公告)日:2011-02-17

    申请号:US12521610

    申请日:2007-12-28

    IPC分类号: C08K5/541 C07F7/08

    CPC分类号: C07F7/1804

    摘要: A bis[tri(hydroxypolyalkyleneoxy)silylalkyl] polysulfide, i.e., a polysulfide that contains bonded hydroxypolyalkyleneoxy groups instead of alkoxy groups in the bis(trialkoxysilylalkyl) polysulfide; a method of manufacturing of the aforementioned polysulfide by heating a bis(trialkoxysilylalkyl) polysulfide and a polyalkyleneglycol; a tire rubber additive to a tire rubber composition that comprises a bis[tri(hydroxypolyalkyleneoxy)silylalkyl] polysulfide alone or a mixture of bis[tri(hydroxypolyalkyleneoxy)silylalkyl] polysulfide and a polyalkyleneglycol; and a tire rubber composition that contains the aforementioned additive.

    摘要翻译: 双(三(羟基聚亚烷氧基)甲硅烷基烷基]多硫化物,即在双(三烷氧基甲硅烷基烷基)多硫化物中含有键合的羟基聚亚烷基氧基代替烷氧基的多硫化物; 通过加热双(三烷氧基甲硅烷基烷基)多硫化物和聚亚烷基二醇制备上述多硫化物的方法; 包含单独的双[三(羟基亚烷基氧基)甲硅烷基烷基]多硫化物或双[三(羟基聚亚烷基氧基)甲硅烷基烷基]多硫化物和聚亚烷基二醇的混合物的轮胎橡胶组合物的轮胎橡胶添加剂; 和含有上述添加剂的轮胎橡胶组合物。