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公开(公告)号：US20190172781A1
公开(公告)日：2019-06-06
申请号：US15988893
申请日：2018-05-24
发明人： Jeong Il LEE , Jeong Ho LEE , Jin Su KIM , Bong Ju CHO
IPC分类号： H01L23/498 , H01L23/00 , H01L23/495
摘要： A fan-out semiconductor package includes: a frame including insulating layers, wiring layers disposed on the insulating layers, and connection via layers penetrating through the insulating layers and electrically connecting the wiring layers to each other, and having a recess portion; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is connected to the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; and a connection member disposed on the frame and an active surface of the semiconductor chip and including one or more redistribution layers electrically connecting the wiring layers and the connection pads to each other, in which the recess portion includes walls having different inclined angles.
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公开(公告)号：US20190198429A1
公开(公告)日：2019-06-27
申请号：US16012037
申请日：2018-06-19
发明人： Myung Sam KANG , Young Gwan KO , Jeong Ho LEE , Shang Hoon SEO , Yong Jin SEOL
IPC分类号： H01L23/495 , H01L23/552 , H01L23/34
CPC分类号： H01L23/4952 , H01L23/34 , H01L23/49541 , H01L23/49575 , H01L23/552
摘要： A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion and a stopper layer disposed on a bottom surface of the recess portion; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is disposed on the stopper layer; first metal bumps disposed on the connection pads; an encapsulant covering at least portions of each of the frame, the semiconductor chip, and the first metal bumps and filling at least portions of the recess portion; a connection member disposed on the frame and an active surface of the semiconductor chip and including a redistribution layer electrically connecting the wiring layers and the connection pads to each other; and a first blocking structure disposed on walls of the recess portion to surround side surfaces of the semiconductor chip.
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公开(公告)号：US20190164895A1
公开(公告)日：2019-05-30
申请号：US15986302
申请日：2018-05-22
发明人： Jin Su KIM , Jeong Ho LEE , Shang Hoon SEO , Bong Ju CHO
IPC分类号： H01L23/538 , H01L23/31 , H01L23/00 , H01L23/552 , H01L21/48 , H01L21/56
CPC分类号： H01L23/5389 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/565 , H01L23/3114 , H01L23/3121 , H01L23/3128 , H01L23/49822 , H01L23/49838 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/552 , H01L23/562 , H01L24/19 , H01L24/20 , H01L2224/214 , H01L2924/3025 , H01L2924/3511
摘要： A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion and a stopper layer disposed on a bottom surface of the recess portion; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is disposed on the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; a connection member disposed on the frame and an active surface of the semiconductor chip and including a redistribution layer electrically connecting the wiring layers and the connection pads to each other; and a guide pattern disposed adjacent to a wall of the recess portion and disposed in the frame. An edge of the bottom surface of the recess portion has a groove portion.
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公开(公告)号：US20190139876A1
公开(公告)日：2019-05-09
申请号：US15988541
申请日：2018-05-24
发明人： Jeong Il LEE , Jeong Ho LEE , Jin Su KIM , Bong Ju CHO
IPC分类号： H01L23/498 , H01L23/00 , H01L21/48
摘要： A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is connected to the stopper layer; first metal bumps disposed on the connection pads; second metal bumps disposed on an uppermost wiring layer of the wiring layers; an encapsulant covering at least portions of each of the frame, the semiconductor chip, and the first and second metal bumps and filling at least portions of the recess portion; and a connection member disposed on the frame and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads and the uppermost wiring layer through the first and second metal bumps.
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公开(公告)号：US20190131253A1
公开(公告)日：2019-05-02
申请号：US15978783
申请日：2018-05-14
发明人： Jeong Ho LEE , Myung Sam KANG , Young Gwan KO , Shang Hoon SEO , Jin Su KIM
IPC分类号： H01L23/00 , H01L23/31 , H01L23/538 , H01L23/552 , H01L21/48 , H01L21/56
摘要： A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is connected to the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; and a connection member disposed on the frame and an active surface of the semiconductor chip and including a redistribution layer electrically connecting the wiring layers of the frame and the connection pads of the semiconductor chip to each other. A lowermost wiring layer of the wiring layers is embedded in the frame and has a lower surface exposed from a lowermost insulating layer of the frame.
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公开(公告)号：US20190131232A1
公开(公告)日：2019-05-02
申请号：US16037670
申请日：2018-07-17
发明人： Sang Kyu LEE , Jeong Ho LEE
IPC分类号： H01L23/498 , H01L23/31 , H01L25/065 , H01L25/16 , H01L23/00
CPC分类号： H01L23/49838 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L24/16 , H01L24/20 , H01L25/0655 , H01L25/16 , H01L2224/0231 , H01L2224/02375 , H01L2224/02377 , H01L2224/16227 , H01L2224/16238 , H01L2224/18 , H05K1/185 , H01L2924/0001
摘要： A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a first recess portion and a first stopper layer disposed on a bottom surface of the first recess portion; a semiconductor chip disposed in the first recess portion and having connection pads, an active surface on which the connection pads are disposed, and an inactive surface opposing the active surface and disposed on the first stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the first recess portion; and a connection member disposed on the frame and the active surface of the semiconductor chip and including a redistribution layer electrically connecting the wiring layers of the frame and the connection pads of the semiconductor chip to each other.
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公开(公告)号：US20190131226A1
公开(公告)日：2019-05-02
申请号：US15978727
申请日：2018-05-14
发明人： Jeong Ho LEE , Myung Sam KANG , Young Gwan KO , Jin Su KIM , Shang Hoon SEO , Jeong Il LEE
IPC分类号： H01L23/498 , H01L23/00 , H01L23/31
CPC分类号： H01L23/49822 , H01L23/3157 , H01L23/49811 , H01L24/09 , H01L24/19 , H01L24/20 , H01L24/32 , H01L2224/02375 , H01L2224/02377 , H01L2224/0401 , H01L2224/18 , H01L2224/221 , H01L2224/32225 , H01L2224/73267 , H01L2924/15153 , H01L2924/15311 , H01L2924/18161 , H01L2924/3511 , H05K1/185 , H01L2924/0001
摘要： A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion and a stopper layer disposed on a bottom surface of the recess portion; a semiconductor chip disposed in the recess portion, and having connection pads, an active surface on which the connection pads are disposed, and an inactive surface opposing the active surface and disposed on the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; and a connection member disposed on the frame and the active surface of the semiconductor chip and including a redistribution layer electrically connecting the plurality of wiring layers of the frame and the connection pads of the semiconductor chip to each other. The active surface of the semiconductor chip and an upper surface of the encapsulant have a step portion therebetween.
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8.发明申请PRINTED CIRCUIT BOARD, ELECTRONIC COMPONENT MODULE AND METHOD OF MANUFACTURING THE SAME 审中-公开印刷电路板，电子元件模块及其制造方法公开(公告)号：US20160302308A1
公开(公告)日：2016-10-13
申请号：US14871065
申请日：2015-09-30
发明人： Jeong Ho LEE , Young Do KWEON , Hyoung Joon KIM , Seung Yeop KOOK
CPC分类号： H05K3/4694 , H01L21/4857 , H01L23/49816 , H01L23/49827 , H01L23/5383 , H01L23/5385 , H01L2224/16227 , H01L2224/16265 , H01L2224/1703 , H01L2924/15311 , H01L2924/3511 , H05K3/4602 , H05K2201/048 , H05K2201/10522 , H05K2201/10674
摘要： There are provided a printed circuit board, an electronic component module and a method of manufacturing the same. The printed circuit board includes a circuit board including a through hole and a first circuit pattern, and a connection board having a microcircuit structure including a second circuit pattern, the connection board accommodated in the through hole.
摘要翻译： 提供了印刷电路板，电子部件模块及其制造方法。 印刷电路板包括具有通孔和第一电路图形的电路板，以及具有包括第二电路图案的微电路结构的连接板，该连接板容纳在通孔中。
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公开(公告)号：US20150055312A1
公开(公告)日：2015-02-26
申请号：US14250965
申请日：2014-04-11
发明人： Jeong Ho LEE , Mi Jin PARK , Chang Bae LEE , Young Do KWEON
CPC分类号： B23K1/0016 , B23K2101/42 , H01L2224/16225 , H01L2924/15311 , H05K3/381 , H05K3/4602 , H05K3/4661 , H05K2201/096 , H05K2201/10378 , H05K2203/041
摘要： Disclosed herein is an interposer substrate, including: a core layer and a through core via (TCV) penetrating through the core layer; circuit wirings formed on both surfaces of the core layer and a TCV upper pad and a TCV lower pad which are each bonded to upper and lower surfaces of the TCV formed on both surfaces of the core layer; upper insulating layers covering the TCV upper pad and the circuit wiring formed on one surface of the core layer and having the circuit wirings formed on upper surfaces thereof; a stack via penetrating through the upper insulating layers of each layer and having one end connected to the TCV upper pad; and a lower insulating layer covering the TCV lower pad and the circuit wiring formed on the other surface of the core layer and provided with an opening which exposes the TCV lower pad.
摘要翻译： 本发明公开了一种内插衬底，包括：穿透核心层的核心层和穿芯通孔（TCV）; 形成在芯层的两个表面上的电路布线和TCV上焊盘和TCV下焊盘，其各自结合到形成在芯层的两个表面上的TCV的上表面和下表面; 覆盖TCV上焊盘的上绝缘层和形成在芯层的一个表面上并且在其上表面上形成电路布线的电路布线; 通过穿过每层的上绝缘层并且具有连接到TCV上垫的一端的叠层; 以及覆盖TCV下焊盘的下绝缘层和形成在芯层的另一表面上的电路布线，并且设置有暴露TCV下焊盘的开口。
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公开(公告)号：US20190131270A1
公开(公告)日：2019-05-02
申请号：US15988647
申请日：2018-05-24
发明人： Jeong Ho LEE , Bong Ju CHO , Young Gwan KO , Jin Su KIM , Shang Hoon SEO , Jeong Il LEE
IPC分类号： H01L23/00 , H01L21/48 , H01L21/56 , H01L23/498 , H01L23/31
摘要： A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads, an active surface on which the connection pads are disposed, and an inactive surface opposing the active surface, and disposed in the recess portion so that the inactive surface is connected to the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; and a connection member disposed on the frame and the active surface of the semiconductor chip and including a redistribution layer electrically connecting the wiring layers of the frame and the connection pads of the semiconductor chip to each other, wherein the stopper layer includes an insulating material.
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