公开(公告)号：US20230017277A1

公开(公告)日：2023-01-19

申请号：US17935561

申请日：2022-09-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JINBUM KIM ,  SEOKHOON KIM ,  KWANHEUM LEE ,  CHOEUN LEE ,  SUJIN JUNG

IPC: H01L29/08 ,  H01L29/78 ,  H01L29/167 ,  H01L29/786 ,  H01L29/06

Abstract: A semiconductor device includes a channel, a first source/drain structure on a first side surface of the channel, a second source/drain structure on a second side surface of the channel, a gate structure surrounding the channel, an inner spacer layer on a side surface of the gate structure, and an outer spacer layer on an outer surface of the inner spacer layer. The first source/drain structure includes a first source/drain layer on the channel and a second source/drain layer on the first source/drain layer, and on a plane of the semiconductor device that passes through the channel, at least one of a first boundary line of the first source/drain layer in contact with the second source/drain layer and a second boundary line of the first source/drain layer in contact with the channel may be convex, extending toward the channel.

公开(公告)号：US20220359678A1

公开(公告)日：2022-11-10

申请号：US17552446

申请日：2021-12-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： GYEOM KIM ,  JINBUM KIM ,  DONGWOO KIM ,  DONGSUK SHIN ,  SANGMOON LEE ,  SEUNG HUN LEE

IPC: H01L29/417 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786 ,  H01L21/02 ,  H01L29/40 ,  H01L29/66

Abstract: A semiconductor device includes a substrate including an active pattern, a channel pattern and a source/drain pattern on the active pattern, a gate electrode provided on the channel pattern and extended in a first direction, and an active contact coupled to the source/drain pattern. The active contact includes a buried portion buried in the source/drain pattern and a contact portion on the buried portion. The buried portion includes an expansion portion provided in a lower portion of the source/drain pattern and a vertical extension portion connecting the contact portion to the expansion portion.

公开(公告)号：US20240087884A1

公开(公告)日：2024-03-14

申请号：US18513297

申请日：2023-11-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： GYEOM KIM ,  Dongwoo Kim ,  Jihye Yi ,  JINBUM KIM ,  Sangmoon Lee ,  Seunghun Lee

IPC: H01L21/02 ,  H01L21/285 ,  H01L21/768 ,  H01L21/8234 ,  H01L23/485 ,  H01L29/06 ,  H01L29/08 ,  H01L29/165 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

CPC classification number: H01L21/02293 ,  H01L21/28518 ,  H01L21/76897 ,  H01L21/823431 ,  H01L21/823481 ,  H01L23/485 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/41766 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/775 ,  H01L29/7848 ,  H01L29/78696

Abstract: A semiconductor device is provided. The semiconductor device includes: an active region on a semiconductor substrate; a channel region on the active region; a source/drain region adjacent to the channel region on the active region; a gate structure overlapping the channel region, on the channel region; a contact structure on the source/drain region; a gate spacer between the contact structure and the gate structure; and a contact spacer surrounding a side surface of the contact structure. The source/drain region includes a first epitaxial region having a recessed surface and a second epitaxial region on the recessed surface of the first epitaxial region, and the second epitaxial region includes an extended portion, extended from a portion overlapping the contact structure in a vertical direction, in a horizontal direction and overlapping the contact spacer in the vertical direction.

公开(公告)号：US20230071231A1

公开(公告)日：2023-03-09

申请号：US17714450

申请日：2022-04-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： JINBUM KIM

IPC: H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786 ,  H01L29/40

Abstract: A semiconductor device includes an active pattern on a substrate, source/drain patterns on the active pattern, a plurality of channel layers stacked on the active pattern to be vertically spaced apart from each other and connecting the source/drain patterns with each other, a gate electrode between the source/drain patterns to cross the active pattern and to surround the channel layers, and active contacts at opposite sides of the gate electrode to cover top surfaces of the source/drain patterns. A width of each of the active contacts is smaller than or equal to the largest width of each of the source/drain patterns. Each of the top surfaces of the source/drain patterns has an inclined surface that is inclined relative to a top surface of the substrate, and each of the active contacts includes a protruding portion that protrudes toward the inclined surface.

公开(公告)号：US20220352309A1

公开(公告)日：2022-11-03

申请号：US17714695

申请日：2022-04-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JINBUM KIM ,  DAHYE KIM ,  DONGMYOUNG KIM ,  DONGWOO KIM ,  YONGJUN NAM ,  SANGMOON LEE ,  INGYU JANG ,  SUJIN JUNG

IPC: H01L29/06 ,  H01L29/08 ,  H01L29/10

Abstract: A semiconductor device includes a substrate having an active region extending in a first direction; a gate structure disposed on the substrate, intersecting the active region, and extending in a second direction; channel layers disposed on the active region to be spaced apart from each other in a third direction, perpendicular to an upper surface of the substrate, and to be surrounded by the gate structure; source/drain regions disposed on both sides of the gate structure and connected to the channel layers; air gap regions located between the source/drain regions and the active region and spaced apart from each other in the third direction; and semiconductor layers alternately disposed with the air gap regions in the third direction and defining the air gap regions, wherein lower ends of the source/drain regions are located on a level lower than an uppermost air gap region.

公开(公告)号：US20250151258A1

公开(公告)日：2025-05-08

申请号：US18926393

申请日：2024-10-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： JINBUM KIM ,  DAE-JIN NAM ,  Hyojin Park ,  Soomin SON ,  GUIFU YANG ,  Kyeonggyu LEE ,  Inhae ZOH

IPC: H10B12/00

Abstract: Disclosed is a semiconductor device comprising a substrate that includes a device isolation pattern and an active region, a bit line that extends in a first direction on the substrate, a semiconductor pattern on the bit line, a growth mask layer on the bit line and having a sidewall in contact with the semiconductor pattern, a word line on the bit line and extending in a second direction that intersects the first direction, and a gate dielectric pattern between the word line and the semiconductor pattern. A top surface of the growth mask layer is at a level higher than that of a bottom surface of the semiconductor pattern.

公开(公告)号：US20240234551A1

公开(公告)日：2024-07-11

申请号：US18539355

申请日：2023-12-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jangwoo PARK ,  DONGWOO KIM ,  JINBUM KIM

IPC: H01L29/732 ,  H01L23/522

CPC classification number: H01L29/732 ,  H01L23/522 ,  H01L29/0673

Abstract: A semiconductor device includes first, second, and third epitaxial layers sequentially stacked on a substrate and a first diffusion prevention layer provided in at least one of regions between the first and second epitaxial layers and between the second and third epitaxial layers. The first and third epitaxial layers have a first conductivity type, and the second epitaxial layer has a second conductivity type. The first diffusion prevention layer is configured to prevent an impurity in the second epitaxial layer from being diffused. The first, second, and third epitaxial layers include first, second, and third active patterns, respectively, which are respective provided in upper portions thereof and on collector, base, and emitter regions, respectively, of the substrate.

公开(公告)号：US20220278204A1

公开(公告)日：2022-09-01

申请号：US17742985

申请日：2022-05-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： ILGYOU SHIN ,  MINYI KIM ,  MYUNG GIL KANG ,  JINBUM KIM ,  SEUNG HUN LEE ,  KEUN HWI CHO

IPC: H01L29/15 ,  H01L29/78 ,  H01L29/417 ,  H01L29/10

Abstract: A semiconductor device includes; a substrate including a first region and a second region, a first active pattern extending upward from the first region, a first superlattice pattern on the first active pattern, a first active fin centrally disposed on the first active pattern, a first gate electrode disposed on the first active fin, and first source/drain patterns disposed on opposing sides of the first active fin and on the first active pattern. The first superlattice pattern includes at least one first semiconductor layer and at least one first blocker-containing layer, and the first blocker-containing layer includes at least one of oxygen, carbon, fluorine and nitrogen.

公开(公告)号：US20170271479A1

公开(公告)日：2017-09-21

申请号：US15612338

申请日：2017-06-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JINBUM KIM ,  JAEYOUNG PARK ,  DONGHUN LEE ,  JEONGHO YOO ,  JIEON YOON ,  KWAN HEUM LEE ,  CHOEUN LEE ,  BONYOUNG KOO

IPC: H01L29/66 ,  H01L29/12 ,  H01L29/417 ,  H01L29/423 ,  H01L29/40 ,  H01L21/30 ,  H01L29/78 ,  H01L29/08 ,  H01L29/04 ,  H01L29/165

CPC classification number: H01L29/66636 ,  H01L21/3003 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/12 ,  H01L29/165 ,  H01L29/401 ,  H01L29/41766 ,  H01L29/42356 ,  H01L29/66545 ,  H01L29/78

Abstract: A method of fabricating a semiconductor device is provided as follows. A source/drain pattern is formed on a substrate. The source/drain pattern contains silicon atoms and germanium atoms. At least one germanium atom is removed from the germanium atoms of the source/drain pattern.

公开(公告)号：US20250142906A1

公开(公告)日：2025-05-01

申请号：US18655387

申请日：2024-05-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNGUK JANG ,  JINBUM KIM ,  ILYOUNG YOON

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device includes a barrier rib separating the source/drain region into a plurality of parts. A first part of the plurality of parts of the source/drain region includes a first epitaxial layer having a lower end disposed on the active pattern and a sidewall part extending from the lower end in a third direction crossing first and second directions and connected to the channel pattern. A second epitaxial layer is disposed on the first epitaxial layer and has a composition different from a composition of the first epitaxial layer. In a cross-section cut from the center of the source/drain region in the first direction to the second and third directions, a lower end of the first epitaxial layer of the first part of the plurality of parts of the source/drain region has an asymmetric shape around an axis extending in the third direction.