公开(公告)号：US11984514B2

公开(公告)日：2024-05-14

申请号：US18324638

申请日：2023-05-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong Heo ,  Taehwan Moon ,  Hagyoul Bae ,  Seunggeol Nam ,  Sangwook Kim ,  Kwanghee Lee

IPC: H01L29/86 ,  H10B69/00 ,  H10K10/50 ,  H10K19/00

CPC classification number: H01L29/86 ,  H10B69/00 ,  H10K10/50 ,  H10K19/00 ,  H10K19/201

Abstract: A semiconductor apparatus includes a plurality of semiconductor devices. The semiconductor devices each include a ferroelectric layer, a conductive metal oxide layer, and a semiconductor layer, between two electrodes. The conductive metal oxide layer may be between the ferroelectric layer and the semiconductor layer. The ferroelectric layer, the conductive metal oxide layer, and the semiconductor layer may all include a metal oxide. The conductive metal oxide layer may include one or more materials selected from the group consisting of an indium oxide, a zinc oxide, a tin oxide, and any combination thereof.

公开(公告)号：US11869913B2

公开(公告)日：2024-01-09

申请号：US17703217

申请日：2022-03-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongmin Keum ,  Taehan Kim ,  Bumsuk Kim ,  Junsung Park ,  Kwanghee Lee ,  Yunki Lee

IPC: H01L27/146 ,  H01L21/66 ,  H04N25/40 ,  H04N25/702

CPC classification number: H01L27/14627 ,  H01L22/20 ,  H01L27/14685 ,  H04N25/40 ,  H04N25/702 ,  H01L27/1463 ,  H01L27/14621 ,  H01L27/14645

Abstract: A pixel array of an image sensor includes a plurality of pixel groups. Each pixel group includes a plurality of unit pixels adjacent to each other and respectively including photoelectric conversion elements disposed in a semiconductor substrate, a color filter shared by the plurality of unit pixels, and a plurality of microlenses disposed on the color filter and having sizes different from each other such that the plurality of microlenses respectively focus an incident light to the photoelectric conversion elements included in the plurality of unit pixels. Deviations of sensing sensitivity of unit pixels are reduced and quality of images captured by the image sensor is enhanced by adjusting sizes of microlenses.

公开(公告)号：US20230246050A1

公开(公告)日：2023-08-03

申请号：US18299117

申请日：2023-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wook Lee ,  Euiyoung Song ,  Kwanghee Lee ,  Uihui Kwon ,  Jae Ho Kim ,  Jungchak Ahn

IPC: H01L27/146 ,  G02B5/18

CPC classification number: H01L27/14625 ,  G02B5/1842 ,  G02B5/1866 ,  H01L27/14623 ,  H01L27/14643 ,  H04N25/75

Abstract: An image sensor may include a semiconductor substrate having a light receiving surface thereon and a plurality of spaced-apart semiconductor photoelectric conversion regions at adjacent locations therein. A grating structure is provided on the light receiving surface. This grating structure extends opposite each of the plurality of spaced-apart photoelectric conversion regions. An optically-transparent layer is provided on the grating structure. This grating structure includes a plurality of spaced-apart grating patterns, which can have the same height and the same width. In addition, the grating patterns may be spaced apart from each other by a uniform distance. The grating structure is configured to selectively produce ±1 or higher order diffraction lights to the photoelectric conversion regions, in response to light incident thereon.

公开(公告)号：US20230246045A1

公开(公告)日：2023-08-03

申请号：US18147092

申请日：2022-12-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taehan Kim ,  Dongmin Keum ,  Bumsuk Kim ,  Kwanghee Lee ,  Yunki Lee ,  Yeaju Jang

IPC: H01L27/146

CPC classification number: H01L27/14621 ,  H01L27/14645 ,  H01L27/14627

Abstract: There is provided an image sensor including first to fourth color filter layers arranged on a substrate and first to seventh microlenses arranged on the first to fourth color filter layers. The first microlenses vertically overlap diagonal components of a first submatrix comprised of green-red subpixels. The second and third group of microlenses vertically overlap off-diagonal components of the first submatrix comprised of green-red subpixels. A horizontal area of each of the second group of microlenses is less than a horizontal area of each of the first microlenses and a horizontal area of each of the third group of microlenses is greater than a horizontal area of each of the first microlenses.

公开(公告)号：US11658194B2

公开(公告)日：2023-05-23

申请号：US16286897

申请日：2019-02-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wook Lee ,  Euiyoung Song ,  Kwanghee Lee ,  Uihui Kwon ,  Jae Ho Kim ,  Jungchak Ahn

IPC: H01L27/146 ,  G02B5/18 ,  H04N5/378

CPC classification number: H01L27/14625 ,  G02B5/1842 ,  G02B5/1866 ,  H01L27/14623 ,  H01L27/14643 ,  H04N5/378

Abstract: An image sensor may include a semiconductor substrate having a light receiving surface thereon and a plurality of spaced-apart semiconductor photoelectric conversion regions at adjacent locations therein. A grating structure is provided on the light receiving surface. This grating structure extends opposite each of the plurality of spaced-apart photoelectric conversion regions. An optically-transparent layer is provided on the grating structure. This grating structure includes a plurality of spaced-apart grating patterns, which can have the same height and the same width. In addition, the grating patterns may be spaced apart from each other by a uniform distance. The grating structure is configured to selectively produce ±1 or higher order diffraction lights to the photoelectric conversion regions, in response to light incident thereon.

公开(公告)号：US20200241886A1

公开(公告)日：2020-07-30

申请号：US16599358

申请日：2019-10-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Cholmin Kim ,  Jiyong Lee ,  Jongmin Park ,  Deokho Seo ,  Kwanghee Lee

IPC: G06F9/4401 ,  G06F21/60 ,  G06F13/16 ,  G06Q20/06

Abstract: A semiconductor memory device for a hash solution includes a hashing logic block including a plurality of hashing logics configured to perform a hash function, a memory cell block including a plurality of memory cells, and an input/output (I/O) control structure configured to change a data interface between the hashing logic block and the memory cell block based on a characteristic of the hash function to be performed.

公开(公告)号：US12205951B2

公开(公告)日：2025-01-21

申请号：US17491841

申请日：2021-10-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwook Kim ,  Seunggeol Nam ,  Taehwan Moon ,  Kwanghee Lee ,  Jinseong Heo ,  Hagyoul Bae ,  Yunseong Lee

IPC: H01L27/092 ,  H01L29/24 ,  H01L29/51 ,  H01L29/78 ,  H01L29/786 ,  H10B10/00

Abstract: Provided is a semiconductor device including a first semiconductor transistor including a semiconductor channel layer, and a metal-oxide semiconductor channel layer, and having a structure in which a second semiconductor transistor is stacked on the top of the first semiconductor transistor. A gate stack of the second semiconductor transistor and the top of a gate stack of the first semiconductor transistor may overlap by greater than or equal to 90%. The first semiconductor transistor and the second semiconductor transistor may have a similar level of operation characteristics.

公开(公告)号：US20230238460A1

公开(公告)日：2023-07-27

申请号：US18158176

申请日：2023-01-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwook KIM ,  Kyung-Eun Byun ,  Keunwook Shin ,  Moonil Jung ,  Euntae Kim ,  Jeeeun Yang ,  Kwanghee Lee

IPC: H01L29/786 ,  H01L29/417 ,  H01L29/16

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/1606

Abstract: A transistor includes an oxide semiconductor layer, a source electrode and a drain electrode disposed spaced apart from each other on the oxide semiconductor layer, a gate electrode spaced apart from the oxide semiconductor layer, a gate insulating layer disposed between the oxide semiconductor layer and the gate electrode, and a graphene layer disposed between the gate electrode and the gate insulating layer and doped with a metal.

公开(公告)号：US12170336B2

公开(公告)日：2024-12-17

申请号：US17540607

申请日：2021-12-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwanghee Lee ,  Sangwook Kim

IPC: H01L29/786 ,  H01L21/02 ,  H01L29/66

Abstract: The present disclosure relates to oxide semiconductor transistors, methods of manufacturing the same, and/or memory devices including the oxide semiconductor transistors. The oxide semiconductor transistor includes first and second compound layers provided on a substrate, a channel layer in contact with the first and second compound layers, a first electrode facing a portion of the channel layer, a second electrode facing the first compound layer with the channel layer therebetween, and a third electrode facing the second compound layer with the channel layer therebetween. An oxygen concentration of a region of the channel layer facing the first electrode is greater than that of the remaining regions of the channel layer. A buffer layer may further be provided between the channel layer and the second and third electrodes. The first and second compound layers may include oxygen and a metal.

公开(公告)号：US11824117B2

公开(公告)日：2023-11-21

申请号：US17308543

申请日：2021-05-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwanghee Lee ,  Sangwook Kim ,  Jinseong Heo

IPC: H01L29/78 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L29/78391 ,  H01L29/516 ,  H01L29/6684

Abstract: An oxide semiconductor transistor includes: an insulating substrate including a trench; a gate electrode in the trench; an oxide semiconductor layer on a surface of the insulating substrate, the surface exposed through the trench; and a ferroelectric layer between the gate electrode and the oxide semiconductor layer, wherein the oxide semiconductor layer may include a source region and a drain region which are on the insulating substrate outside the trench and are apart from each other with the gate electrode therebetween.