公开(公告)号：US20200006579A1

公开(公告)日：2020-01-02

申请号：US16396446

申请日：2019-04-26

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Mohammed Tanvir QUDDUS ,  Mihir MUDHOLKAR ,  Zia HOSSAIN

IPC: H01L29/872 ,  H01L29/06 ,  H01L29/40

Abstract: A semiconductor device structure includes a region of semiconductor material having an active region and a termination region. An active structure is disposed in the active region and a termination structure is disposed in the termination region. In one embodiment, the termination structure includes a termination trench and a conductive structure within the termination trench and electrically isolated from the region of semiconductor material by a dielectric structure. A dielectric layer is disposed to overlap the termination trench to provide the termination structure as a floating structure. A Schottky contact region is disposed within the active region. A conductive layer is electrically connected to the Schottky contact region and the first conductive layer extends onto a surface of the dielectric layer and laterally overlaps at least a portion of the termination trench.

公开(公告)号：US20210135019A1

公开(公告)日：2021-05-06

申请号：US17145607

申请日：2021-01-11

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Mohammed Tanvir QUDDUS ,  Mihir MUDHOLKAR ,  Zia HOSSAIN

IPC: H01L29/872 ,  H01L29/40 ,  H01L29/06 ,  H01L29/78

Abstract: A semiconductor device structure includes a region of semiconductor material having an active region and a termination region. An active structure is disposed in the active region and a termination structure is disposed in the termination region. In one embodiment, the termination structure includes a termination trench and a conductive structure within the termination trench and electrically isolated from the region of semiconductor material by a dielectric structure. A dielectric layer is disposed to overlap the termination trench to provide the termination structure as a floating structure. A Schottky contact region is disposed within the active region. A conductive layer is electrically connected to the Schottky contact region and the first conductive layer extends onto a surface of the dielectric layer and laterally overlaps at least a portion of the termination trench.

公开(公告)号：US20200006580A1

公开(公告)日：2020-01-02

申请号：US16529382

申请日：2019-08-01

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Mohammed Tanvir QUDDUS ,  Mihir MUDHOLKAR

IPC: H01L29/872 ,  H01L27/07 ,  H01L27/02 ,  H01L29/78

Abstract: A semiconductor device structure includes a region of semiconductor material having an active region and a termination region. An active structure is disposed in the active region and a termination structure is disposed in the termination region. In one embodiment, the termination structure includes a termination trench and a conductive structure within the termination trench and electrically isolated from the region of semiconductor material by a dielectric structure. A dielectric layer is disposed to overlap the termination trench to provide the termination structure as a floating structure. A Schottky contact region is disposed within the active region. A conductive layer is electrically connected to the Schottky contact region and the first conductive layer extends onto a surface of the dielectric layer and laterally overlaps at least a portion of the termination trench.

公开(公告)号：US20190326447A1

公开(公告)日：2019-10-24

申请号：US16456290

申请日：2019-06-28

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Mihir MUDHOLKAR ,  Mohammed T. QUDDUS ,  Ikhoon SHIN ,  Scott M. DONALDSON

IPC: H01L29/872 ,  H01L29/40 ,  H01L29/06 ,  H01L29/66

Abstract: A semiconductor device includes a region of semiconductor material having first and second opposing major surfaces. A trench structure includes a trench extending into the region of semiconductor material from the first major surface, wherein the first major surface defines a first horizontal plane in a cross-sectional view. The trench structure further includes a conductive material disposed within the trench and separated from the region of semiconductor material by a dielectric region. A Schottky contact region is disposed adjacent the first major surface on opposing sides of the trench structure, the Schottky contact region having an upper surface residing on a second horizontal plane in the cross-sectional view. The dielectric region comprises an uppermost surface and configured such that a major portion of the uppermost surface is disposed above the first horizontal plane in the cross-sectional view. The structure and method provide a semiconductor device with improved performance (e.g., reduced leakage and more stable breakdown voltage) and improved reliability.

公开(公告)号：US20190386153A1

公开(公告)日：2019-12-19

申请号：US16546049

申请日：2019-08-20

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Mohammed Tanvir QUDDUS ,  Mihir MUDHOLKAR ,  Michael THOMASON

IPC: H01L29/872 ,  H01L29/66

Abstract: A method of forming a semiconductor device includes providing a region of semiconductor material comprising a major surface. A termination trench is provided extending from a first portion of the major surface into the region of semiconductor material to a first depth and has a first width. A first active trench is provided extending from a second portion of the major surface into the region of semiconductor material to a second depth and has a second width less than the first width. A second active trench is provided extending from a third portion of the major surface into the region of semiconductor material to a third depth and has a third width less than the first width. A first conductive material is provided adjoining a fourth portion of the major surface, which is configured as a Schottky barrier. The selected trench depth difference alone or in combination with other features provides a semiconductor device having improved performance characteristics.

公开(公告)号：US20170076949A1

公开(公告)日：2017-03-16

申请号：US15358361

申请日：2016-11-22

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Michael THOMASON ,  Mohammed Tanvir QUDDUS ,  James MORGAN ,  Mihir MUDHOLKAR ,  Scott DONALDSON ,  Gordon M. GRIVNA

IPC: H01L21/285 ,  H01L29/47 ,  H01L29/872 ,  H01L29/66

CPC classification number: H01L21/28537 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28568 ,  H01L21/32134 ,  H01L21/324 ,  H01L21/76883 ,  H01L21/76889 ,  H01L29/401 ,  H01L29/47 ,  H01L29/475 ,  H01L29/66143 ,  H01L29/8725

Abstract: A number of variations may include a method that may include depositing a first layer on a first semiconductor layer in an overlying position with respect to at least one trench structure formed in the first semiconductor epi layer. The first layer may include a first metal and a second metal. A second layer may comprise a material constructed and arranged to scavenge semiconductor material migrating from the first semiconductor layer during annealing may be deposited over the first layer. The first semiconductor layer may be subjected to at least a first annealing act to provide a first structure. At least a portion of the first structure may be stripped to remove any of the first layer not reacted with the semiconductor material to form a Schottky barrier structure during the first annealing act.

Abstract translation: 许多变型可以包括一种方法，其可以包括相对于形成在第一半导体外延层中的至少一个沟槽结构，在覆盖位置的第一半导体层上沉积第一层。 第一层可以包括第一金属和第二金属。 第二层可以包括构造和布置为清除在退火期间从第一半导体层迁移的半导体材料的材料可以沉积在第一层上。 可以对第一半导体层进行至少第一退火处理以提供第一结构。 可以剥离第一结构的至少一部分以去除在半导体材料中未反应的任何第一层，以在第一退火行为期间形成肖特基势垒结构。

公开(公告)号：US20160322969A1

公开(公告)日：2016-11-03

申请号：US15133644

申请日：2016-04-20

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Prasad VENKATRAMAN ,  Peter MOENS ,  Mihir MUDHOLKAR ,  Joe FULTON ,  Philip CELAYA ,  Stephen ST. GERMAIN ,  Chun-Li LIU ,  Jason MCDONALD ,  Alexander YOUNG ,  Ali SALIH

IPC: H03K17/687 ,  H01L25/11 ,  H01L29/778

CPC classification number: H01L29/747 ,  H01L21/8258 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/40 ,  H01L25/115 ,  H01L25/18 ,  H01L27/0629 ,  H01L27/088 ,  H01L27/0883 ,  H01L29/205 ,  H01L29/404 ,  H01L29/4238 ,  H01L29/7416 ,  H01L29/742 ,  H01L29/7786 ,  H01L29/7787 ,  H01L2224/0603 ,  H01L2224/40245 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/73221 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2924/00014 ,  H03K17/6874 ,  H03K2017/6878 ,  H03K2217/0009 ,  H03K2217/0018 ,  H01L2224/37099

Abstract: A half-bridge circuit can include a high-side HEMT, a high-side switch transistor, a low-side HEMT, and a low-side switch transistor. The die substrates of the HEMTs can be coupled to the sources of their corresponding switch transistors. In another aspect, a packaged electronic device for a half-bridge circuit can have a design that can use shorter connectors that help to reduce parasitic inductance and resistance. In a further aspect, a packaged electronic device for a half-bridge circuit can include more than one connection along the bottom of the package allows less lead connections along the periphery of the packaged electronic device and can allow for a smaller package.

Abstract translation: 半桥电路可以包括高侧HEMT，高侧开关晶体管，低侧HEMT和低侧开关晶体管。 HEMT的管芯衬底可以耦合到其相应的开关晶体管的源极。 在另一方面，用于半桥电路的封装电子器件可以具有可以使用有助于减小寄生电感和电阻的较短连接器的设计。 在另一方面，用于半桥电路的封装电子设备可以包括沿着封装底部的多于一个的连接允许沿着封装的电子器件的周边的较少的引线连接并且可以允许较小的封装。

公开(公告)号：US20170288027A1

公开(公告)日：2017-10-05

申请号：US15627281

申请日：2017-06-19

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Mohammed Tanvir QUDDUS ,  Mihir MUDHOLKAR ,  Michael THOMASON

IPC: H01L29/36

CPC classification number: H01L29/8725 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/36 ,  H01L29/66143

Abstract: A method of forming a semiconductor includes a providing a termination trench and an active trench within a semiconductor layer. The active trench is configured to be at a shallower depth than the termination trench to provide a trench depth difference. The selected trench depth difference in combination with one or more of the dopant concentration of the semiconductor layer, the thickness of the semiconductor layer, active trench width to termination trench width, and/or dopant profile of the semiconductor layer provide a semiconductor device having improved performance characteristics.

公开(公告)号：US20160260845A1

公开(公告)日：2016-09-08

申请号：US14640242

申请日：2015-03-06

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Mohammed Tanvir QUDDUS ,  Mihir MUDHOLKAR ,  Michael THOMASON

IPC: H01L29/872 ,  H01L29/66

CPC classification number: H01L29/8725 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/36 ,  H01L29/66143

Abstract: In one embodiment, a trench Schottky rectifier includes a termination trench and active trenches provided in a semiconductor layer. A first active trench is configured to be at a shallower depth than the termination trench to provide a trench depth difference. A second active trench is configured to be at a depth similar to the termination trench. The selected trench depth difference in combination with one or more of the other second active trench depth, the dopant concentration of the semiconductor layer, the thickness of the semiconductor layer, first active trench width to termination trench width, and/or dopant profile of the semiconductor layer provide a semiconductor device having improved performance characteristics.

Abstract translation: 在一个实施例中，沟槽肖特基整流器包括端接沟槽和设置在半导体层中的有源沟槽。 第一有源沟槽被配置为处于比端接沟槽更浅的深度以提供沟槽深度差。 第二有源沟槽被配置为处于类似于端接沟槽的深度。 所选择的沟槽深度差与一个或多个另一个第二有源沟槽深度，半导体层的掺杂剂浓度，半导体层的厚度，第一有源沟槽宽度与终止沟槽宽度的一个或多个，和/或 半导体层提供具有改进的性能特性的半导体器件。

公开(公告)号：US20160260844A1

公开(公告)日：2016-09-08

申请号：US14640240

申请日：2015-03-06

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Mohammed Tanvir QUDDUS ,  Mihir MUDHOLKAR ,  Michael THOMASON

IPC: H01L29/872 ,  H01L29/66

CPC classification number: H01L29/8725 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/36 ,  H01L29/66143

Abstract: In one embodiment, a trench Schottky rectifier includes a termination trench and active trenches provided in a semiconductor layer. The active trenches are configured to be at a shallower depth than the termination trench to provide a trench depth difference. The selected trench depth difference in combination with one or more of the dopant concentration of the semiconductor layer, the thickness of the semiconductor layer, active trench width to termination trench width, and/or dopant profile of the semiconductor layer provide a semiconductor device having improved performance characteristics.

Abstract translation: 在一个实施例中，沟槽肖特基整流器包括端接沟槽和设置在半导体层中的有源沟槽。 有源沟槽配置成比端接沟槽更浅的深度以提供沟槽深度差。 选择的沟槽深度差与半导体层的掺杂剂浓度，半导体层的厚度，有源沟槽宽度与终止沟槽宽度的一个或多个以及/或半导体层的掺杂物分布结合提供了一种具有改进的半导体器件的半导体器件 性能特点。