公开(公告)号：US09287367B2

公开(公告)日：2016-03-15

申请号：US14526427

申请日：2014-10-28

Applicant: Seoul Viosys Co., Ltd.

Inventor： Woo Chul Kwak ,  Seung Kyu Choi ,  Chae Hon Kim ,  Jung Whan Jung ,  Yong Hyun Baek ,  Sam Seok Jang ,  Su Youn Hong ,  Mi Gyeong Jeong

IPC: H01L29/06 ,  H01L29/20 ,  H01L29/15 ,  H01L29/201 ,  H01L29/205 ,  H01L33/04 ,  H01L33/02 ,  H01L33/22

CPC classification number: H01L29/2003 ,  H01L21/02458 ,  H01L21/02513 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/0262 ,  H01L29/0607 ,  H01L29/155 ,  H01L29/201 ,  H01L29/205 ,  H01L33/02 ,  H01L33/025 ,  H01L33/04 ,  H01L33/20 ,  H01L33/22

Abstract: Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device includes: a first conductive type semiconductor layer including a first lower conductive type semiconductor layer and a first upper conductive type semiconductor layer; a V-pit passing through at least one portion of the first upper conductive type semiconductor layer; a second conductive type semiconductor layer placed over the first conductive type semiconductor and filling the V-pit; and an active layer interposed between the first and second conductive type semiconductor layers with the V-pit passing through the active layer. The first upper conductive type semiconductor layer has a higher defect density than the first lower conductive type semiconductor layer and includes a V-pit generation layer comprising a starting point of the V-pit. The semiconductor device includes the V-pits having a large size and a high density to efficiently preventing damage to the semiconductor device due to electrostatic discharge.

Abstract translation: 公开了半导体器件及其制造方法。 半导体器件包括：第一导电型半导体层，包括第一下导电型半导体层和第一上导电型半导体层; 通过所述第一上导电型半导体层的至少一部分的V凹坑; 放置在所述第一导电型半导体上并填充所述V坑的第二导电型半导体层; 以及插入在第一和第二导电类型半导体层之间的有源层，其中V坑穿过有源层。 第一上导电型半导体层具有比第一下导电型半导体层更高的缺陷密度，并且包括包含V坑的起点的V坑生成层。 半导体器件包括具有大尺寸和高密度的V型凹坑，以有效地防止由于静电放电对半导体器件的损坏。

公开(公告)号：US20180212102A1

公开(公告)日：2018-07-26

申请号：US15934589

申请日：2018-03-23

Applicant: SEOUL VIOSYS CO., LTD.

Inventor： Keum Ju Lee ,  Seom Geun Lee ,  Jun Ho Yun ,  Woo Chul Gwak ,  Sam Seok Jang

IPC: H01L33/24 ,  H01L33/42 ,  H01L33/62 ,  H01L33/54 ,  H01L33/10 ,  H01L33/00

CPC classification number: H01L33/24 ,  H01L33/007 ,  H01L33/10 ,  H01L33/20 ,  H01L33/38 ,  H01L33/42 ,  H01L33/54 ,  H01L33/62 ,  H01L2224/04042 ,  H01L2224/05012 ,  H01L2224/16245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49107 ,  H01L2924/1815 ,  H01L2924/00014

Abstract: A light emitting element comprises: a substrate including protrusions; and a light emitting structure located on the substrate. The protrusions are disposed in a honeycomb pattern and include a first protrusion and second to seventh protrusions which are adjacent to the first protrusion and spaced equidistant from the first protrusions. The angle between a first vector line extending in a direction from the center of the first protrusion toward the center of the second protrusion and a second vector line extending in a direction from the center of the first protrusion to the center of the fourth projection is 120° , the angle between the second vector line and the third vector line extending in a direction from the center of the first projection to the center of the sixth protrusion is 120.

公开(公告)号：US20160056334A1

公开(公告)日：2016-02-25

申请号：US14830651

申请日：2015-08-19

Applicant: SEOUL VIOSYS CO., LTD.

Inventor： Sam Seok Jang ,  Woo Chul Kwak ,  Kyung Hae Kim ,  Jung Whan Jung ,  Yong Hyun Baek

IPC: H01L33/14 ,  H01L33/00 ,  H01L33/06 ,  H01L33/32

CPC classification number: H01L33/145 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/06 ,  H01L33/14 ,  H01L33/325

Abstract: A light emitting device is provided to include an n-type semiconductor layer, a p-type semiconductor layer, an active layer, and an electron blocking layer disposed between the p-type semiconductor layer and the active layer. The p-type semiconductor layer includes a hole injection layer, a p-type contact layer, and a hole transport layer. The hole transport layer includes a plurality of undoped layers and at least one intermediate doped layer disposed between the undoped layers. At least one of the undoped layers includes a zone in which hole concentration decreases with increasing distance from the hole injection layer or the p-type contact layer, and the intermediate doped layer is disposed to be at least partially overlapped with a region of the hole transport layer, the region having the hole concentration of 62% to 87% of the hole concentration of the p-type contact layer.

Abstract translation: 提供发光器件以包括设置在p型半导体层和有源层之间的n型半导体层，p型半导体层，有源层和电子阻挡层。 p型半导体层包括空穴注入层，p型接触层和空穴传输层。 空穴传输层包括多个未掺杂层和设置在未掺杂层之间的至少一个中间掺杂层。 未掺杂层中的至少一个包括空穴浓度随着与空穴注入层或p型接触层的距离的增加而减小的区域，并且中间掺杂层被设置为至少部分地与孔的区域重叠 传输层，空穴浓度为p型接触层的空穴浓度的62％〜87％的区域。

公开(公告)号：US10361339B2

公开(公告)日：2019-07-23

申请号：US15526724

申请日：2015-11-12

Applicant: SEOUL VIOSYS CO., LTD.

Inventor： Jung Whan Jung ,  Kyung Hae Kim ,  Woo Chul Kwak ,  Sam Seok Jang

IPC: H01L33/00 ,  H01L33/12 ,  H01L33/06 ,  H01L33/20 ,  H01L33/22 ,  H01L33/32

Abstract: A light emitting device and a manufacturing method therefor are disclosed. The light emitting device comprises: a patterned sapphire substrate (PSS) including a plurality of concave parts and protruding parts on the upper surface thereof; a buffer layer including a concave part buffer layer, which is positioned on the concave part, and a protruding part buffer layer, which is positioned on the side surface of the protruding part and dispersed and arranged in a plurality of island shapes; a lower nitride layer positioned on the buffer layer and the PSS and covering the protruding part; a void positioned on an interface between the side surface of the protruding part and the lower nitride layer; a first conductive type semiconductor layer positioned on the lower nitride layer; a second conductive type semiconductor layer positioned on the first conductive type semiconductor layer; and an active layer interposed between the first and second conductive type semiconductor layers.

公开(公告)号：US09799800B2

公开(公告)日：2017-10-24

申请号：US14830651

申请日：2015-08-19

Applicant: Seoul Viosys Co., Ltd.

Inventor： Sam Seok Jang ,  Woo Chul Kwak ,  Kyung Hae Kim ,  Jung Whan Jung ,  Yong Hyun Baek

IPC: H01L33/14 ,  H01L33/00 ,  H01L33/32 ,  H01L33/06

CPC classification number: H01L33/145 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/06 ,  H01L33/14 ,  H01L33/325

Abstract: A light emitting device is provided to include an n-type semiconductor layer, a p-type semiconductor layer, an active layer, and an electron blocking layer disposed between the p-type semiconductor layer and the active layer. The p-type semiconductor layer includes a hole injection layer, a p-type contact layer, and a hole transport layer. The hole transport layer includes a plurality of undoped layers and at least one intermediate doped layer disposed between the undoped layers. At least one of the undoped layers includes a zone in which hole concentration decreases with increasing distance from the hole injection layer or the p-type contact layer, and the intermediate doped layer is disposed to be at least partially overlapped with a region of the hole transport layer, the region having the hole concentration of 62% to 87% of the hole concentration of the p-type contact layer.

公开(公告)号：US20180047871A1

公开(公告)日：2018-02-15

申请号：US15526724

申请日：2015-11-12

Applicant: SEOUL VIOSYS CO., LTD.

Inventor： Jung Whan Jung ,  Kyung Hae Kim ,  Woo chul Kwak ,  Sam Seok Jang

IPC: H01L33/12 ,  H01L33/32 ,  H01L33/20 ,  H01L33/00 ,  H01L33/06

CPC classification number: H01L33/12 ,  H01L33/007 ,  H01L33/06 ,  H01L33/20 ,  H01L33/22 ,  H01L33/32

Abstract: A light emitting device and a manufacturing method therefor are disclosed. The light emitting device comprises: a patterned sapphire substrate (PSS) including a plurality of concave parts and protruding parts on the upper surface thereof; a buffer layer including a concave part buffer layer, which is positioned on the concave part, and a protruding part buffer layer, which is positioned on the side surface of the protruding part and dispersed and arranged in a plurality of island shapes; a lower nitride layer positioned on the buffer layer and the PSS and covering the protruding part; a void positioned on an interface between the side surface of the protruding part and the lower nitride layer; a first conductive type semiconductor layer positioned on the lower nitride layer; a second conductive type semiconductor layer positioned on the first conductive type semiconductor layer; and an active layer interposed between the first and second conductive type semiconductor layers.

公开(公告)号：US20150115223A1

公开(公告)日：2015-04-30

申请号：US14526427

申请日：2014-10-28

Applicant: Seoul Viosys Co., Ltd.

Inventor： Woo Chul Kwak ,  Seung Kyu Choi ,  Chae Hon Kim ,  Jung Whan Jung ,  Yong Hyun Baek ,  Sam Seok Jang ,  Su Youn Hong ,  Mi Gyeong Jeong

IPC: H01L29/20 ,  H01L29/205 ,  H01L29/15 ,  H01L29/201

CPC classification number: H01L29/2003 ,  H01L21/02458 ,  H01L21/02513 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/0262 ,  H01L29/0607 ,  H01L29/155 ,  H01L29/201 ,  H01L29/205 ,  H01L33/02 ,  H01L33/025 ,  H01L33/04 ,  H01L33/20 ,  H01L33/22

Abstract: Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device includes: a first conductive type semiconductor layer including a first lower conductive type semiconductor layer and a first upper conductive type semiconductor layer; a V-pit passing through at least one portion of the first upper conductive type semiconductor layer; a second conductive type semiconductor layer placed over the first conductive type semiconductor and filling the V-pit; and an active layer interposed between the first and second conductive type semiconductor layers with the V-pit passing through the active layer. The first upper conductive type semiconductor layer has a higher defect density than the first lower conductive type semiconductor layer and includes a V-pit generation layer comprising a starting point of the V-pit. The semiconductor device includes the V-pits having a large size and a high density to efficiently preventing damage to the semiconductor device due to electrostatic discharge.

Abstract translation: 公开了半导体器件及其制造方法。 半导体器件包括：第一导电型半导体层，包括第一下导电型半导体层和第一上导电型半导体层; 通过所述第一上导电型半导体层的至少一部分的V凹坑; 放置在所述第一导电型半导体上并填充所述V坑的第二导电型半导体层; 以及插入在第一和第二导电类型半导体层之间的有源层，其中V坑穿过有源层。 第一上导电型半导体层具有比第一下导电型半导体层更高的缺陷密度，并且包括包含V坑的起点的V坑生成层。 半导体器件包括具有大尺寸和高密度的V型凹坑，以有效地防止由于静电放电对半导体器件的损坏。

公开(公告)号：US20150091047A1

公开(公告)日：2015-04-02

申请号：US14500836

申请日：2014-09-29

Applicant: Seoul Viosys Co., Ltd.

Inventor： Seung Kyu Choi ,  Woo Chul Kwak ,  Chae Hon Kim ,  Jung Whan Jung ,  Sam Seok Jang

IPC: H01L33/00 ,  H01L33/32 ,  H01L33/02

Abstract: Disclosed are a method of growing a nitride semiconductor, a method of manufacturing a template for semiconductor fabrication and a method of manufacturing a semiconductor light emitting device using the same. The method of manufacturing a semiconductor light emitting device includes: preparing a growth substrate having a defect aggregation region; growing a first nitride semiconductor layer over the growth substrate; growing a second nitride semiconductor layer over the first nitride semiconductor layer; growing a third nitride semiconductor layer over the second nitride semiconductor layer; growing an active layer over the third nitride semiconductor layer; and forming a second conductive type semiconductor layer over the active layer. Accordingly, semiconductor layers grown on the template can have excellent crystallinity.

Abstract translation: 公开了一种生长氮化物半导体的方法，制造用于半导体制造的模板的方法以及使用其制造半导体发光器件的方法。 制造半导体发光器件的方法包括：制备具有缺陷聚集区域的生长衬底; 在生长衬底上生长第一氮化物半导体层; 在所述第一氮化物半导体层上生长第二氮化物半导体层; 在所述第二氮化物半导体层上生长第三氮化物半导体层; 在第三氮化物半导体层上生长活性层; 以及在所述有源层上形成第二导电类型半导体层。 因此，在模板上生长的半导体层可以具有优异的结晶度。