公开(公告)号：US20170162602A1

公开(公告)日：2017-06-08

申请号：US15039118

申请日：2014-08-26

Applicant: Sharp Kabushiki Kaisha

Inventor： Takao SAITOH ,  Seiji KANEKO ,  Yohsuke KANZAKI ,  Yutaka TAKAMARU ,  Keisuke IDE ,  Takuya MATSUO ,  Shigeyasu MORI ,  Hiroshi MATSUKIZONO

IPC: H01L27/12 ,  H01L29/24 ,  H01L29/04 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/04 ,  H01L29/24 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

Abstract: A semiconductor device (100) includes, on a substrate, a plurality of oxide semiconductor TFTs including a first gate electrode (12), a first insulating layer (20) which is in contact with the first gate electrode, an oxide semiconductor layer (16) arranged so as to oppose the first gate electrode via the first insulating layer, and a source electrode (14) and a drain electrode (15) which are connected with the oxide semiconductor layer, and an organic insulating layer (24) covering only some of the plurality of oxide semiconductor TFTs, wherein the plurality of oxide semiconductor TFTs include a first TFT (5A) which is covered with the organic insulating layer and a second TFT (5B) which is not covered with the organic insulating layer, and the second TFT includes a second gate electrode (17) arranged so as to oppose the oxide semiconductor layer via a second insulating layer (22), when viewed in a direction normal to the substrate, the second gate electrode (17) being arranged so as to overlap with at least part of the first gate electrode with the oxide semiconductor layer interposed therebetween.

公开(公告)号：US20170139056A1

公开(公告)日：2017-05-18

申请号：US15321127

申请日：2015-06-22

Applicant: Sharp Kabushiki Kaisha

Inventor： Kazuhide TOMIYASU ,  Shigeyasu MORI

IPC: G01T1/20 ,  H04N5/361 ,  H04N5/378 ,  H01L27/146 ,  H04N5/32

CPC classification number: G01T1/20 ,  G01T1/247 ,  H01L27/14612 ,  H01L27/14636 ,  H01L27/14663 ,  H04N5/32 ,  H04N5/361 ,  H04N5/378

Abstract: A second insulating film is disposed so as to cover a conversion element that includes a first insulating film, photodiode, and electrode. The second insulating film is made of a SiNxOy material, where x is greater than 0 and y is greater than or equal to 0. This makes it possible to provide a TFT and photodiode with excellent anti-moisture characteristics.

公开(公告)号：US20170148843A1

公开(公告)日：2017-05-25

申请号：US15320712

申请日：2015-06-25

Applicant: Sharp Kabushiki Kaisha

Inventor： Shigeyasu MORI ,  Kazuhide TOMIYASU

IPC: H01L27/146 ,  G01T1/20 ,  H04N5/32 ,  G01N23/04

CPC classification number: H01L27/14663 ,  A61B6/4233 ,  G01N23/04 ,  G01T1/20 ,  H01L27/14614 ,  H01L27/14632 ,  H04N5/32

Abstract: An aim of the present invention is to improve the conversion efficiency of scintillation light into electric charge by a photoelectric conversion element in an imaging panel of an X-ray imaging system using an indirection conversion scheme. An imaging panel generates images based on scintillation light acquired from X-rays that have passed through a specimen. The imaging panel includes a substrate, thin film transistor, photoelectric conversion element, and reflective layer. The thin film transistor is formed on the substrate. The photoelectric conversion element is connected to the thin film transistor and converts incident scintillation light into electric charge. The entirety of a region of a light-receiving surface of the photoelectric conversion element where the scintillation light is incident overlaps the reflective layer as seen from the incident direction of the scintillation light. The reflective layer may be the drain electrode. Alternatively, the reflective layer may be a reflective electrode that is formed in the same layer as a gate electrode.

公开(公告)号：US20170139057A1

公开(公告)日：2017-05-18

申请号：US15322207

申请日：2015-06-25

Applicant: SHARP KABUSHIKI KAISHA

Inventor： Shigeyasu MORI ,  Kazuhide TOMIYASU

IPC: G01T1/20 ,  H01L29/24 ,  H01L29/786 ,  G01N23/04 ,  H01L27/146

CPC classification number: G01T1/2018 ,  G01N23/04 ,  G01N2223/505 ,  G01T1/20 ,  H01L27/1225 ,  H01L27/144 ,  H01L27/146 ,  H01L27/14605 ,  H01L27/14609 ,  H01L27/14612 ,  H01L27/14663 ,  H01L29/24 ,  H01L29/7869 ,  H04N5/32

Abstract: An X-ray image pickup system (10) includes an X-ray source (16), an image pickup panel (12), a scintillator (13), and an X-ray control unit (14E). The image pickup panel includes a photoelectric conversion element (26), a capacitor (50), a thin film transistor (24), and TFT control units (14A, 14B, 14F). To the photoelectric conversion element (26), scintillation light is projected. The capacitor (50) is connected to the photoelectric conversion element (26), and accumulates charges. The thin film transistor (24) is connected to the capacitor (50). The TFT control units (14A, 14B, 14F) control an operation of the thin film transistor (24). The thin film transistor (24) includes a semiconductor active layer (32) made of an oxide semiconductor. The X-ray control unit (14E) intermittently projects X-ray to the X-ray source (16). The TFT control units (14A, 14B, 14F) cause the thin film transistor (24) to operate when the X-ray is not projected, so as to read out the charges accumulated in the capacitor (50).

公开(公告)号：US20170092673A1

公开(公告)日：2017-03-30

申请号：US15126821

申请日：2015-03-19

Applicant: Sharp Kabushiki Kaisha

Inventor： Tadayoshi MIYAMOTO ,  Kazuhide TOMIYASU ,  Atsushi TOMYO ,  Kazuatsu ITO ,  Shigeyasu MORI

IPC: H01L27/146

CPC classification number: H01L27/14614 ,  G01J1/02 ,  H01L27/1225 ,  H01L27/14603 ,  H01L27/14609 ,  H01L27/14616 ,  H01L27/14658 ,  H01L27/14663 ,  H01L27/14692 ,  H01L29/24 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A light detection device includes: a TFT having a semiconductor layer supported on a substrate, a source electrode, a drain electrode, and a gate electrode; a photodiode having a bottom electrode electrically connected to the drain electrode, a semiconductor laminate structure, and a top electrode; and an electrode made of the same conductive film as the bottom electrode and arranged on the semiconductor layer with an insulating layer interposed therebetween.

公开(公告)号：US20180138594A1

公开(公告)日：2018-05-17

申请号：US15553376

申请日：2016-10-14

Applicant: Sharp Kabushiki Kaisha

Inventor： Takatoshi ORUI ,  Shigeyasu MORI ,  Makoto NAKAZAWA ,  Fumiki NAKANO ,  Kiyoshi MINOURA

IPC: H01Q3/44 ,  H01Q13/10 ,  H01L27/12 ,  H01L23/66

CPC classification number: H01Q3/44 ,  H01L23/66 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1262 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/7869 ,  H01L2223/6677 ,  H01Q3/34 ,  H01Q13/10 ,  H01Q21/0012 ,  H01Q21/064 ,  H01Q21/20 ,  H01Q21/24

Abstract: A scanned antenna (1000) is a scanned antenna including antenna elements (U) arranged together, the scanned antenna comprising: a TFT substrate including a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including a second dielectric substrate (51), and a slot electrode (55) formed on a first primary surface of the second dielectric substrate; a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65) arranged so as to oppose a second primary surface of the second dielectric substrate (51) with a dielectric layer (54) interposed therebetween, the second primary surface being on an opposite side from the first primary surface. The TFT substrate (TFT substrate portion (101Cb)) includes a terminal region (TR) outside of the seal portion (73), and the gate bus lines or the source bus lines are connected to gate terminal portions or source terminal portions formed in the terminal region via a transparent conductive layer (14b) provided between the seal portion (73) and the TFT substrate.

公开(公告)号：US20170160403A1

公开(公告)日：2017-06-08

申请号：US15320682

申请日：2015-06-25

Applicant: Sharp Kabushiki Kaisha

Inventor： Kazuhide TOMIYASU ,  Shigeyasu MORI

IPC: G01T1/20 ,  H04N5/374 ,  H01L31/10 ,  H04N5/32 ,  A61B6/00 ,  H01L27/144

CPC classification number: G01T1/20 ,  A61B6/00 ,  A61B6/4233 ,  H01L27/1225 ,  H01L27/144 ,  H01L27/14603 ,  H01L27/14612 ,  H01L27/14663 ,  H01L31/10 ,  H04N5/32 ,  H04N5/374

Abstract: An aim of the present invention is to provide a technology to inhibit degradation phenomena of TFTs in an imaging panel having such TFTs in each pixel. The imaging panel captures scintillation light, which are X-rays that have passed through a specimen and been converted by a scintillator. The imaging panel includes a plurality of gate lines and a plurality of data lines. The imaging panel includes a conversion element that converts scintillation light to electric charge, a thin film transistor connected to the gate line, data line, and conversion element, and a metal wiring line connecting to the conversion element and supplying a bias voltage to the conversion element. The metal wiring line is positioned approximately parallel to the data line so as to overlap the top of the thin film transistor.

公开(公告)号：US20170131413A1

公开(公告)日：2017-05-11

申请号：US15321129

申请日：2015-06-25

Applicant: Sharp Kabushiki Kaisha

Inventor： Kazuhide TOMIYASU ,  Shigeyasu MORI

IPC: G01T1/20 ,  G01N23/04 ,  H04N5/32 ,  H01L29/786 ,  H01L29/04 ,  G01T1/24 ,  H01L27/146

CPC classification number: G01T1/20 ,  A61B6/4208 ,  G01N23/04 ,  G01T1/247 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/144 ,  H01L27/146 ,  H01L27/14612 ,  H01L27/14636 ,  H01L27/14663 ,  H01L29/04 ,  H01L29/7869 ,  H01L31/10 ,  H04N5/32

Abstract: Provided is a technique that reduces patterning defects of data lines in an imaging panel and drain electrodes in thin film transistors without lowering the aperture ratio of the imaging panel. The imaging panel captures scintillation light, which are X-rays that have passed through a specimen and been converted by a scintillator. The imaging panel includes a plurality of gate lines 11 and a plurality of data lines 12. The imaging panel includes, in each of the pixels 13, a conversion element 15 that converts scintillation light to electric charge, and a thin film transistor 14 connected to the gate line 11, data line 12, and conversion element 15. A drain electrode 144 of the thin film transistor 14 is formed such that edges 144E1 and 144E2 of the drain electrode 144 near the data line 12 are more inside the pixel 13 than edges 15E1 and 15E2 of the conversion element 15 near the data line 12.

公开(公告)号：US20180337446A1

公开(公告)日：2018-11-22

申请号：US15542488

申请日：2016-10-06

Applicant: Sharp Kabushiki Kaisha

Inventor： Makoto NAKAZAWA ,  Takatoshi ORUI ,  Shigeyasu MORI ,  Fumiki NAKANO ,  Kiyoshi MINOURA

IPC: H01Q1/38 ,  H01Q21/06 ,  H01Q21/00 ,  H01Q1/24 ,  H01L23/34 ,  H01L23/66 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01Q1/38 ,  G09G3/3614 ,  G09G3/3648 ,  H01L23/345 ,  H01L23/66 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1259 ,  H01L29/786 ,  H01L29/78669 ,  H01L29/7869 ,  H01L2223/6677 ,  H01Q1/241 ,  H01Q3/34 ,  H01Q3/44 ,  H01Q21/0012 ,  H01Q21/0087 ,  H01Q21/064

Abstract: A TFT substrate (101) including a plurality of antenna element regions (U) arranged on a dielectric substrate (1), the TFT substrate including a transmitting/receiving region including a plurality of antenna element regions, and a non-transmitting/receiving region located outside of the transmitting/receiving region, each of the plurality of antenna element regions (U) including: a thin film transistor (10); a first insulating layer (11) covering the thin film transistor and having a first opening (CH1) which exposes a drain electrode (7D) of the thin film transistor (10); and a patch electrode (15) formed on the first insulating layer (11) and in the first opening (CH1), and electrically connected to the drain electrode (7D) of the thin film transistor, wherein the patch electrode (15) includes a metal layer, and a thickness of the metal layer is greater than a thickness of a source electrode (7S) and the drain electrode (7D) of the thin film transistor.

公开(公告)号：US20170154916A1

公开(公告)日：2017-06-01

申请号：US15321142

申请日：2015-06-25

Applicant: Sharp Kabushiki Kaisha

Inventor： Shigeyasu MORI ,  Kazuhide TOMIYASU

IPC: H01L27/146 ,  G01T1/20 ,  H04N5/32 ,  A61B6/00

CPC classification number: H01L27/14663 ,  A61B6/4216 ,  A61B6/4233 ,  G01T1/20 ,  H01L27/14614 ,  H01L27/14632 ,  H01L27/14687 ,  H04N5/32 ,  H04N5/359

Abstract: An aim of the present invention is to make it possible to achieve stable operation of thin film transistors in an imaging panel of an X-ray imaging system that uses an indirect conversion scheme. An imaging panel includes a substrate, thin film transistor, photoelectric conversion element, and bias wiring line. The thin film transistor is formed on the substrate. The photoelectric conversion element is connected to the thin film transistor and irradiated by scintillation light. The bias wiring line is connected to the photoelectric conversion element and applies a reverse bias voltage to the photoelectric conversion element. The thin film transistor includes a semiconductor active layer and a gate electrode. The gate electrode is formed between the substrate and semiconductor active layer. The bias wiring line includes a portion that overlaps the gate electrode and semiconductor active layer as seen from the radiation direction of the scintillation light.