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1.发明申请公开(公告)号：US20140353775A1
公开(公告)日：2014-12-04
申请号：US14288130
申请日：2014-05-27
Applicant: STMicroelectronics S.r.l. , STMicroelectronics (Malta) Ltd
Inventor： Kevin Formosa , Luca Maggi
CPC classification number: B81B7/007 , B81B3/0094 , B81B2207/012 , B81B2207/07 , B81B2207/095 , B81B2207/097 , B81C1/00238 , B81C1/00301 , B81C2203/00 , B81C2203/0136 , B81C2203/0792 , H01L21/561 , H01L23/3114 , H01L24/73 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L29/84 , H01L2224/16145 , H01L2224/32145 , H01L2224/48145 , H01L2224/73265 , H01L2224/81005 , H01L2224/94 , H01L2224/97 , H01L2225/06506 , H01L2225/06513 , H01L2225/06524 , H01L2225/06548 , H01L2924/12042 , H01L2924/181 , H01L2224/85 , H01L2224/83 , H01L2224/81 , H01L2924/00012 , H01L2924/00
Abstract: A wafer-level packaging, comprising: a first semiconductor body integrating a MEMS structure; a second semiconductor body, including a surface electrical-contact region and an ASIC coupled to the MEMS structure and to said electrical-contact region; a first coating layer, made of resin, which englobes and protects the first body, the second body, and the electrical-contact region; at least one first conductive through via, which extends through the first coating layer in an area corresponding, and electrically coupled, to the first electrical-contact region; an electrical-contact pad, which extends over the first coating layer, electrically coupled to the first conductive through via; a third semiconductor body, integrating an electronic circuit, glued on the first coating layer; a second coating layer, made of resin, which englobes and protects the third body; at least one second conductive through via, which extends completely through the second coating layer in an area corresponding, and electrically coupled, to the electrical-contact pad; and a further electrical-contact pad electrically coupled to the second conductive through via.
Abstract translation: 一种晶片级封装，包括：集成MEMS结构的第一半导体本体; 包括表面电接触区域和耦合到所述MEMS结构和所述电接触区域的ASIC的第二半导体本体; 由树脂制成的第一涂层，其包围并保护第一主体，第二主体和电接触区域; 至少一个第一导电通孔，其在与第一电接触区域对应并电耦合的区域中延伸穿过第一涂层; 电接触焊盘，其在所述第一涂层上延伸，电耦合到所述第一导电通孔; 第三半导体本体，集成在第一涂层上的电子电路; 由树脂制成的第二涂层，其缠绕并保护第三体; 至少一个第二导电通孔，其在对应于并电耦合到所述电接触焊盘的区域中完全延伸穿过所述第二涂层; 以及电耦合到第二导电通孔的另一个电接触焊盘。
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公开(公告)号：US11524892B2
公开(公告)日：2022-12-13
申请号：US16834042
申请日：2020-03-30
Applicant: STMicroelectronics (Malta) Ltd , STMicroelectronics S.r.l.
Inventor： Kevin Formosa , Marco Del Sarto
Abstract: A first electronic component, such as a sensor having opposed first and second surfaces and a first thickness, is arranged on a support member with the second surface facing towards the support member. A second electronic component, such as an integrated circuit mounted on a substrate and having a second thickness less than the first thickness, is arranged on the support member with a substrate surface opposed the second electronic component facing towards the support member. A package molding material is molded onto the support member to encapsulate the second electronic component while leaving exposed the first surface of the first electronic component. The support member is then removed to expose the second surface of the first electronic component and the substrate surface of the substrate.
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公开(公告)号：US12017910B2
公开(公告)日：2024-06-25
申请号：US18079704
申请日：2022-12-12
Applicant: STMicroelectronics (MALTA) Ltd , STMicroelectronics S.r.l.
Inventor： Kevin Formosa , Marco Del Sarto
CPC classification number: B81C1/00333 , B81B7/0077 , B81B2201/0264 , B81B2207/012 , B81B2207/07 , B81C2203/0154 , B81C2203/0792
Abstract: A first electronic component, such as a sensor having opposed first and second surfaces and a first thickness, is arranged on a support member with the second surface facing towards the support member. A second electronic component, such as an integrated circuit mounted on a substrate and having a second thickness less than the first thickness, is arranged on the support member with a substrate surface opposed the second electronic component facing towards the support member. A package molding material is molded onto the support member to encapsulate the second electronic component while leaving exposed the first surface of the first electronic component. The support member is then removed to expose the second surface of the first electronic component and the substrate surface of the substrate.
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公开(公告)号：US10225635B2
公开(公告)日：2019-03-05
申请号：US15143207
申请日：2016-04-29
Applicant: STMICROELECTRONICS S.R.L. , STMICROELECTRONICS (MALTA) LTD
Inventor： Roberto Brioschi , Alex Gritti , Kevin Formosa , Paul Anthony Barbara
Abstract: A microelectromechanical microphone includes: a substrate; a sensor chip, integrating a microelectromechanical electroacoustic transducer; and a control chip operatively coupled to the sensor chip. In one embodiment, the sensor chip and the control chip are bonded to the substrate, and the sensor chip overlies, or at least partially overlies, the control chip. In another embodiment, the sensor is bonded to the substrate and a barrier is located around at least a portion of the sensor chip.
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5.发明授权公开(公告)号：US09446943B2
公开(公告)日：2016-09-20
申请号：US14288130
申请日：2014-05-27
Applicant: STMicroelectronics S.r.l. , STMicroelectronics (Malta) Ltd
Inventor： Kevin Formosa , Luca Maggi
IPC: H01L29/84 , B81B7/00 , H01L25/065 , H01L25/00 , B81B3/00 , B81C1/00 , H01L23/00 , H01L23/31 , H01L21/56
CPC classification number: B81B7/007 , B81B3/0094 , B81B2207/012 , B81B2207/07 , B81B2207/095 , B81B2207/097 , B81C1/00238 , B81C1/00301 , B81C2203/00 , B81C2203/0136 , B81C2203/0792 , H01L21/561 , H01L23/3114 , H01L24/73 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L29/84 , H01L2224/16145 , H01L2224/32145 , H01L2224/48145 , H01L2224/73265 , H01L2224/81005 , H01L2224/94 , H01L2224/97 , H01L2225/06506 , H01L2225/06513 , H01L2225/06524 , H01L2225/06548 , H01L2924/12042 , H01L2924/181 , H01L2224/85 , H01L2224/83 , H01L2224/81 , H01L2924/00012 , H01L2924/00
Abstract: A wafer-level packaging, comprising: a first semiconductor body integrating a MEMS structure; a second semiconductor body, including a surface electrical-contact region and an ASIC coupled to the MEMS structure and to said electrical-contact region; a first coating layer, made of resin, which englobes and protects the first body, the second body, and the electrical-contact region; at least one first conductive through via, which extends through the first coating layer in an area corresponding, and electrically coupled, to the first electrical-contact region; an electrical-contact pad, which extends over the first coating layer, electrically coupled to the first conductive through via; a third semiconductor body, integrating an electronic circuit, glued on the first coating layer; a second coating layer, made of resin, which englobes and protects the third body; at least one second conductive through via, which extends completely through the second coating layer in an area corresponding, and electrically coupled, to the electrical-contact pad; and a further electrical-contact pad electrically coupled to the second conductive through via.
Abstract translation: 一种晶片级封装，包括：集成MEMS结构的第一半导体本体; 包括表面电接触区域和耦合到所述MEMS结构和所述电接触区域的ASIC的第二半导体本体; 由树脂制成的第一涂层，其包围并保护第一主体，第二主体和电接触区域; 至少一个第一导电通孔，其在与第一电接触区域对应并电耦合的区域中延伸穿过第一涂层; 电接触焊盘，其在所述第一涂层上延伸，电耦合到所述第一导电通孔; 第三半导体本体，集成在第一涂层上的电子电路; 由树脂制成的第二涂层，其缠绕并保护第三体; 至少一个第二导电通孔，其在对应于并电耦合到所述电接触焊盘的区域中完全延伸穿过所述第二涂层; 以及电耦合到第二导电通孔的另一个电接触焊盘。
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Patent Agency Ranking
公开(公告)号：US10329143B2
公开(公告)日：2019-06-25
申请号：US14977465
申请日：2015-12-21
Applicant: STMicroelectronics (Malta) Ltd
Inventor： Kevin Formosa
Abstract: A packaged MEMS device, wherein at least two support structures are stacked on each other and are formed both by a support layer and a wall layer coupled to each other and delimiting a respective chamber. The chamber of the first support structure is upwardly delimited by the support layer of the second support structure. A first and a second dice are accommodated in a respective chamber, carried by the respective support layer of the first support structure. The support layer of the second support structure has a through hole allowing wire connections to directly couple the first and the second dice. A lid substrate, coupled to the second support structure, closes the chamber of the second support structure.
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7.发明申请METHOD OF MANUFACTURING ELECTRONIC COMPONENTS AND CORRESPONDING ELECTRONIC COMPONENT 审中-公开电子元件制造方法与电子元件的对应公开(公告)号：US20160368098A1
公开(公告)日：2016-12-22
申请号：US15135047
申请日：2016-04-21
Applicant: STMicroelectronics (Malta) Ltd
Inventor： Kenneth Fonk , Kevin Formosa
IPC: B23K26/359 , B23K26/351 , B23K26/00
CPC classification number: B23K26/359 , B23K26/0006 , B23K26/351 , H01L23/3121 , H01L23/544 , H01L23/552 , H01L2223/54406 , H01L2223/54433 , H01L2223/54486 , H01L2224/04042 , H01L2224/291 , H01L2224/2919 , H01L2224/32225 , H01L2224/32245 , H01L2224/73215 , H01L2224/73265 , H01L2924/1433 , H01L2924/1461 , H01L2924/37001 , H01L2924/014 , H01L2224/48227 , H01L2924/00012
Abstract: An electronic component includes one or more circuits having a front surface and a light-permeable package material. A lid member is attached to a front surface of the circuit. The lid member is made, for example, of a light-blocking material such as a semiconductor or metal material. A laser marking is applied onto the lid member.
Abstract translation: 电子部件包括具有前表面和透光包装材料的一个或多个电路。 盖构件附接到电路的前表面。 盖构件例如由诸如半导体或金属材料的遮光材料制成。 激光打标被施加到盖部件上。
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公开(公告)号：US20160107884A1
公开(公告)日：2016-04-21
申请号：US14977465
申请日：2015-12-21
Applicant: STMicroelectronics (Malta) Ltd
Inventor： Kevin Formosa
CPC classification number: B81B7/0074 , B81B7/0061 , B81B2201/0257 , B81B2207/012 , B81C1/00309 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/4824 , H04R19/005 , H04R19/04 , H04R31/00 , H04R2201/003 , H01L2924/00014
Abstract: A packaged MEMS device, wherein at least two support structures are stacked on each other and are formed both by a support layer and a wall layer coupled to each other and delimiting a respective chamber. The chamber of the first support structure is upwardly delimited by the support layer of the second support structure. A first and a second dice are accommodated in a respective chamber, carried by the respective support layer of the first support structure. The support layer of the second support structure has a through hole allowing wire connections to directly couple the first and the second dice. A lid substrate, coupled to the second support structure, closes the chamber of the second support structure.
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9.发明申请SURFACE MOUNT PACKAGE FOR A SEMICONDUCTOR INTEGRATED DEVICE, RELATED ASSEMBLY AND MANUFACTURING PROCESS 有权半导体集成器件的表面安装封装，相关装配和制造工艺公开(公告)号：US20140091443A1
公开(公告)日：2014-04-03
申请号：US14032075
申请日：2013-09-19
Applicant: STMicroelectronics Pte Ltd , STMicroelectronics (Malta) Ltd
Inventor： Roseanne Duca , Kim-Yong Goh , Xueren Zhang , Kevin Formosa
IPC: H01L23/495 , H01L21/56
CPC classification number: H01L23/49541 , G01P1/023 , H01L21/56 , H01L21/565 , H01L23/3107 , H01L2224/45147 , H01L2224/48247 , H01L2924/00011 , H01L2924/00014 , H01L2924/1461 , H01L2924/1815 , H05K3/303 , H05K3/3421 , H05K2201/09781 , Y02P70/613 , H01L2924/00 , H01L2924/01005 , H01L2224/45099
Abstract: A surface mount package of a semiconductor device, has: an encapsulation, housing at least one die including semiconductor material; and electrical contact leads, protruding from the encapsulation to be electrically coupled to contact pads of a circuit board; the encapsulation has a main face designed to face a top surface of the circuit board, which is provided with coupling features designed for mechanical coupling to the circuit board to increase a resonant frequency of the mounted package. The coupling features envisage at least a first coupling recess defined within the encapsulation starting from the main face, designed to be engaged by a corresponding coupling element fixed to the circuit board, thereby restricting movements of the mounted package.
Abstract translation: 半导体器件的表面贴装封装具有：封装，容纳至少一个包含半导体材料的管芯; 以及电接触引线，从封装凸出以电耦合到电路板的接触焊盘; 封装具有设计成面向电路板的顶表面的主面，该主面具有设计成用于机械耦合到电路板的耦合特征，以增加安装封装的谐振频率。 耦合特征设想至少一个第一耦合凹槽，其限定在从主面开始的封装内，被设计成由固定到电路板的对应耦合元件接合，从而限制安装的封装的移动。
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公开(公告)号：US11352251B2
公开(公告)日：2022-06-07
申请号：US16831302
申请日：2020-03-26
Applicant: STMicroelectronics (Malta) Ltd
Inventor： Kevin Formosa , Eftal Saribas
Abstract: An electronic integrated circuit (IC) component is mounted to a substrate. A cap member is applied onto the substrate and covers the electronic IC component. The cap member includes an outer wall defining an opening and an inner wall surrounding the electronic IC component. The inner wall extends from a proximal end at the substrate towards a distal end facing the opening in the outer wall to provide a reception chamber for the electronic IC component and a peripheral chamber between the inner wall and the outer wall of the cap member. An encapsulant material is provided in the reception chamber to seal the electronic IC component without being present in the peripheral chamber.
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