公开(公告)号：US20060267018A1

公开(公告)日：2006-11-30

申请号：US11462886

申请日：2006-08-07

申请人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hisashi OHTANI

发明人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hisashi OHTANI

IPC分类号： H01L29/76

CPC分类号： H01L29/04 ,  H01L21/02532 ,  H01L21/02672 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78675

摘要： A practical operational amplifier circuit is formed using thing film transisters. An operational amplifier circuit is formed by thin film transistors formed on a quartz substrate wherein cumulative distribution of mobilities of the n-channel type thin film transistors becomes 90% or more at 260 cm2/Vs and wherein cumulative distribution of mobilities of the p-channel type thin film transistors becomes 90% or more at 150 cm2/Vs. The thin film transistors have active layers formed using a crystalline silicon film fabricated using a metal element that selected to promote crystallization of silicon. The crystalline silicon film is a collection of a multiplicity of elongate crystal structures extending in a certain direction, and the above-described characteristics can be achieved by matching the extending direction and the moving direction of carriers.

摘要翻译： 使用物体转换器形成实际的运算放大器电路。 运算放大器电路由形成在石英衬底上的薄膜晶体管形成，其中n沟道型薄膜晶体管的迁移率的累积分布在260cm 2 / Vs处变为90％以上，其中累积 p沟道型薄膜晶体管的迁移率的分布在150cm 2 / Vs下变为90％以上。 薄膜晶体管具有使用使用选择促进硅的结晶的金属元素制造的晶体硅膜形成的有源层。 结晶硅膜是沿一定方向延伸的多个细长晶体结构的集合，并且可以通过匹配载流子的延伸方向和移动方向来实现上述特性。

公开(公告)号：US20110186949A1

公开(公告)日：2011-08-04

申请号：US13084996

申请日：2011-04-12

申请人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Kiyoshi KATO ,  Takaaki KOEN ,  Yuto YAKUBO ,  Makoto YANAGISAWA ,  Hisashi OHTANI ,  Eiji SUGIYAMA ,  Nozomi HORIKOSHI

发明人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Kiyoshi KATO ,  Takaaki KOEN ,  Yuto YAKUBO ,  Makoto YANAGISAWA ,  Hisashi OHTANI ,  Eiji SUGIYAMA ,  Nozomi HORIKOSHI

IPC分类号： H01L29/66

CPC分类号： G06K19/07735 ,  G06K19/07722 ,  G06K19/07794 ,  H01L23/295 ,  H01L23/3157 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00

摘要： A semiconductor device capable of wireless communication, which has high reliability in terms of resistance to external force, in particular, pressing force and can prevent electrostatic discharge in an integrated circuit without preventing reception of an electric wave. The semiconductor device includes an on-chip antenna connected to the integrated circuit and a booster antenna which transmits a signal or power included in a received electric wave to the on-chip antenna without contact. In the semiconductor device, the integrated circuit and the on-chip antenna are interposed between a pair of structure bodies formed by impregnating a fiber body with a resin. One of the structure bodies is provided between the on-chip antenna and the booster antenna. A conductive film having a surface resistance value of approximately 106 to 1014 Ω/cm2 is formed on at least one surface of each structure body.

摘要翻译： 一种能够进行无线通信的半导体装置，其在外力方面具有高的可靠性，特别是按压力，并且能够防止集成电路中的静电放电，而不会妨碍电波的接收。 半导体器件包括连接到集成电路的片上天线和将接收到的电波中包含的信号或功率发送到片上天线而不接触的增强天线。 在半导体器件中，集成电路和片上天线插入通过用树脂浸渍纤维体而形成的一对结构体之间。 其中一个结构体设置在片上天线和增强天线之间。 在每个结构体的至少一个表面上形成表面电阻值为大约106至1014Ω·cm 2 / cm 2的导电膜。

公开(公告)号：US20130037884A1

公开(公告)日：2013-02-14

申请号：US13549914

申请日：2012-07-16

申请人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Jun KOYAMA ,  Takeshi FUKUNAGA

发明人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Jun KOYAMA ,  Takeshi FUKUNAGA

IPC分类号： H01L29/786

CPC分类号： H01L29/66825 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/1203 ,  H01L29/42324 ,  H01L29/78609 ,  H01L29/78675 ,  H01L29/7881

摘要： An active region, a source region, and a drain region are formed on a single crystal semiconductor substrate or a single crystal semiconductor thin film. Impurity regions called pinning regions are formed in striped form in the active region so as to reach both of the source region and the drain region. Regions interposed between the pinning regions serve as channel forming regions. A tunnel oxide film, a floating gate, a control gate, etc. are formed on the above structure. The impurity regions prevent a depletion layer from expanding from the source region toward the drain region.

公开(公告)号：US20120019739A1

公开(公告)日：2012-01-26

申请号：US13247342

申请日：2011-09-28

申请人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Jun KOYAMA ,  Satoshi TERAMOTO

发明人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Jun KOYAMA ,  Satoshi TERAMOTO

IPC分类号： G02F1/136

CPC分类号： G02F1/1368 ,  G02B27/017 ,  G02B2027/0138 ,  G02F1/133553 ,  G02F1/13454 ,  G02F2203/02 ,  H01L27/124 ,  H01L29/41733

摘要： There is disclosed an active matrix reflective liquid crystal display panel on which an active matrix circuit is integrated with peripheral driver circuits. Metal lines in the peripheral driver circuits are formed simultaneously with pixel electrodes. Thus, neither the process sequence nor the structure is complicated.

摘要翻译： 公开了一种有源矩阵反射型液晶显示面板，其中有源矩阵电路与外围驱动电路集成。 外围驱动电路中的金属线与像素电极同时形成。 因此，处理顺序和结构都不复杂。

公开(公告)号：US20100134709A1

公开(公告)日：2010-06-03

申请号：US12683473

申请日：2010-01-07

申请人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Jun KOYAMA ,  Satoshi TERAMOTO

发明人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Jun KOYAMA ,  Satoshi TERAMOTO

IPC分类号： G02F1/136

CPC分类号： G02F1/1368 ,  G02B27/017 ,  G02B2027/0138 ,  G02F1/133553 ,  G02F1/13454 ,  G02F2203/02 ,  H01L27/124 ,  H01L29/41733

摘要： There is disclosed an active matrix reflective liquid crystal display panel on which an active matrix circuit is integrated with peripheral driver circuits. Metal lines in the peripheral driver circuits are formed simultaneously with pixel electrodes. Thus, neither the process sequence nor the structure is complicated.

摘要翻译： 公开了一种有源矩阵反射型液晶显示面板，其中有源矩阵电路与外围驱动电路集成。 外围驱动电路中的金属线与像素电极同时形成。 因此，处理顺序和结构都不复杂。

公开(公告)号：US20120108049A1

公开(公告)日：2012-05-03

申请号：US13338366

申请日：2011-12-28

申请人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Tamae TAKANO

发明人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Tamae TAKANO

IPC分类号： H01L21/28

CPC分类号： H01L29/04 ,  H01L21/0237 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/02672 ,  H01L21/02686 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78675

摘要： There is provided a technique to form a single crystal semiconductor thin film or a substantially single crystal semiconductor thin film. A catalytic element for facilitating crystallization of an amorphous semiconductor thin film is added to the amorphous semiconductor thin film, and a heat treatment is carried out to obtain a crystalline semiconductor thin film. After the crystalline semiconductor thin film is irradiated with ultraviolet light or infrared light, a heat treatment at a temperature of 900 to 1200° C. is carried out in a reducing atmosphere. The surface of the crystalline semiconductor thin film is extremely flattened through this step, defects in crystal grains and crystal grain boundaries disappear, and the single crystal semiconductor thin film or substantially single crystal semiconductor thin film is obtained.

摘要翻译： 提供了形成单晶半导体薄膜或基本单晶半导体薄膜的技术。 将非晶半导体薄膜的促进结晶化的催化剂元素添加到非晶半导体薄膜中，进行热处理，得到结晶半导体薄膜。 在用紫外线或红外线照射结晶半导体薄膜之后，在还原气氛中进行900〜1200℃的热处理。 结晶半导体薄膜的表面通过该工序极其平坦化，晶粒和晶界的缺陷消失，得到单晶半导体薄膜或大致单晶半导体薄膜。

公开(公告)号：US20100144077A1

公开(公告)日：2010-06-10

申请号：US12705004

申请日：2010-02-12

申请人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Hiroyuki SHIMADA ,  Mitsunori SAKAMA ,  Hisashi ABE ,  Satoshi TERAMOTO

发明人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Hiroyuki SHIMADA ,  Mitsunori SAKAMA ,  Hisashi ABE ,  Satoshi TERAMOTO

IPC分类号： H01L21/28 ,  H01L21/20

CPC分类号： H01L21/02686 ,  C23C16/303 ,  C23C16/345 ,  C23C16/402 ,  C23C16/54 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/2022 ,  H01L21/67155 ,  H01L21/67207 ,  H01L27/1281 ,  H01L29/41733 ,  Y10S438/905 ,  Y10S438/908

摘要： A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.

摘要翻译： 基板处理装置包括经由可抽出的公共室彼此连接的多个可抽出的处理室，公共室设有用于在每个处理室之间输送基板的装置。 更具体地，基板处理装置包括多个可排除的处理室，至少一个所述处理室通过其中的气相反应具有成膜功能，所述处理室中的至少一个具有光照射的退火功能， 所述处理室中的至少一个具有加热功能。 所述设备还具有公共室，所述多个可抽出的处理室通过所述公共室彼此连接，以及设置在所述公共室中的输送装置，用于在每个处理室之间输送基板。

公开(公告)号：US20100038716A1

公开(公告)日：2010-02-18

申请号：US12574162

申请日：2009-10-06

申请人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Tamae TAKANO

发明人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Tamae TAKANO

IPC分类号： H01L29/786

CPC分类号： H01L29/04 ,  H01L21/0237 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/02672 ,  H01L21/02686 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78675

摘要： There is provided a technique to form a single crystal semiconductor thin film or a substantially single crystal semiconductor thin film. A catalytic element for facilitating crystallization of an amorphous semiconductor thin film is added to the amorphous semiconductor thin film, and a heat treatment is carried out to obtain a crystalline semiconductor thin film. After the crystalline semiconductor thin film is irradiated with ultraviolet light or infrared light, a heat treatment at a temperature of 900 to 1200° C. is carried out in a reducing atmosphere. The surface of the crystalline semiconductor thin film is extremely flattened through this step, defects in crystal grains and crystal grain boundaries disappear, and the single crystal semiconductor thin film or substantially single crystal semiconductor thin film is obtained.

摘要翻译： 提供了形成单晶半导体薄膜或基本单晶半导体薄膜的技术。 将非晶半导体薄膜的促进结晶化的催化剂元素添加到非晶半导体薄膜中，进行热处理，得到结晶半导体薄膜。 在用紫外线或红外线照射结晶半导体薄膜之后，在还原气氛中进行900〜1200℃的热处理。 结晶半导体薄膜的表面通过该工序极其平坦化，晶粒和晶界的缺陷消失，得到单晶半导体薄膜或大致单晶半导体薄膜。

公开(公告)号：US20100295046A1

公开(公告)日：2010-11-25

申请号：US12849964

申请日：2010-08-04

申请人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Toru MITSUKI ,  Akiharu MIYANAGA ,  Yasushi OGATA

发明人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Toru MITSUKI ,  Akiharu MIYANAGA ,  Yasushi OGATA

IPC分类号： H01L29/786

CPC分类号： H01L29/78675 ,  G02F1/13454 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/0262 ,  H01L21/02664 ,  H01L21/02667 ,  H01L21/02672 ,  H01L21/3221 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/04 ,  H01L29/66757 ,  H01L29/78654 ,  Y10S438/973

摘要： After an amorphous semiconductor thin film is crystallized by utilizing a catalyst element, the catalyst element is removed by performing a heat treatment in an atmosphere containing a halogen element. A resulting crystalline semiconductor thin film exhibits {110} orientation. Since individual crystal grains have approximately equal orientation, the crystalline semiconductor thin film has substantially no grain boundaries and has such crystallinity as to be considered a single crystal or considered so substantially.

摘要翻译： 在通过利用催化剂元素使无定形半导体薄膜结晶之后，通过在含有卤素元素的气氛中进行热处理来除去催化剂元素。 得到的晶体半导体薄膜显示{110}取向。 由于单个晶粒具有大致相等的取向，所以晶体半导体薄膜基本上不具有晶界，并且具有被认为是单晶的结晶度或者被认为是如此。

公开(公告)号：US20060145153A1

公开(公告)日：2006-07-06

申请号：US11275850

申请日：2006-01-31

申请人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Takeshi FUKUNAGA

发明人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Takeshi FUKUNAGA

IPC分类号： H01L31/0376

CPC分类号： H01L27/127 ,  H01L27/1214 ,  H01L27/1277 ,  H01L29/78696

摘要： A semiconductor device having a CMOS structure, wherein, in manufacturing a CMOS circuit, an impurity element which imparts p-type conductivity to the active layer of the p-channel type semiconductor device is added before forming the gate insulating film. Then, by applying thermal oxidation treatment to the active layer, the impurity element is subjected to redistribution, and the concentration of the impurity element in the principal surface of the active layer is minimized. The precise control of threshold voltage is enabled by the impurity element that is present in a trace quantity.

摘要翻译： 具有CMOS结构的半导体器件，其中在制造CMOS电路时，在形成栅极绝缘膜之前添加赋予P沟道型半导体器件的有源层p型导电性的杂质元素。 然后，通过对有源层进行热氧化处理，对杂质元素进行再分配，使有源层主表面的杂质元素的浓度最小化。 阈值电压的精确控制由痕量存在的杂质元素使能。