公开(公告)号：US06954985B2

公开(公告)日：2005-10-18

申请号：US10043146

申请日：2002-01-14

申请人： Sung Gue Lee ,  Sung Sik Cho ,  Yong Il Kim ,  Yong Soon Jang ,  Ho Sung Choi ,  Sang Jin Kong ,  Young Hwan Kim

发明人： Sung Gue Lee ,  Sung Sik Cho ,  Yong Il Kim ,  Yong Soon Jang ,  Ho Sung Choi ,  Sang Jin Kong ,  Young Hwan Kim

IPC分类号： H05K3/28 ,  H05K3/00 ,  H05K3/12 ,  H05K3/42 ,  H05K3/46 ,  H01K3/10

CPC分类号： H05K3/0094 ,  H05K3/1225 ,  H05K3/28 ,  H05K2201/09509 ,  H05K2201/0959 ,  H05K2201/09881 ,  H05K2203/0278 ,  H05K2203/0557 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49135 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49167

摘要： A hole plugging method for a printed circuit board, a hole plugging device in accordance therewith and a manufacturing method in accordance therewith where a mask for selectively exposing a via hole, a through hole and a surface pattern of the printed circuit board is positioned on the board having the via hole and the through hole to electrically connect circuit patterns formed on the surface of the board and in the board and an insulating material is plugged in the via hole by abutting and pushing the material on the surface of the board. Therefore, the insulating material can be plugged smoothly without a void, the processing is simplified by plugging the insulating material just to the height of the circuit pattern in a space between the circuit patterns and accordingly, damage to the circuit pattern can be prevented.

摘要翻译： 用于印刷电路板的孔堵塞方法，根据本发明的孔堵装置及其制造方法，其中用于选择性地暴露印刷电路板的通孔，通孔和表面图案的掩模位于 具有通孔和通孔的电路板电连接板和表面上形成的电路图案和绝缘材料，通过邻接和推动板的表面上的材料而被堵塞在通孔中。 因此，绝缘材料可以没有空隙而平滑地插入，通过将绝缘材料刚好插入电路图案之间的空间中的电路图案的高度来简化处理，因此可以防止电路图案的损坏。

公开(公告)号：US06803257B2

公开(公告)日：2004-10-12

申请号：US10175912

申请日：2002-06-21

申请人： Sung Gue Lee ,  Yong Il Kim

发明人： Sung Gue Lee ,  Yong Il Kim

IPC分类号： H01L2144

CPC分类号： H05K1/021 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/181 ,  H05K1/056 ,  H05K1/182 ,  H05K3/0061 ,  H05K3/0097 ,  H05K3/321 ,  H05K3/4644 ,  H05K2203/0315 ,  H05K2203/049 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49165 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/00012 ,  H01L2924/00

摘要： A printed circuit board (PCB) with a heat dissipation element, a method for manufacturing the PCB, and a semiconductor package using the PCB dissipates heat generated from the semiconductor chip and reduces a printed circuit board height. The PCB includes a heat sink panel, an alloy panel attached to one surface of the heat sink panel serving to ground and to dissipate heat, a circuit pattern layer having via holes formed on one surface of the alloy panel and electrically coupled to the alloy panel, and a cavity formed by perforating the circuit pattern layer and the alloy panel. A semiconductor chip is on the heat sink panel in the cavity and electrically coupled to the circuit pattern layer. The alloy panels with the circuit patterns can be manufactured in pairs with an insulation carrier therebetween. A plurality of dissipation protrusions can be formed on the surface of the alloy panel or the surface of the heat sink panel to couple the same.

摘要翻译： 具有散热元件的印刷电路板（PCB），PCB的制造方法以及使用该PCB的半导体封装消耗了半导体芯片产生的热量并降低了印刷电路板的高度。 PCB包括散热面板，附接到用于接地并散热的散热板的一个表面的合金面板，具有形成在合金面板的一个表面上并且电耦合到合金面板的通孔的电路图案层 以及通过对电路图案层和合金面板进行穿孔而形成的空腔。 半导体芯片位于空腔中的散热板上并电耦合到电路图案层。 具有电路图案的合金面板可以与它们之间的绝缘载体成对地制造。 可以在合金面板的表面或散热面板的表面上形成多个耗散突起，以将其连接。

公开(公告)号：US07098533B2

公开(公告)日：2006-08-29

申请号：US10934556

申请日：2004-09-07

申请人： Sung Gue Lee ,  Yong Il Kim

发明人： Sung Gue Lee ,  Yong Il Kim

IPC分类号： H01L23/10 ,  H01L23/34 ,  H01L23/043 ,  H01L23/495 ,  H01L31/024

CPC分类号： H05K1/021 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/181 ,  H05K1/056 ,  H05K1/182 ,  H05K3/0061 ,  H05K3/0097 ,  H05K3/321 ,  H05K3/4644 ,  H05K2203/0315 ,  H05K2203/049 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49165 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/00012 ,  H01L2924/00

摘要： A printed circuit board (PCB) with a heat dissipation element, a method for manufacturing the PCB, and a semiconductor package using the PCB dissipates heat generated from the semiconductor chip and reduces a printed circuit board height. The PCB includes a heat sink panel, an alloy panel attached to one surface of the heat sink panel serving to ground and to dissipate heat, a circuit pattern layer having via holes formed on one surface of the alloy panel and electrically coupled to the alloy panel, and a cavity formed by perforating the circuit pattern layer and the alloy panel. A semiconductor chip is on the heat sink panel in the cavity and electrically coupled to the circuit pattern layer. The alloy panels with the circuit patterns can be manufactured in pairs with an insulation carrier therebetween. A plurality of dissipation protrusions can be formed on the surface of the alloy panel or the surface of the heat sink panel to couple the same.

摘要翻译： 具有散热元件的印刷电路板（PCB），PCB的制造方法以及使用该PCB的半导体封装消耗了半导体芯片产生的热量并降低了印刷电路板的高度。 PCB包括散热面板，附接到用于接地并散热的散热板的一个表面的合金面板，具有形成在合金面板的一个表面上并且电耦合到合金面板的通孔的电路图案层 以及通过对电路图案层和合金面板进行穿孔而形成的空腔。 半导体芯片位于空腔中的散热板上并电耦合到电路图案层。 具有电路图案的合金面板可以与它们之间的绝缘载体成对地制造。 可以在合金面板的表面或散热面板的表面上形成多个耗散突起，以将其连接。

公开(公告)号：US07049178B2

公开(公告)日：2006-05-23

申请号：US10743302

申请日：2003-12-23

申请人： Yong Il Kim ,  Sung Gue Lee ,  Yu Seock Yang

发明人： Yong Il Kim ,  Sung Gue Lee ,  Yu Seock Yang

IPC分类号： H01L21/44 ,  H01L21/58 ,  H01L21/50

CPC分类号： H01L23/49816 ,  H01L21/4857 ,  H01L23/49833 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method of fabricating a semiconductor package is disclosed in which a first Ni—Au plating is formed on a bonding pad for connection with a semiconductor chip, without a mechanical process or a masking operation. The method applies a copper plating on a through bore and the bonding pad, where the copper plated layer formed on the bonding pad is selectively removed, and then a second Ni—Au plating is formed on the bonding pad and a ball pad.

公开(公告)号：US07337535B2

公开(公告)日：2008-03-04

申请号：US10773267

申请日：2004-02-09

申请人： Sung Gue Lee ,  Sung Sik Cho ,  Yong Il Kim ,  Yong Soon Jang ,  Ho Sung Choi ,  Sang Jin Kong ,  Young Hwan Kim

发明人： Sung Gue Lee ,  Sung Sik Cho ,  Yong Il Kim ,  Yong Soon Jang ,  Ho Sung Choi ,  Sang Jin Kong ,  Young Hwan Kim

IPC分类号： H01R43/00

CPC分类号： H05K3/0094 ,  H05K3/1225 ,  H05K3/28 ,  H05K2201/09509 ,  H05K2201/0959 ,  H05K2201/09881 ,  H05K2203/0278 ,  H05K2203/0557 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49135 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49167

摘要： A hole plugging method for a printed circuit board, a hole plugging device in accordance therewith and a manufacturing method in accordance therewith where a mask for selectively exposing a via hole, a through hole and a surface pattern of the printed circuit board is positioned on the board having the via hole and the through hole to electrically connect circuit patterns formed on the surface of the board and in the board and an insulating material is plugged in the via hole by abutting and pushing the material on the surface of the board. Therefore, the insulating material can be plugged smoothly without a void, the processing is simplified by plugging the insulating material just to the height of the circuit pattern in a space between the circuit patterns and accordingly, damage to the circuit pattern can be prevented.

摘要翻译： 用于印刷电路板的孔堵塞方法，根据本发明的孔堵装置及其制造方法，其中用于选择性地暴露印刷电路板的通孔，通孔和表面图案的掩模位于 具有通孔和通孔的电路板电连接板和表面上形成的电路图案和绝缘材料，通过邻接和推动板的表面上的材料而被堵塞在通孔中。 因此，绝缘材料可以没有空隙而平滑地插入，通过将绝缘材料刚好插入电路图案之间的空间中的电路图案的高度来简化处理，因此可以防止电路图案的损坏。

公开(公告)号：US06851184B2

公开(公告)日：2005-02-08

申请号：US10174956

申请日：2002-06-20

申请人： Sung Gue Lee ,  Yong Il Kim ,  Yong Soon Jang

发明人： Sung Gue Lee ,  Yong Il Kim ,  Yong Soon Jang

IPC分类号： H05K3/06 ,  H01L21/48 ,  H01L23/12 ,  H05K3/24 ,  H05K3/02

CPC分类号： H01L21/4867 ,  H05K3/064 ,  H05K3/243 ,  H05K2203/0574 ,  H05K2203/0585 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49142 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

摘要： A printed circuit board (PCB) and method of forming same is performed without incoming lines for plating. The plating is preferably performed on ball pad areas and/or bonding pad areas being the top layer of a multi-layer PCB. A metal layer that later forms circuit patterns serves to supply a power for plating ball pads for solder-ball bonding and bonding pads for wire-bonding with gold (Au). Thus, the gold (Au)-plating is performed prior to forming the circuit patterns. A positive-type first photoresist is coated on the metal layer to form the ball pads and the bonding pads. The coated first photoresist is also used to form circuit patterns. The gold (Au)-plated metal layer of ball pad areas and the bonding pad areas are protected by a second photoresist, which is reactive with a larger quantity of light than the first photoresist. Both first and second photoresists can be concurrently developed.

摘要翻译： 执行印刷电路板（PCB）及其形成方法而没有用于电镀的输入线。 电镀优选在作为多层PCB的顶层的球垫区域和/或接合焊盘区域上进行。 稍后形成电路图案的金属层用于提供用于焊接用于焊球接合的球垫的电力和用于与金（Au）引线接合的接合焊盘。 因此，在形成电路图案之前执行镀金（Au）。 正极型第一光致抗蚀剂涂覆在金属层上以形成球垫和接合垫。 涂覆的第一光致抗蚀剂也用于形成电路图案。 金（Au）镀金属层的焊盘区域和焊盘区域被第二光致抗蚀剂保护，第二光致抗蚀剂与第一光致抗蚀剂相比反应性更大。 第一和第二光刻胶都可以同时开发。

公开(公告)号：US06706564B2

公开(公告)日：2004-03-16

申请号：US10318303

申请日：2002-12-13

申请人： Yong Il Kim ,  Sung Gue Lee ,  Yu Seock Yang

发明人： Yong Il Kim ,  Sung Gue Lee ,  Yu Seock Yang

IPC分类号： H01L2144

CPC分类号： H01L23/49816 ,  H01L21/4857 ,  H01L23/49833 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method of fabricating a semiconductor package is disclosed in which a first Ni—Au plating is formed on a bonding pad for connection with a semiconductor chip, without a mechanical process or a masking operation. The method applies a copper plating on a through bore and the bonding pad, where the copper plated layer formed on the bonding pad is selectively removed, and then a second Ni—Au plating is formed on the bonding pad and a ball pad.

摘要翻译： 公开了一种制造半导体封装的方法，其中在用于与半导体芯片连接的焊盘上形成第一Ni-Au电镀，而不需要机械工艺或掩模操作。 该方法在通孔上施加铜电镀，并且选择性地去除在焊盘上形成的镀铜层的接合焊盘，然后在焊盘和球垫上形成第二Ni-Au电镀。

公开(公告)号：US09666733B2

公开(公告)日：2017-05-30

申请号：US14018141

申请日：2013-09-04

申请人： Hyeon Woo Ahn ,  Sung Gue Lee

发明人： Hyeon Woo Ahn ,  Sung Gue Lee

IPC分类号： H01L31/042 ,  H01L31/0224 ,  H01L31/0236 ,  H01L31/0352 ,  H01L31/048 ,  H01L31/05 ,  H01L31/068

CPC分类号： H01L31/022441 ,  H01L31/02363 ,  H01L31/035281 ,  H01L31/03529 ,  H01L31/048 ,  H01L31/0516 ,  H01L31/068 ,  Y02E10/547

摘要： A solar cell using a printed circuit board (PCB) includes a substrate that is formed of an insulating material and in and through which a plurality of fixing holes and communication holes are alternately formed; a plurality of photoelectric effect generators that have ball or polyhedral shapes fixed to the substrate to be disposed over the plurality of fixing holes, and generate photoelectric effects by receiving light through light-receiving portions that are exposed to an upper portion of the substrate; a plurality of upper electrodes that are formed on a top surface of the substrate, and are connected to the respective light-receiving portions of the photoelectric effect generators; and a plurality of lower electrodes that are formed on a bottom surface of the substrate to be connected to respective non-light-receiving portions of the photoelectric effect generators, and communicate with the plurality of upper electrodes through the plurality of communication holes.

公开(公告)号：US20110036618A1

公开(公告)日：2011-02-17

申请号：US12745667

申请日：2008-12-01

申请人： Kwang Tae Lee ,  Sung Gue Lee ,  Jae Bong Choi

发明人： Kwang Tae Lee ,  Sung Gue Lee ,  Jae Bong Choi

IPC分类号： H05K1/00 ,  H05K3/10 ,  B23Q41/00

CPC分类号： H05K3/0097 ,  H05K1/0271 ,  H05K3/0052 ,  H05K2201/09354 ,  H05K2201/09736 ,  H05K2201/09781 ,  H05K2201/2009 ,  H05K2203/0169

摘要： Disclosed is a printed circuit board including an insulation member on which a first region and a second region are defined, a circuit pattern formed on the first region, and a support member formed on the second region.

摘要翻译： 公开了一种印刷电路板，包括：绝缘部件，其上限定有第一区域和第二区域;形成在第一区域上的电路图案;以及形成在第二区域上的支撑部件。

公开(公告)号：US08426739B2

公开(公告)日：2013-04-23

申请号：US12745667

申请日：2008-12-01

申请人： Kwang Tae Lee ,  Sung Gue Lee ,  Jae Bong Choi

发明人： Kwang Tae Lee ,  Sung Gue Lee ,  Jae Bong Choi

IPC分类号： H05K1/03

CPC分类号： H05K3/0097 ,  H05K1/0271 ,  H05K3/0052 ,  H05K2201/09354 ,  H05K2201/09736 ,  H05K2201/09781 ,  H05K2201/2009 ,  H05K2203/0169

摘要： Disclosed is a printed circuit board including an insulation member on which a first region and a second region are defined, a circuit pattern formed on the first region, and a support member formed on the second region.

摘要翻译： 公开了一种印刷电路板，包括：绝缘部件，其上限定有第一区域和第二区域;形成在第一区域上的电路图案;以及形成在第二区域上的支撑部件。