公开(公告)号：US20110003472A1

公开(公告)日：2011-01-06

申请号：US12882277

申请日：2010-09-15

申请人： Hideya MURAI ,  Tadanori SHIMOTO ,  Takuo FUNAYA ,  Katsumi KIKUCHI ,  Shintaro YAMAMICHI ,  Kazuhiro BABA ,  Hirokazu HONDA ,  Keiichiro KATA ,  Kouji MATSUI ,  Shinichi MIYAZAKI

发明人： Hideya MURAI ,  Tadanori SHIMOTO ,  Takuo FUNAYA ,  Katsumi KIKUCHI ,  Shintaro YAMAMICHI ,  Kazuhiro BABA ,  Hirokazu HONDA ,  Keiichiro KATA ,  Kouji MATSUI ,  Shinichi MIYAZAKI

IPC分类号： H01L21/768

CPC分类号： H01L21/4857 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/5383 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/181 ,  H05K3/007 ,  H05K3/205 ,  H05K3/28 ,  H05K3/4614 ,  H05K3/4682 ,  H05K2201/0376 ,  H05K2203/0152 ,  H05K2203/061 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A wiring substrate for mounting semiconductors is provided with an insulation film, wires formed in the insulation film, and a plurality of electrode pads that electrically connect to the wires through vias. The electrode pads are provided to have their surfaces exposed to both of the front surface and the rear surface of the insulation film, and at least a part of the side surface of the electrode pads is buried in the insulation film. The insulation film is formed by forming electrode pads on the respective two metallic plates, thereafter, laminating an insulation layer and wires on the respective metallic plates to cover the electrode pad, and adhering the insulation layers to each other for integration, and thereafter, removing the metallic plates.

摘要翻译： 用于安装半导体的布线基板设置有绝缘膜，形成在绝缘膜中的布线以及通过通孔电连接到导线的多个电极垫。 电极焊盘被设置为使其表面暴露于绝缘膜的前表面和后表面，并且电极焊盘的侧表面的至少一部分被埋在绝缘膜中。 绝缘膜通过在相应的两个金属板上形成电极焊盘而形成，然后在相应的金属板上层叠绝缘层和电线以覆盖电极焊盘，并将绝缘层彼此粘合在一起，然后除去 金属板。

公开(公告)号：US20080258283A1

公开(公告)日：2008-10-23

申请号：US12140041

申请日：2008-06-16

申请人： Tadanori SHIMOTO ,  Katsumi KIKUCHI ,  Hideya MURAI ,  Kazuhiro BABA ,  Hirokazu HONDA ,  Keiichiro KATA

发明人： Tadanori SHIMOTO ,  Katsumi KIKUCHI ,  Hideya MURAI ,  Kazuhiro BABA ,  Hirokazu HONDA ,  Keiichiro KATA

IPC分类号： H01L23/12 ,  H05K1/05

CPC分类号： H01L23/49816 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/145 ,  H01L23/49822 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0366 ,  H05K3/205 ,  H05K3/423 ,  H05K2201/0376 ,  H05K2201/068 ,  H05K2203/0733 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wiring board has a base insulating film. The base insulating film has a thickness of 20 to 100 μm and is made of a heat-resistant resin which has a glass-transition temperature of 150° C. or higher and which contains reinforcing fibers made of glass or aramid. The base insulating film has the following physical properties (1) to (6) when an elastic modulus at a temperature of T° C. is given as DT (GPa) and a breaking strength at a temperature of T° C. is given as HT (MPa).(1) A coefficient of thermal expansion in the direction of thickness thereof is 90 ppm/K or less. (2) D23≧5 (3) D150≧2.5 (4) (D−65/D150)≦3.0 (5) H23≧140 (6) (H−65/H150)≦2.3

摘要翻译： 布线板具有基底绝缘膜。 基底绝缘膜的厚度为20〜100μm，由玻璃化转变温度为150℃以上的含有玻璃或芳族聚酰胺的增强纤维的耐热性树脂构成。 当在T℃的温度下的弹性模量为D T（GPa）时，基体绝缘膜具有以下物理性质（1）至（6））和在温度下的断裂强度 的T℃给出为H T（MPa）。 （1）其厚度方向的热膨胀系数为90ppm / K以下。 （2）D 23 = 5（3）D 150 > = 2.5（4）（D-65 / D 150 <= 3.0（5）H 23 = 140（6）（H-65 / H 150） 2.3

公开(公告)号：US20110136298A1

公开(公告)日：2011-06-09

申请号：US13026651

申请日：2011-02-14

申请人： Katsumi KIKUCHI ,  Shintaro YAMAMICHI ,  Hideya MURAI ,  Takuo FUNAYA ,  Kentaro MORI ,  Takehiko MAEDA ,  Hirokazu HONDA ,  Kenta OGAWA ,  Jun TSUKANO

发明人： Katsumi KIKUCHI ,  Shintaro YAMAMICHI ,  Hideya MURAI ,  Takuo FUNAYA ,  Kentaro MORI ,  Takehiko MAEDA ,  Hirokazu HONDA ,  Kenta OGAWA ,  Jun TSUKANO

IPC分类号： H01L21/60 ,  H05K3/46

CPC分类号： H05K3/205 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/563 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48472 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K3/244 ,  H05K3/423 ,  H05K2201/0338 ,  H05K2201/098 ,  H05K2201/09845 ,  H05K2203/0376 ,  H05K2203/0384 ,  H05K2203/0733 ,  H05K2203/1476 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wiring board has an insulating layer, a plurality of wiring layers formed in such a way as to be insulated from each other by the insulating layer, and a plurality of vias formed in the insulating layer to connect the wiring layers. Of the wiring layers, a surface wiring layer formed in one surface of the insulating layer include a first metal film exposed from the one surface and a second metal film embedded in the insulating layer and stacked on the first metal film. Edges of the first metal film project from edges of the second metal film in the direction in which the second metal film spreads. By designing the shape of the wiring layers embedded in the insulating layer in this manner, it is possible to obtain a highly reliable wiring board that can be effectively prevented from side etching in the manufacturing process and can adapt to miniaturization and highly dense packaging of wires.

摘要翻译： 布线基板具有绝缘层，多个布线层以通过绝缘层彼此绝缘的方式形成，以及形成在绝缘层中以连接布线层的多个通孔。 在布线层中，形成在绝缘层的一个表面上的表面布线层包括从一个表面露出的第一金属膜和嵌入在绝缘层中并叠放在第一金属膜上的第二金属膜。 第一金属膜的边缘沿着第二金属膜扩展的方向从第二金属膜的边缘突出。 通过以这种方式设计嵌入在绝缘层中的布线层的形状，可以获得在制造过程中可以有效地防止侧蚀刻的高可靠性布线板，并且可以适应电线的小型化和高密度封装 。

公开(公告)号：US20110215478A1

公开(公告)日：2011-09-08

申请号：US13040021

申请日：2011-03-03

申请人： Shintaro YAMAMICHI ,  Hideya MURAI ,  Kentaro MORI ,  Katsumi KIKUCHI ,  Yoshiki NAKASHIMA ,  Masaya KAWANO ,  Masahiro KOMURO

发明人： Shintaro YAMAMICHI ,  Hideya MURAI ,  Kentaro MORI ,  Katsumi KIKUCHI ,  Yoshiki NAKASHIMA ,  Masaya KAWANO ,  Masahiro KOMURO

IPC分类号： H01L23/522

CPC分类号： H01L23/522 ,  H01L24/19 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/00

摘要： In a wiring substrate containing a semiconductor element, the wiring substrate includes a supporting substrate; a semiconductor element provided on the supporting substrate; a peripheral insulating layer covering at least an outer circumferential side surface of the semiconductor element; and upper surface-side wiring provided on the upper surface side of the wiring substrate. The semiconductor element includes a semiconductor substrate; a first wiring-structure layer including first wiring and a first insulating layer alternately formed on the semiconductor substrate; and a second wiring-structure layer including second wiring and a second insulating layer alternately formed on the first wiring-structure layer. The upper surface-side wiring includes fan-out wiring led out from immediately above the semiconductor element to a peripheral region external to an outer edge of the semiconductor element. The fan-out wiring is electrically connected to the first wiring through the second wiring. The second wiring is thicker than the first wiring but thinner than the upper surface-side wiring. The second insulating layer is formed of a resin material and is thicker than the first insulating layer.

摘要翻译： 在包含半导体元件的布线基板中，布线基板包括支撑基板; 设置在所述支撑基板上的半导体元件; 覆盖半导体元件的至少外周侧表面的外围绝缘层; 以及设置在布线基板的上表面侧的上表面侧布线。 半导体元件包括半导体衬底; 第一布线结构层，包括交替形成在所述半导体衬底上的第一布线和第一绝缘层; 以及第二布线结构层，包括交替地形成在第一布线结构层上的第二布线和第二绝缘层。 上表面侧布线包括从半导体元件的正上方引导到半导体元件的外边缘外围的外围区域的扇出布线。 扇出布线通过第二布线电连接到第一布线。 第二布线比第一布线厚，但比上表面布线薄。 第二绝缘层由树脂材料形成，并且比第一绝缘层厚。

公开(公告)号：US20150053474A1

公开(公告)日：2015-02-26

申请号：US14532361

申请日：2014-11-04

申请人： Yoshiki NAKASHIMA ,  Shintaro YAMAMICHI ,  Katsumi KIKUCHI ,  Kentaro MORI ,  Hideya MURAI

发明人： Yoshiki NAKASHIMA ,  Shintaro YAMAMICHI ,  Katsumi KIKUCHI ,  Kentaro MORI ,  Hideya MURAI

IPC分类号： H05K1/18 ,  H05K1/02 ,  H05K1/11

CPC分类号： H05K1/182 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/18162 ,  H05K1/0298 ,  H05K1/115 ,  H05K1/185 ,  Y10T29/49126 ,  Y10T29/49165 ,  Y10T428/24322 ,  H01L2924/00

摘要： An object of the present invention is to propose a functional element built-in substrate which enables an electrode terminal of a functional element to be well connected to the back surface on the side opposite to the electrode terminal of the functional element, and which can be miniaturized. According to the present invention, there is provided a functional element built-in substrate including a functional element provided with an electrode terminal on one surface side of the functional element, and a wiring substrate including a laminated structure in which the functional element is embedded so that the electrode terminal of the functional element faces the front surface side of the structure, and which is formed at least in a side surface region of the functional element by laminating a plurality of wiring insulating layers each including a wiring, the functional element built-in substrate being featured in that the electrode terminal and the back surface side of the wiring substrate are electrically connected to each other through the wiring of the laminated structure, and in that, in a pair of the wiring insulating layers included in the laminated structure and that are in contact with each other, the cross-sectional shape of the wiring in each of the wiring insulating layers, which cross-sectional shape is taken along the plane perpendicular to the extension direction of the wiring in the wiring insulating layer, has a relationship that the cross-sectional area of the wiring in the back surface side wiring insulating layer is larger than the cross-sectional area of the wiring in the front surface side wiring insulating layer.

摘要翻译： 本发明的目的是提出一种功能元件内置基板，其使功能元件的电极端子能够良好地连接到与功能元件的电极端子相反的一侧的背面，并且其可以是 小型化。 根据本发明，提供了一种功能元件内置基板，其包括在功能元件的一个表面侧上设置有电极端子的功能元件，以及包括功能元件嵌入其中的层叠结构的布线基板 所述功能元件的电极端子面向所述结构的前表面侧，并且通过层叠多个布线绝缘层而形成在所述功能元件的至少侧面区域中，所述多个布线绝缘层包括布线， 其特征在于，布线基板的电极端子和背面侧通过层叠结构的布线电连接，并且其中，在层叠结构中包括的一对布线绝缘层和 彼此接触，每个布线绝缘中的布线的横截面形状 与布线绝缘层中的配线的延伸方向垂直的平面截取的截面形状的层具有这样的关系：背面侧配线绝缘层中的布线的截面积大于 表面侧配线绝缘层中的配线的截面积。

公开(公告)号：US20110281401A1

公开(公告)日：2011-11-17

申请号：US13190052

申请日：2011-07-25

申请人： Kentaro MORI ,  Shintaro YAMAMICHI ,  Hideya MURAI ,  Takuo FUNAYA ,  Masaya KAWANO ,  Takehiko MAEDA ,  Kouji SOEJIMA

发明人： Kentaro MORI ,  Shintaro YAMAMICHI ,  Hideya MURAI ,  Takuo FUNAYA ,  Masaya KAWANO ,  Takehiko MAEDA ,  Kouji SOEJIMA

IPC分类号： H01L21/58

CPC分类号： H01L21/6835 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/19 ,  H01L24/24 ,  H01L2221/68345 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/15174 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3011 ,  Y10S438/977 ,  H01L2924/00

摘要： A transparent board is positioned on a support board provided with a positioning mark, and a release material is provided. A semiconductor element is then positioned so that the electrode element faces upward, and the support board is then removed. An insulating resin is then formed on the release material so as to cover the semiconductor element; and a via, a wiring layer, an insulation layer, an external terminal, and a solder resist are then formed. The transparent board is then peeled from the semiconductor device through the use of the release material. A chip can thereby be mounted with high precision, there is no need to provide a positioning mark during mounting of the chip on the substrate in the manufacturing process, and the substrate can easily be removed. As a result, a semiconductor device having high density and a thin profile can be manufactured at low cost.

摘要翻译： 透明板位于设置有定位标记的支撑板上，并且设置有释放材料。 然后将半导体元件定位成使得电极元件面向上，然后移除支撑板。 然后在剥离材料上形成绝缘树脂以覆盖半导体元件; 然后形成通孔，布线层，绝缘层，外部端子和阻焊剂。 然后透明板通过使用释放材料从半导体器件剥离。 因此，可以高精度地安装芯片，在制造过程中不需要在将芯片安装在基板上时提供定位标记，并且可以容易地去除基板。 结果，可以以低成本制造具有高密度和薄型的半导体器件。

公开(公告)号：US20090026636A1

公开(公告)日：2009-01-29

申请号：US12178683

申请日：2008-07-24

申请人： Hideya MURAI ,  Kentaro Mori ,  Shintaro Yamamichi ,  Masaya Kawano ,  Takehiko Maeda ,  Kouji Soejima

发明人： Hideya MURAI ,  Kentaro Mori ,  Shintaro Yamamichi ,  Masaya Kawano ,  Takehiko Maeda ,  Kouji Soejima

IPC分类号： H01L21/768 ,  H01L23/522

CPC分类号： H01L23/544 ,  H01L23/5389 ,  H01L24/19 ,  H01L2223/54426 ,  H01L2223/5448 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0106 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/14 ,  Y10T29/49146

摘要： Semiconductor device has a semiconductor chip embedded in an insulating layer. A semiconductor device comprises a semiconductor chip formed to have external connection pads and a positioning mark that is for via formation; an insulating layer containing a non-photosensitive resin as an ingredient and having a plurality of vias; and wiring electrically connected to the external connection pads through the vias and at least a portion of which is formed on the insulating layer. The insulating layer is formed to have a recess in a portion above the positioning mark. The bottom of the recess is the insulating layer alone. Vias have high positional accuracy relative to the mark.

摘要翻译： 半导体器件具有嵌入绝缘层中的半导体芯片。 半导体器件包括形成为具有外部连接焊盘的半导体芯片和用于通孔形成的定位标记; 包含非感光性树脂作为成分并具有多个通孔的绝缘层; 以及通过通路与外部连接焊盘电连接的布线，其至少一部分形成在绝缘层上。 绝缘层形成为在定位标记上方的部分具有凹部。 凹槽的底部是单独的绝缘层。 通孔相对于标记具有高位置精度。