公开(公告)号：US06876067B2

公开(公告)日：2005-04-05

申请号：US10396360

申请日：2003-03-26

申请人： Taiga Arai ,  Fujiaki Nose ,  Hiroshi Kikuchi ,  Yoichi Tamaki

发明人： Taiga Arai ,  Fujiaki Nose ,  Hiroshi Kikuchi ,  Yoichi Tamaki

IPC分类号： H01L23/40 ,  H01L23/495 ,  H01L23/50 ,  H01L31/0336

CPC分类号： H01L23/49582 ,  H01L21/84 ,  H01L23/3735 ,  H01L24/28 ,  H01L24/31 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/80 ,  H01L24/85 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48664 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85464 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device improved in reliability is disclosed. The semiconductor device comprises a semiconductor chip, a sealing member which seals the semiconductor chip with resin, a tub having a chip bonding surface for bonding with the chip and a back surface located on the side opposite to the chip bonding surface and exposed to a surface of the sealing member, plural inner leads electrically connected respectively to bonding pads on the semiconductor chip through wires such as gold wires, and plural outer leads integrally connected respectively to the inner leads and projecting to the exterior of the sealing member, wherein surfaces of the tub and the plural inner and outer leads are all coated with palladium plating. In the case where a heat radiation member is attached to the back surface of the tub, the palladium plating does not melt during solder reflow for example, so that the heat radiation member can be prevented from falling off and hence it is possible to improve the reliability of a QFP as the semiconductor device.

摘要翻译： 公开了提高可靠性的半导体器件。 半导体器件包括半导体芯片，用树脂密封半导体芯片的密封构件，具有用于与芯片接合的芯片接合表面的桶和位于与芯片接合表面相对的一侧的背面并暴露于表面 密封构件的多个内部引线分别通过诸如金线的金属线和多个外部引线电连接到半导体芯片上的接合焊盘，多个外部引线分别一体地连接到内部引线并突出到密封构件的外部， 桶和多个内外引线都镀钯镀。 在散热构件附接到桶的背面的情况下，例如在回流焊时，钯电镀不会熔化，从而可以防止散热构件脱落，因此可以改善 作为半导体器件的QFP的可靠性。

公开(公告)号：US07508054B2

公开(公告)日：2009-03-24

申请号：US11153359

申请日：2005-06-16

申请人： Fujiaki Nose ,  Hiroshi Kikuchi ,  Satoshi Ueno ,  Norio Nakazato

发明人： Fujiaki Nose ,  Hiroshi Kikuchi ,  Satoshi Ueno ,  Norio Nakazato

IPC分类号： H01L23/495

CPC分类号： H01L23/642 ,  H01L23/3107 ,  H01L23/49551 ,  H01L23/5222 ,  H01L23/66 ,  H01L24/06 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/75 ,  H01L2223/6627 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/29007 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78701 ,  H01L2224/78755 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/10162 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19033 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  Y10T29/49121 ,  H01L2924/00014 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012

摘要： Means for forming a package is disclosed on which is mounted a semiconductor chip with a high-speed LSI formed thereon, using a wire bonding method. The package comprises a semiconductor chip, a die pad smaller than a main surface of the semiconductor chip, a sealing member, plural leads each comprising an outer terminal portion and an inner lead portion, and plural bonding wires for connection between bonding pads formed on the semiconductor chip and the inner lead portions of the leads, each of the inner lead portions being bent in a direction away from a mounting surface of the sealing member, thereby approximating the height of the chip-side bonding pads and that of a bonding position of the inner lead portions to each other, whereby the wire length can be made shorter and it is possible to suppress an increase in inductance of the wire portions and attain impedance matching at various portion of a high-frequency signal input/output transmission path.

摘要翻译： 公开了一种用于形成封装的装置，其中使用引线接合方法在其上安装了形成有高速LSI的半导体芯片。 封装包括半导体芯片，小于半导体芯片的主表面的管芯焊盘，密封构件，多个引线，每个引线包括外部端子部分和内部引线部分，以及多个接合线，用于连接形成在 半导体芯片和引线的内引线部分，每个内引线部分沿着远离密封部件的安装表面的方向弯曲，从而接近芯片侧焊盘的高度和接合位置的接合位置 内部引线部分彼此之间，从而可以缩短导线长度，并且可以抑制线部分的电感增加，并在高频信号输入/输出传输路径的各个部分获得阻抗匹配。

公开(公告)号：US20100052149A1

公开(公告)日：2010-03-04

申请号：US12545465

申请日：2009-08-21

申请人： Fujiaki Nose ,  Hiroshi Kikuchi ,  Norio Nakazato

发明人： Fujiaki Nose ,  Hiroshi Kikuchi ,  Norio Nakazato

IPC分类号： H01L23/495 ,  H01L21/56

CPC分类号： H01L23/49503 ,  H01L23/49513 ,  H01L23/49582 ,  H01L24/27 ,  H01L24/28 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/05554 ,  H01L2224/27013 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/83192 ,  H01L2224/83385 ,  H01L2224/838 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01026 ,  H01L2924/3512

摘要： A semiconductor device includes: a die pad having a top surface; a plurality of leads arranged around the die pad; a semiconductor chip having a main surface, a back surface, and a plurality of pads formed to the main surface, and having the back surface fixedly adhered in opposing contact with the top surface of the die pad; a plurality of wires electrically connecting the plurality of pads of the semiconductor chip and the plurality of leads, respectively; and a sealing body sealing the semiconductor chip and the plurality of wires. In addition, a plurality of groove portions are formed to a chip-mounting region opposing the back surface of the semiconductor chip in the top surface of the die pad, and an adhesive for fixedly adhering the semiconductor chip to the top surface of the die pad is buried in the plurality of groove portions.

摘要翻译： 半导体器件包括：具有顶表面的管芯焊盘; 围绕芯片焊盘布置的多个引线; 半导体芯片，具有主表面，背面和形成在主表面上的多个焊盘，并且其背面固定地与芯片焊盘的顶表面相接触地粘附; 分别电连接半导体芯片的多个焊盘和多个引线的多个引线; 以及密封半导体芯片和多根导线的密封体。 此外，在与芯片安装区域相对的芯片安装区域形成多个槽部，该芯片安装区域与芯片的上表面的半导体芯片的背面相对，并且将用于将半导体芯片固定地粘附到芯片焊盘的顶面的粘合剂 被埋在多个槽部中。

公开(公告)号：US20050233501A1

公开(公告)日：2005-10-20

申请号：US11153359

申请日：2005-06-16

申请人： Fujiaki Nose ,  Hiroshi Kikuchi ,  Satoshi Ueno ,  Norio Nakazato

发明人： Fujiaki Nose ,  Hiroshi Kikuchi ,  Satoshi Ueno ,  Norio Nakazato

IPC分类号： H01L23/50 ,  H01L23/31 ,  H01L23/495 ,  H01L23/522 ,  H01L23/64 ,  H01L23/66 ,  H01L21/44

CPC分类号： H01L23/642 ,  H01L23/3107 ,  H01L23/49551 ,  H01L23/5222 ,  H01L23/66 ,  H01L24/06 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/75 ,  H01L2223/6627 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/29007 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78701 ,  H01L2224/78755 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/10162 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19033 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  Y10T29/49121 ,  H01L2924/00014 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012

摘要： Means for forming a package is disclosed on which is mounted a semiconductor chip with a high-speed LSI formed thereon, using a wire bonding method. The package comprises a semiconductor chip, a die pad smaller than a main surface of the semiconductor chip, a sealing member, plural leads each comprising an outer terminal portion and an inner lead portion, and plural bonding wires for connection between bonding pads formed on the semiconductor chip and the inner lead portions of the leads, each of the inner lead portions being bent in a direction away from a mounting surface of the sealing member, thereby approximating the height of the chip-side bonding pads and that of a bonding position of the inner lead portions to each other, whereby the wire length can be made shorter and it is possible to suppress an increase in inductance of the wire portions and attain impedance matching at various portion of a high-frequency signal input/output transmission path.

公开(公告)号：US06911733B2

公开(公告)日：2005-06-28

申请号：US10372898

申请日：2003-02-26

申请人： Hiroshi Kikuchi ,  Norio Nakazato ,  Hideko Ando ,  Takashi Suga ,  Satoru Isomura ,  Takashi Kubo ,  Hiroyasu Sasaki ,  Masanori Fukuhara ,  Naotaka Tanaka ,  Fujiaki Nose

发明人： Hiroshi Kikuchi ,  Norio Nakazato ,  Hideko Ando ,  Takashi Suga ,  Satoru Isomura ,  Takashi Kubo ,  Hiroyasu Sasaki ,  Masanori Fukuhara ,  Naotaka Tanaka ,  Fujiaki Nose

IPC分类号： H01L23/66 ,  H05K1/02 ,  H05K3/36 ,  H01L23/34

CPC分类号： H05K1/0243 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32188 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15173 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/1903 ,  H01L2924/19106 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0219 ,  H05K3/361 ,  H05K2201/10522 ,  H05K2201/1053 ,  H05K2201/10659 ,  H05K2201/10681 ,  H05K2201/10734 ,  H01L2924/00014 ,  H01L2924/00

摘要： A high-frequency signal from a tape-shaped line section having a surface layer signal lead and surface layer GND lead disposed on both sides thereof is directly inputted to a semiconductor chip via a signal surface layer wiring of a package substrate and through solder bump electrodes. Alternatively, a high-frequency signal from the semiconductor chip is outputted to the outside via the tape-shaped line section in reverse. Owing to the transmission of the high-frequency signal by only a microstrip line at the whole surface layer of the package substrate, the high-frequency signal can be transmitted by only the microstrip line at the surface layer without through vias or the like. Accordingly, the high-frequency signal can be transmitted without a loss in frequency characteristic, and a high-quality high-frequency signal can be transmitted with a reduction in loss at high-frequency transmission.

摘要翻译： 来自具有布置在其两侧的表面层信号引线和表面层GND引线的带状线段的高频信号经由封装衬底的信号表面层布线直接输入到半导体芯片，并通过焊料凸块电极 。 或者，来自半导体芯片的高频信号经由带状线路部分反向输出到外部。 由于仅在封装衬底的整个表面层处的微带线传输高频信号，所以高频信号可以仅通过表层的微带线传输，而不需要通过通孔等。 因此，可以不损失频率特性来发送高频信号，并且可以在高频率传输时以低损耗的方式发送高质量的高频信号。

公开(公告)号：US06924549B2

公开(公告)日：2005-08-02

申请号：US10621411

申请日：2003-07-18

申请人： Fujiaki Nose ,  Hiroshi Kikuchi ,  Satoshi Ueno ,  Norio Nakazato

发明人： Fujiaki Nose ,  Hiroshi Kikuchi ,  Satoshi Ueno ,  Norio Nakazato

IPC分类号： H01L23/50 ,  H01L23/31 ,  H01L23/495 ,  H01L23/522 ,  H01L23/64 ,  H01L23/66

CPC分类号： H01L23/642 ,  H01L23/3107 ,  H01L23/49551 ,  H01L23/5222 ,  H01L23/66 ,  H01L24/06 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/75 ,  H01L2223/6627 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/29007 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78701 ,  H01L2224/78755 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/10162 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19033 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  Y10T29/49121 ,  H01L2924/00014 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012

摘要： Means for forming a package is disclosed on which is mounted a semiconductor chip with a high-speed LSI formed thereon, using a wire bonding method. The package comprises a semiconductor chip, a die pad smaller than a main surface of the semiconductor chip, a sealing member, plural leads each comprising an outer terminal portion and an inner lead portion, and plural bonding wires for connection between bonding pads formed on the semiconductor chip and the inner lead portions of the leads, each of the inner lead portions being bent in a direction away from a mounting surface of the sealing member, thereby approximating the height of the chip-side bonding pads and that of a bonding position of the inner lead portions to each other, whereby the wire length can be made shorter and it is possible to suppress an increase in inductance of the wire portions and attain impedance matching at various portion of a high-frequency signal input/output transmission path.

摘要翻译： 公开了一种用于形成封装的装置，其中使用引线接合方法在其上安装了形成有高速LSI的半导体芯片。 封装包括半导体芯片，小于半导体芯片的主表面的管芯焊盘，密封构件，多个引线，每个引线包括外部端子部分和内部引线部分，以及多个接合线，用于连接形成在 半导体芯片和引线的内引线部分，每个内引线部分沿着远离密封部件的安装表面的方向弯曲，从而接近芯片侧焊盘的高度和接合位置的接合位置 内部引线部分彼此之间，从而可以缩短导线长度，并且可以抑制线部分的电感增加，并在高频信号输入/输出传输路径的各个部分获得阻抗匹配。

公开(公告)号：US06911734B2

公开(公告)日：2005-06-28

申请号：US10391746

申请日：2003-03-20

申请人： Hiroshi Kikuchi ,  Norio Nakazato ,  Hideko Ando ,  Takashi Suga ,  Satoru Isomura ,  Takashi Kubo ,  Hiroyasu Sasaki ,  Masanori Fukuhara ,  Naotaka Tanaka ,  Fujiaki Nose

发明人： Hiroshi Kikuchi ,  Norio Nakazato ,  Hideko Ando ,  Takashi Suga ,  Satoru Isomura ,  Takashi Kubo ,  Hiroyasu Sasaki ,  Masanori Fukuhara ,  Naotaka Tanaka ,  Fujiaki Nose

IPC分类号： H01L23/66 ,  H05K1/02 ,  H05K3/36 ,  H01L23/34

CPC分类号： H05K1/0243 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32188 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15173 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/1903 ,  H01L2924/19106 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0219 ,  H05K3/361 ,  H05K2201/10522 ,  H05K2201/1053 ,  H05K2201/10659 ,  H05K2201/10681 ,  H05K2201/10734 ,  H01L2924/00014 ,  H01L2924/00

摘要： A high-frequency signal from a tape-shaped line section having a surface layer signal lead and surface layer GND lead disposed on both sides thereof is directly inputted to a semiconductor chip via a signal surface layer wiring of a package substrate and through solder bump electrodes. Alternatively, a high-frequency signal from the semiconductor chip is outputted to the outside via the tape-shaped line section in reverse. Owing to the transmission of the high-frequency signal by only a microstrip line at the whole surface layer of the package substrate, the high-frequency signal can be transmitted by only the microstrip line at the surface layer without through vias or the like. Accordingly, the high-frequency signal can be transmitted without a loss in frequency characteristic, and a high-quality high-frequency signal can be transmitted with a reduction in loss at high-frequency transmission.