公开(公告)号：US06555418B2

公开(公告)日：2003-04-29

申请号：US09735617

申请日：2000-12-14

申请人： Tetsuya Kurosawa ,  Shigeo Sasaki

发明人： Tetsuya Kurosawa ,  Shigeo Sasaki

IPC分类号： H01L2148

CPC分类号： H01L21/67144 ,  H01L2221/68322 ,  H01L2924/0002 ,  Y10S156/943 ,  Y10T156/1983 ,  H01L2924/00

摘要： A push-up pin used for separating a semiconductor element attached by adhesive to an adhesive sheet of a semiconductor element pushing-up device in a die bonding apparatus from the adhesive sheet by pushing up the semiconductor element from the rear surface side of the adhesive sheet includes a tip end portion having a shape for applying pushing-up pressure with the thicknesses of the adhesive sheet and the adhesive kept constant when the pushing-up pressure for pushing up the semiconductor element from the rear surface side of the adhesive sheet is applied, and a base portion for supporting the tip end portion.

摘要翻译： 一种用于将由粘合剂附着的半导体元件与芯片接合装置中的半导体元件上推装置的粘合片从粘合片分离的上推销，其中该半导体元件从粘合片的后表面侧向上推 包括当施加用于从粘合片的后表面侧推上半导体元件的上推压力时，具有用于施加上推压力的形状的末端部分，其中粘合片和粘合剂的厚度保持恒定， 以及用于支撑前端部的基部。

公开(公告)号：US06201306B1

公开(公告)日：2001-03-13

申请号：US08760117

申请日：1996-12-03

申请人： Tetsuya Kurosawa ,  Shigeo Sasaki

发明人： Tetsuya Kurosawa ,  Shigeo Sasaki

IPC分类号： H01L2348

CPC分类号： H01L21/67144 ,  H01L2221/68322 ,  H01L2924/0002 ,  Y10S156/943 ,  Y10T156/1983 ,  H01L2924/00

摘要： A push-up pin used for separating a semiconductor element attached by adhesive to an adhesive sheet of a semiconductor element pushing-up device in a die bonding apparatus from the adhesive sheet by pushing up the semiconductor element from the rear surface side of the adhesive sheet includes a tip end portion having a shape for applying pushing-up pressure with the thicknesses of the adhesive sheet and the adhesive kept constant when the pushing-up pressure for pushing up the semiconductor element from the rear surface side of the adhesive sheet is applied, and a base portion for supporting the tip end portion.

摘要翻译： 一种用于将由粘合剂附着的半导体元件与芯片接合装置中的半导体元件上推装置的粘合片从粘合片分离的上推销，其中该半导体元件从粘合片的后表面侧向上推 包括当施加用于从粘合片的后表面侧推上半导体元件的上推压力时，具有用于施加上推压力的形状的末端部分，其中粘合片和粘合剂的厚度保持恒定， 以及用于支撑前端部的基部。

公开(公告)号：US08294282B2

公开(公告)日：2012-10-23

申请号：US12730007

申请日：2010-03-23

申请人： Hidekazu Hayashi ,  Hiroshi Tomita ,  Junya Sagara ,  Shinya Takyu ,  Norihiro Togasaki ,  Tetsuya Kurosawa ,  Yukiko Kitajima

发明人： Hidekazu Hayashi ,  Hiroshi Tomita ,  Junya Sagara ,  Shinya Takyu ,  Norihiro Togasaki ,  Tetsuya Kurosawa ,  Yukiko Kitajima

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/28 ,  H01L23/22

CPC分类号： C09J163/00 ,  C08K3/08 ,  C08K5/0091 ,  C08L63/00 ,  H01L23/3121 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/29 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/484 ,  H01L2224/732 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01051 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01088 ,  H01L2924/0665 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/45099 ,  H01L2224/05599

摘要： The present invention provides a semiconductor device which comprises a substrate, a first semiconductor chip on a substrate, a second semiconductor chip on the first semiconductor chip, and an adhesive sheet between the first and second semiconductor chips. The second semiconductor chip has a mirrored back surface, and the adhesive sheet contains a metal impurity ion trapping agent.

摘要翻译： 本发明提供一种半导体器件，其包括衬底，衬底上的第一半导体芯片，第一半导体芯片上的第二半导体芯片以及第一和第二半导体芯片之间的粘合片。 第二半导体芯片具有镜像背面，并且粘合片含有金属杂质离子捕获剂。

公开(公告)号：US07932162B2

公开(公告)日：2011-04-26

申请号：US12249025

申请日：2008-10-10

申请人： Junya Sagara ,  Shinya Takyu ,  Tetsuya Kurosawa

发明人： Junya Sagara ,  Shinya Takyu ,  Tetsuya Kurosawa

IPC分类号： H01L21/30

CPC分类号： H01L25/0657 ,  H01L21/6835 ,  H01L24/24 ,  H01L24/82 ,  H01L2221/6834 ,  H01L2224/24051 ,  H01L2224/24145 ,  H01L2224/24226 ,  H01L2224/24998 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/82001 ,  H01L2224/82007 ,  H01L2224/82102 ,  H01L2225/06524 ,  H01L2225/06562 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/10157 ,  H01L2924/10253 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/00

摘要： A method for manufacturing a stacked semiconductor package where a plurality of semiconductor chips are stacked on a substrate, including: forming insulating layers at portions of a wafer corresponding to sides of the plurality of semiconductor chips when the plurality of semiconductor chips are in the wafer; processing the wafer so as to obtain the plurality of semiconductor chips; subsequently stacking the plurality of semiconductor chips on the substrate such that the insulating layers formed at the sides of the plurality of semiconductor chips are respectively positioned at the same side as one another; and forming a wiring over the insulating layers formed at the sides of the plurality of semiconductor chips so that the plurality of semiconductor chips are electrically connected with one another and one or more of the plurality of semiconductor chips are electrically connected with the substrate.

摘要翻译： 一种叠层半导体封装的制造方法，其中多个半导体芯片堆叠在基板上，包括：当所述多个半导体芯片在所述晶片中时，在与所述多个半导体芯片的侧面对应的晶片的部分处形成绝缘层; 处理晶片以获得多个半导体芯片; 随后将多个半导体芯片堆叠在基板上，使得形成在多个半导体芯片的侧面的绝缘层分别位于彼此相同的一侧; 以及在形成在所述多个半导体芯片的侧面的绝缘层上形成布线，使得所述多个半导体芯片彼此电连接，并且所述多个半导体芯片中的一个或多个与所述基板电连接。

公开(公告)号：US20100311224A1

公开(公告)日：2010-12-09

申请号：US12782097

申请日：2010-05-18

申请人： Tetsuya Kurosawa ,  Junya Sagara ,  Shinya Takyu ,  Norihiro Togasaki

发明人： Tetsuya Kurosawa ,  Junya Sagara ,  Shinya Takyu ,  Norihiro Togasaki

IPC分类号： H01L21/78

CPC分类号： H01L21/78 ,  H01L21/561 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/3185 ,  H01L23/562 ,  H01L24/24 ,  H01L24/27 ,  H01L24/29 ,  H01L24/82 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/24051 ,  H01L2224/24145 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/24998 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/76155 ,  H01L2224/82001 ,  H01L2224/82007 ,  H01L2224/82102 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/838 ,  H01L2224/92 ,  H01L2225/06524 ,  H01L2225/06551 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0665 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/3512

摘要： According to one embodiment, a manufacturing method of a semiconductor device includes forming a plurality of first trenches in a semiconductor substrate, forming an insulating member in the first trenches, removing a part of a portion of the insulating member, forming second trenches in the insulating member, and attaching a protection film. The semiconductor substrate has a first and a second main surface. The insulating member has an upper face located higher than the first main surface. The portion is located higher than the first main surface.

摘要翻译： 根据一个实施例，半导体器件的制造方法包括在半导体衬底中形成多个第一沟槽，在第一沟槽中形成绝缘构件，去除绝缘构件的一部分的一部分，在绝缘体中形成第二沟槽 会员，并附上保护膜。 半导体衬底具有第一和第二主表面。 绝缘构件具有位于比第一主表面高的上表面。 该部分位于比第一主表面高的位置。

公开(公告)号：US07675153B2

公开(公告)日：2010-03-09

申请号：US11344063

申请日：2006-02-01

申请人： Tetsuya Kurosawa ,  Junya Sagara

发明人： Tetsuya Kurosawa ,  Junya Sagara

IPC分类号： H01L23/02

CPC分类号： H01L25/0657 ,  H01L21/6836 ,  H01L23/481 ,  H01L24/27 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L25/50 ,  H01L29/0657 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05684 ,  H01L2224/13144 ,  H01L2224/29012 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83194 ,  H01L2224/838 ,  H01L2224/8592 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10155 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/3512 ,  H01L2924/00012

摘要： Chips are stacked and mounted on a circuit board having external connection electrodes and mounted thereon by wire bonding. At least one of the chips stacked on the chip includes overhung portions each of which has a start point inside bonding pads, is made thinner in a direction towards the outer periphery to an end point reaching the side wall and forms a space used to accommodate ball bonding portions between the overhung portion and the main surface of the chip arranged in the lower stage on a backside corresponding in position to the bonding pads, and insulating members formed to cover the overhung portions and prevent bonding wires of the chip arranged in the lower stage from being brought into contact with the upper-stage chip.

摘要翻译： 芯片堆叠并安装在具有外部连接电极的电路板上并通过引线接合安装在其上。 堆叠在芯片上的芯片中的至少一个包括在接合焊盘内部具有起始点的悬垂部分，在朝向外周边的方向到达到侧壁的端点处形成较薄，并形成用于容纳球的空间 在布置在下层的芯片的悬臂部分和主表面之间的接合部分在与接合焊盘相对应的背面上形成绝缘部件，以及形成为覆盖悬臂部分的绝缘部件，并且防止布置在下部的芯片的接合线 不与上级芯片接触。

公开(公告)号：US20050196899A1

公开(公告)日：2005-09-08

申请号：US11072331

申请日：2005-03-07

申请人： Noriko Shimizu ,  Shinya Takyu ,  Tetsuya Kurosawa

发明人： Noriko Shimizu ,  Shinya Takyu ,  Tetsuya Kurosawa

IPC分类号： H01L21/301 ,  B28D5/00 ,  H01L21/78

CPC分类号： B28D5/0011 ,  B23K26/364 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/50 ,  H01L21/304 ,  H01L21/78 ,  Y10T83/041 ,  Y10T225/30

摘要： A starting point for cleavage made up of at least one of a groove and a through hole is formed on a chip dividing line or a dicing line along the cleaved surface of a wafer. Liquid matter is injected into the starting point. Then, the liquid matter is changed by applying an external factor that changes the liquid matter physically. Making use of the change, the wafer is cleaved so as to divide the wafer into semiconductor chips.

摘要翻译： 沿着切割面的芯片分割线或切割线形成由凹槽和通孔中的至少一个构成的切割的起始点。 将液体物质注入起点。 然后，通过施加物理地改变液体物质的外部因素来改变液体物质。 利用该变化，晶片被切割以将晶片分成半导体芯片。

公开(公告)号：US20050029628A1

公开(公告)日：2005-02-10

申请号：US10911493

申请日：2004-08-05

申请人： Tetsuya Kurosawa

发明人： Tetsuya Kurosawa

IPC分类号： B24B19/02 ,  H01L21/02 ,  H01L21/301 ,  H01L21/304 ,  H01L21/44 ,  H01L21/68 ,  H01L21/78 ,  H01L23/00 ,  H01L23/04 ,  H01L29/04 ,  H01L29/06

CPC分类号： H01L21/6835 ,  H01L21/304 ,  H01L21/78 ,  H01L23/562 ,  H01L29/0657 ,  H01L2221/6834 ,  H01L2924/0002 ,  H01L2924/3511 ,  H01L2924/00

摘要： A semiconductor element is formed in the major surface of a semiconductor chip. Curved surfaces having a radius of curvature of 0.5 to 50 μm are formed at at least some of edges where the side surfaces and backside surface of the semiconductor chip cross.

公开(公告)号：US20050006725A1

公开(公告)日：2005-01-13

申请号：US10845232

申请日：2004-05-14

申请人： Tetsuya Kurosawa ,  Yoshihisa Imori

发明人： Tetsuya Kurosawa ,  Yoshihisa Imori

IPC分类号： B24B47/02 ,  H01L21/00 ,  H01L21/02 ,  H01L21/301 ,  H01L21/304 ,  H01L21/44 ,  H01L21/78

CPC分类号： H01L21/78 ,  H01L21/304

摘要： A semiconductor device includes: a substrate having a main surface, a rear surface and four side surfaces; a semiconductor element formed on the main surface of the substrate; a notch formed in at least one bottom part of the side surfaces of the substrate; and a curved surface provided at an intersection of a side surface of the notch and the rear surface of the substrate.

摘要翻译： 半导体器件包括：具有主表面，后表面和四个侧表面的衬底; 形成在所述基板的主表面上的半导体元件; 形成在所述基板的侧表面的至少一个底部中的切口; 以及设置在所述凹口的侧表面和所述基板的后表面的交叉点处的弯曲表面。

公开(公告)号：US06699774B2

公开(公告)日：2004-03-02

申请号：US10306008

申请日：2002-11-29

申请人： Shinya Takyu ,  Tetsuya Kurosawa

发明人： Shinya Takyu ,  Tetsuya Kurosawa

IPC分类号： H01L21301

CPC分类号： H01L21/78

摘要： Notches are formed in a surface of a wafer on which semiconductor elements have been formed. Then, a surface protection tape is stuck to the element-formed surface of the wafer. Subsequently, the wafer is cleaved along a crystal orientation using the notches as starting points. Finally, a back surface of the wafer is ground.

摘要翻译： 在其上形成有半导体元件的晶片的表面上形成有凹口。 然后，将表面保护带粘贴在晶片的元件形成表面上。 随后，使用凹口作为起始点，沿着晶体取向切割晶片。 最后，研磨晶片的背面。