公开(公告)号：US5309021A

公开(公告)日：1994-05-03

申请号：US961352

申请日：1992-10-15

申请人： Haruo Shimamoto ,  Jun Shibata ,  Toru Tachikawa ,  Tetsuya Ueda ,  Hiroshi Seki

发明人： Haruo Shimamoto ,  Jun Shibata ,  Toru Tachikawa ,  Tetsuya Ueda ,  Hiroshi Seki

IPC分类号： H01L21/60 ,  H01L23/28 ,  H01L23/495 ,  H01L23/50 ,  H05K1/02 ,  H05K3/34 ,  H01L39/02 ,  H01L23/58 ,  H01L23/12 ,  H01L23/48

CPC分类号： H01L23/49527 ,  H01L23/49517 ,  H05K3/341 ,  H01L2224/451 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/30107 ,  H05K1/0263 ,  H05K2201/10659 ,  H05K2201/10689 ,  H05K3/3426 ,  Y02P70/613

摘要： A semiconductor device according to the present invention has reduced inductance on a power supply line, a grounding line, and signal lines. In this invention, to reduce the length of the power supply connection and that of the grounding connection, a power supply metal post and a grounding metal post are respectively provided on a power supply lead of a semiconductor chip and grounding lead of the semiconductor chip perpendicular to the leads. The metal posts protrude from the resin encapsulating the chip and are connected to lands or a conductive circuit pattern on a printed circuit board. Furthermore, a planar conductor commonly connecting the power supply or grounding potentials is provided.

摘要翻译： 根据本发明的半导体器件具有减小电源线，接地线和信号线上的电感。 在本发明中，为了减小电源连接的长度和接地连接的长度，分别在半导体芯片的电源引线和半导体芯片的接地引线垂直地设置电源金属柱和接地金属柱 到线索 金属柱从封装芯片的树脂突出，并连接到印刷电路板上的焊盘或导电电路图案。 此外，提供通常连接电源或接地电位的平面导体。

公开(公告)号：US5834340A

公开(公告)日：1998-11-10

申请号：US977666

申请日：1997-11-24

申请人： Akiyoshi Sawai ,  Haruo Shimamoto ,  Toru Tachikawa ,  Jun Shibata

发明人： Akiyoshi Sawai ,  Haruo Shimamoto ,  Toru Tachikawa ,  Jun Shibata

IPC分类号： H01L21/56 ,  H01L21/58 ,  H01L21/60 ,  H01L21/68 ,  H01L23/12 ,  H01L23/28 ,  H01L23/31 ,  H01L23/367 ,  H01L23/485 ,  H01L23/498 ,  H05K3/30 ,  H01L21/44

CPC分类号： H01L21/568 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/28 ,  H01L24/83 ,  H01L2224/11 ,  H01L2224/11003 ,  H01L2224/1147 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/17051 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/73203 ,  H01L2224/81207 ,  H01L2224/83102 ,  H01L2224/83104 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2224/92125 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/1579 ,  H01L2924/181 ,  Y10T29/49169

摘要： A pad electrode is formed on a main surface of a semiconductor chip. A passivation film, which covers a surface portion of the pad electrode, is formed on the main surface of the semiconductor chip. An internal connection conductor is formed on a surface portion of the pad electrode. The semiconductor chip is covered with a molding resin which exposes only a top surface of the internal connection conductor. An external connection conductor is formed on a top surface of the internal connection conductor. The external connection conductor has a substantially flat top surface. Thereby, a plastic molded semiconductor package can be easily mounted on a printed board, and can have improved reliability after being joined on the printed board.

公开(公告)号：US5710062A

公开(公告)日：1998-01-20

申请号：US456335

申请日：1995-06-01

申请人： Akiyoshi Sawai ,  Haruo Shimamoto ,  Toru Tachikawa ,  Jun Shibata

发明人： Akiyoshi Sawai ,  Haruo Shimamoto ,  Toru Tachikawa ,  Jun Shibata

IPC分类号： H01L21/56 ,  H01L21/58 ,  H01L21/60 ,  H01L21/68 ,  H01L23/12 ,  H01L23/28 ,  H01L23/31 ,  H01L23/367 ,  H01L23/485 ,  H01L23/498 ,  H05K3/30 ,  H01L21/28

CPC分类号： H01L21/568 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/28 ,  H01L24/83 ,  H01L2224/11 ,  H01L2224/11003 ,  H01L2224/1147 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/17051 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/73203 ,  H01L2224/81207 ,  H01L2224/83102 ,  H01L2224/83104 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2224/92125 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/1579 ,  H01L2924/181 ,  Y10T29/49169

摘要： A pad electrode is formed on a main surface of a semiconductor chip. A passivation film, which covers a surface portion of the pad electrode, is formed on the main surface of the semiconductor chip. An internal connection conductor is formed on a surface portion of the pad electrode. The semiconductor chip is covered with a molding resin which exposes only a top surface of the internal connection conductor. An external connection conductor is formed on a top surface of the internal connection conductor. The external connection conductor has a substantially flat top surface. Thereby, a plastic molded semiconductor package can be easily mounted on a printed board, and can have improved reliability after being joined on the printed board.

公开(公告)号：US6046071A

公开(公告)日：2000-04-04

申请号：US976603

申请日：1997-11-24

申请人： Akiyoshi Sawai ,  Haruo Shimamoto ,  Toru Tachikawa ,  Jun Shibata

发明人： Akiyoshi Sawai ,  Haruo Shimamoto ,  Toru Tachikawa ,  Jun Shibata

IPC分类号： H01L21/56 ,  H01L21/58 ,  H01L21/60 ,  H01L21/68 ,  H01L23/12 ,  H01L23/28 ,  H01L23/31 ,  H01L23/367 ,  H01L23/485 ,  H01L23/498 ,  H05K3/30 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L21/568 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/28 ,  H01L24/83 ,  H01L2224/11 ,  H01L2224/11003 ,  H01L2224/1147 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/17051 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/73203 ,  H01L2224/81207 ,  H01L2224/83102 ,  H01L2224/83104 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2224/92125 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/1579 ,  H01L2924/181 ,  Y10T29/49169

摘要： A pad electrode is formed on a main surface of a semiconductor chip. A passivation film, which covers a surface portion of the pad electrode, is formed on the main surface of the semiconductor chip. An internal connection conductor is formed on a surface portion of the pad electrode. The semiconductor chip is covered with a molding resin which exposes only a top surface of the internal connection conductor. An external connection conductor is formed on a top surface of the internal connection conductor. The external connection conductor has a substantially flat top surface. Thereby, a plastic molded semiconductor package can be easily mounted on a printed board, and can have improved reliability after being joined on the printed board.

摘要翻译： 在半导体芯片的主表面上形成焊盘电极。 在半导体芯片的主表面上形成覆盖焊盘电极的表面部分的钝化膜。 在焊盘电极的表面部分上形成内部连接导体。 半导体芯片被仅暴露内部连接导体顶表面的模制树脂覆盖。 外部连接导体形成在内部连接导体的顶表面上。 外部连接导体具有基本平坦的顶表面。 因此，塑料成型半导体封装可以容易地安装在印刷电路板上，并且可以在印刷电路板上接合之后具有改进的可靠性。

公开(公告)号：US5554887A

公开(公告)日：1996-09-10

申请号：US234808

申请日：1994-04-28

申请人： Akiyoshi Sawai ,  Haruo Shimamoto ,  Toru Tachikawa ,  Jun Shibata

发明人： Akiyoshi Sawai ,  Haruo Shimamoto ,  Toru Tachikawa ,  Jun Shibata

IPC分类号： H01L21/56 ,  H01L21/58 ,  H01L21/60 ,  H01L21/68 ,  H01L23/12 ,  H01L23/28 ,  H01L23/31 ,  H01L23/367 ,  H01L23/485 ,  H01L23/498 ,  H05K3/30

CPC分类号： H01L21/568 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/28 ,  H01L24/83 ,  H01L2224/11 ,  H01L2224/11003 ,  H01L2224/1147 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/17051 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/73203 ,  H01L2224/81207 ,  H01L2224/83102 ,  H01L2224/83104 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2224/92125 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/1579 ,  H01L2924/181 ,  Y10T29/49169

摘要： A pad electrode is formed on a main surface of a semiconductor chip. A passivation film, which covers a surface portion of the pad electrode, is formed on the main surface of the semiconductor chip. An internal connection conductor is formed on a surface portion of the pad electrode. The semiconductor chip is covered with a molding resin which exposes only a top surface of the internal connection conductor. An external connection conductor is formed on a top surface of the internal connection conductor. The external connection conductor has a substantially flat top surface. Thereby, a plastic molded semiconductor package can be easily mounted on a printed board, and can have improved reliability after being joined on the printed board.

摘要翻译： 在半导体芯片的主表面上形成焊盘电极。 在半导体芯片的主表面上形成覆盖焊盘电极的表面部分的钝化膜。 在焊盘电极的表面部分上形成内部连接导体。 半导体芯片被仅暴露内部连接导体顶表面的模制树脂覆盖。 外部连接导体形成在内部连接导体的顶表面上。 外部连接导体具有基本平坦的顶表面。 因此，塑料成型半导体封装可以容易地安装在印刷电路板上，并且可以在印刷电路板上接合之后具有改进的可靠性。

公开(公告)号：US6071755A

公开(公告)日：2000-06-06

申请号：US360484

申请日：1999-07-23

申请人： Shinji Baba ,  Jun Shibata ,  Tetsuya Ueda

发明人： Shinji Baba ,  Jun Shibata ,  Tetsuya Ueda

IPC分类号： H01L21/60 ,  H01L21/56 ,  H01L21/68 ,  H01L23/12 ,  H01L23/31 ,  H01L23/433 ,  H01L23/498 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L21/568 ,  H01L23/3128 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/16 ,  H01L2221/68345 ,  H01L2224/11003 ,  H01L2224/1147 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/351

摘要： A semiconductor device includes an encapsulating resin encapsulating a semiconductor substrate, a lead pattern or a laminated wiring layers transferred or secured on the lower surface of the encapsulating resin and a plurality of external electrode disposed on the lower surface of the lead pattern. The device may be manufactured by bonding a semiconductor substrate to a transferring substrate on which a lead pattern is formed, resin encapsulating an upper portion of the transferring substrate to cover the semiconductor substrate, and removing only the transferring substrate with the lead pattern left bonded to the encapsulating resin and the semiconductor substrate.

摘要翻译： 半导体器件包括封装半导体衬底的封装树脂，引线图案或被转移或固定在封装树脂的下表面上的层叠布线层和设置在引线图案的下表面上的多个外部电极。 该器件可以通过将半导体衬底粘合到其上形成引线图案的转印衬底上，将封装转印衬底的上部的树脂覆盖半导体衬底，并且仅将转印衬底除去，并将引线图案留下 封装树脂和半导体衬底。

公开(公告)号：US5701033A

公开(公告)日：1997-12-23

申请号：US593965

申请日：1996-01-30

申请人： Tetsuya Ueda ,  Jun Shibata ,  Yomiyuki Yama

发明人： Tetsuya Ueda ,  Jun Shibata ,  Yomiyuki Yama

IPC分类号： H01L23/04 ,  H01L23/02 ,  H01L23/057 ,  H01L23/13 ,  H01L23/64 ,  H01L23/12 ,  H01L23/28 ,  H01L23/34

CPC分类号： H01L23/057 ,  H01L23/13 ,  H01L23/642 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49109 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/01079 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/16195 ,  H01L2924/19041 ,  Y10S257/924

摘要： A semiconductor device comprising a substrate having a hollow cavity for mounting a semiconductor element therein and a lowered step surface at a periphery of the cavity for mounting a chip component thereon. A semiconductor element is mounted within the cavity and a chip capacitor is mounted to the lowered step surface. The semiconductor element and the chip component are adapted to be connected to an external circuit through electrical conductors. A cap is attached to the substrate and a seal material is filled into a space defined between the cap and the substrate for sealing the cavity and for encapsulating the chip component on the lowered step surface which may extend along the entire periphery of the cavity. The cap may include a projection adapted to abut gainst a side wall of the lowered step surface, or alternatively, the lowered step surface may include a side wall having a projection adapted to abut against periphery of the cap. The semiconductor device may further comprise a heat sink attached to the semiconductor element.

摘要翻译： 一种半导体器件，包括具有用于将半导体元件安装在其中的中空腔的衬底和用于在其上安装芯片部件的空腔周围的降低的台阶表面。 半导体元件安装在空腔内，并且片状电容器安装到降低的台阶表面。 半导体元件和芯片部件适于通过电导体连接到外部电路。 盖子连接到基板上，并且将密封材料填充到限定在盖和基板之间的空间中，用于密封空腔并将芯片部件封装在可沿着空腔的整个周边延伸的降低的台阶表面上。 帽可以包括适于抵靠降低的台阶表面的侧壁的突起，或者替代地，降低的台阶表面可以包括具有适于抵靠盖的周边的突起的侧壁。 半导体器件还可以包括附接到半导体元件的散热器。

公开(公告)号：US5969426A

公开(公告)日：1999-10-19

申请号：US571604

申请日：1995-12-13

申请人： Shinji Baba ,  Jun Shibata ,  Tetsuya Ueda

发明人： Shinji Baba ,  Jun Shibata ,  Tetsuya Ueda

IPC分类号： H01L21/60 ,  H01L21/56 ,  H01L21/68 ,  H01L23/12 ,  H01L23/31 ,  H01L23/433 ,  H01L23/498 ,  H01L23/28 ,  H01L23/48

CPC分类号： H01L21/568 ,  H01L23/3128 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/16 ,  H01L2221/68345 ,  H01L2224/11003 ,  H01L2224/1147 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/351

摘要： A semiconductor device includes an encapsulating resin encapsulating a semiconductor substrate, a lead pattern or a laminated wiring layers transferred or secured on the lower surface of the encapsulating resin and a plurality of external electrode disposed on the lower surface of the lead pattern. The device may be manufactured by bonding a semiconductor substrate on a transferring substrate to which a lead pattern is formed, resin encapsulating an upper portion of the transferring substrate to cover the semiconductor substrate, and removing only the transferring substrate with the lead pattern left bonded to the encapsulating resin and the semiconductor substrate.

摘要翻译： 半导体器件包括封装半导体衬底的封装树脂，引线图案或被转移或固定在封装树脂的下表面上的层叠布线层和设置在引线图案的下表面上的多个外部电极。 该器件可以通过将半导体衬底接合到其上形成引线图案的转印衬底上，将封装转印衬底的上部的树脂覆盖半导体衬底，并且仅将转印衬底除去，并将引线图案留下 封装树脂和半导体衬底。

公开(公告)号：US06256875B1

公开(公告)日：2001-07-10

申请号：US09400912

申请日：1999-09-22

申请人： Masaki Watanabe ,  Akiyoshi Sawai ,  Yoshikazu Narutaki ,  Tomoaki Hashimoto ,  Masatoshi Yasunaga ,  Jun Shibata ,  Hiroshi Seki ,  Kazuhiko Kurafuchi ,  Katsunori Asai

发明人： Masaki Watanabe ,  Akiyoshi Sawai ,  Yoshikazu Narutaki ,  Tomoaki Hashimoto ,  Masatoshi Yasunaga ,  Jun Shibata ,  Hiroshi Seki ,  Kazuhiko Kurafuchi ,  Katsunori Asai

IPC分类号： H05K336

CPC分类号： H01L24/49 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/3675 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3025 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： The minimum spacing between wires disposed on a printed circuit board of a printed circuit board ball grid array package is reduced. Wiring layers are narrower than in the prior art because they are not plated and because only one metal layer is plated on the wiring layers. The narrower wiring layers can be formed easily with small spaces between wires.

摘要翻译： 设置在印刷电路板球栅阵列封装的印刷电路板上的布线之间的最小间距减小。 接线层比现有技术更窄，因为它们不被电镀，并且因为在布线层上仅镀一个金属层。 可以容易地形成较窄的布线层，导线之间的间隔较小。

公开(公告)号：US6005289A

公开(公告)日：1999-12-21

申请号：US738935

申请日：1996-10-24

申请人： Masaki Watanabe ,  Akiyoshi Sawai ,  Yoshikazu Narutaki ,  Tomoaki Hashimoto ,  Masatoshi Yasunaga ,  Jun Shibata ,  Hiroshi Seki ,  Kazuhiko Kurafuchi ,  Katsunori Asai

发明人： Masaki Watanabe ,  Akiyoshi Sawai ,  Yoshikazu Narutaki ,  Tomoaki Hashimoto ,  Masatoshi Yasunaga ,  Jun Shibata ,  Hiroshi Seki ,  Kazuhiko Kurafuchi ,  Katsunori Asai

IPC分类号： H05K3/46 ,  H01L21/48 ,  H01L23/12 ,  H01L23/13 ,  H01L23/367 ,  H01L23/498 ,  H01L23/053 ,  H01L23/48

CPC分类号： H01L24/49 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/3675 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49833 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/16195 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3025 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49165

摘要： The minimum spacing between wires disposed on a printed circuit board of a printed circuit board ball grid array package is reduced. Wiring layers are narrower than in the prior art because they are not plated and because only one metal layer is plated on the wiring layers. The narrower wiring layers can be formed easily with small spaces between wires.

摘要翻译： 设置在印刷电路板球栅阵列封装的印刷电路板上的布线之间的最小间距减小。 接线层比现有技术更窄，因为它们不被电镀，并且因为在布线层上仅镀一个金属层。 可以容易地形成较窄的布线层，导线之间的间隔较小。