公开(公告)号：US20110181245A1

公开(公告)日：2011-07-28

申请号：US12728288

申请日：2010-03-22

Applicant: Chin-Long Wey ,  Chun-Ming Huang ,  Shih-Lun Chen ,  Chi-Sheng Lin ,  Ting-Hsu Chien ,  Jiann-Jenn Wang

Inventor： Chin-Long Wey ,  Chun-Ming Huang ,  Shih-Lun Chen ,  Chi-Sheng Lin ,  Ting-Hsu Chien ,  Jiann-Jenn Wang

IPC: H02J7/00

CPC classification number: H02J7/0016 ,  H02J7/0019 ,  H02J7/0024 ,  Y02T10/7055

Abstract: The present invention discloses a unitized charging and discharging battery management system and a programmable battery management module thereof The unitized charging and discharging battery management system includes a smart battery module and a programmable battery management module, which has a universal loop and a control unit. The smart battery module has at least two smart batteries which are electrically connected by a plurality of switches and circuits of the universal loop to form a charging/discharging loop in series/parallel. The control unit monitors the charging and discharging status of the smart batteries to turn on or off the switches accordingly, so as to manage the smart batteries, thereby enhancing the overall power efficacy of the smart battery module. Besides, the service life of the smart battery module is also prolonged due to the simultaneous charging and discharging capability.

Abstract translation: 本发明公开了一种单元化充放电电池管理系统及其可编程电池管理模块。该单元化充放电电池管理系统包括智能电池模块和可编程电池管理模块，其具有通用回路和控制单元。 智能电池模块具有至少两个智能电池，其通过多个开关和通用回路的电路电连接以形成串/并联的充电/放电回路。 控制单元监视智能电池的充电和放电状态，以相应地打开或关闭开关，以便管理智能电池，从而提高智能电池模块的整体功率效率。 此外，智能电池模块的使用寿命也由于同时的充放电能力而延长。

公开(公告)号：US07449962B2

公开(公告)日：2008-11-11

申请号：US11523637

申请日：2006-09-20

Applicant: Ting-Hsu Chien ,  Chi-Sheng Lin

Inventor： Ting-Hsu Chien ,  Chi-Sheng Lin

IPC: H03L7/085

CPC classification number: H03L7/085 ,  H03L7/0895

Abstract: A phase-controlled current source for phase-locked loop is provided. The phase-locked loop includes a voltage-controlled oscillator to associate a charging path or discharging path in order to generate an output signal and the output signal is further sensed so as to generate a loop signal. The phase-controlled current source includes a status memory receiving the loop signal and the reference signal so as to output an energy-triggering/energy-removing signal; and a controllable current source, under the control by energy-triggering/energy-removing signal so as to decide whether a charging and discharging action should be performed, wherein after the charging action or discharging action is decided, the charging path or the discharging path is generated through the reference signal and the loop signal.

Abstract translation: 提供了一个用于锁相环的相控电流源。 锁相环包括压控振荡器，以将充电路径或放电路径相关联，以便产生输出信号，并且进一步感测输出信号以产生回路信号。 相控电流源包括接收回路信号和参考信号的状态存储器，以输出能量触发/能量消除信号; 以及可控电流源，在能量触发/能量去除信号的控制下，以决定是否应执行充电和放电动作，其中在确定充电动作或放电动作之后，充电路径或放电路径 通过参考信号和环路信号产生。

公开(公告)号：US20080129389A1

公开(公告)日：2008-06-05

申请号：US11523637

申请日：2006-09-20

Applicant: Ting-Hsu Chien ,  Chi-Sheng Lin

Inventor： Ting-Hsu Chien ,  Chi-Sheng Lin

IPC: H03L7/00

CPC classification number: H03L7/085 ,  H03L7/0895

Abstract: A phase-controlled current source for phase-locked loop, the phase-locked loop comprises of a voltage-controlled oscillator to associate a charging path or discharging path in order to generate an output signal and the output signal is further sensed so as to generate a loop signal, then, together with a reference signal, these signals are used to control phase-controlled current source. Phase-controlled current source comprises of a status memory and a controllable current source and the status memory receives reference signal and loop signal in order to generate an energy-triggering/energy-removing signal, controllable current source then follows the energy-triggering/energy-removing signal to decide if to perform charging or discharging behavior; after charging or discharging behavior is decided, loop signal will decide the charging path or discharging path for the controllable current source based on reference signal so as to perform charging or discharging behavior. Phase-controlled current source is used in the current invention which can eliminate the inherent dead zone problem in the prior art phase detector and electric charge pump. Additionally, the electrical circuit is simple and no signal feedback mechanism needs to be adopted, therefore, the system operation frequency can be greatly enhanced.

Abstract translation: 用于锁相环的相位控制电流源，锁相环包括压控振荡器以将充电路径或放电路径相关联，以便产生输出信号，并且进一步感测输出信号以产生 一个环路信号，然后与参考信号一起使用这些信号来控制相位控制的电流源。 相控电流源包括状态存储器和可控电流源，并且状态存储器接收参考信号和环路信号，以便产生能量触发/能量去除信号，然后可控电流源遵循能量触发/能量 - 去除信号以决定是否执行充电或放电行为; 在充电或放电行为决定后，环路信号将基于参考信号决定可控电流源的充电路径或放电路径，以便执行充电或放电行为。 在本发明中使用相控电流源，其可以消除现有技术的相位检测器和电荷泵中的固有死区问题。 此外，电路简单，不需要采用信号反馈机制，因此可大大提高系统运行频率。

公开(公告)号：US20130110465A1

公开(公告)日：2013-05-02

申请号：US13312219

申请日：2011-12-06

Applicant: Chun-Ming Huang ,  Chi-Sheng Lin ,  Chien-Ming Wu

Inventor： Chun-Ming Huang ,  Chi-Sheng Lin ,  Chien-Ming Wu

IPC: G06F17/40

CPC classification number: G01R31/2856 ,  G01R31/31707

Abstract: A chip structure having a history recording unit is provided. The chip structure includes a core circuit unit in addition to the history recording unit. The history recording unit includes a sensing unit, a record unit, and a deliver unit. The sensing unit detects the status of the core circuit unit and generates history information accordingly. The history information is saved into the record unit and can be further output by the deliver unit. Thus, the history information of the chip structure can be recorded and effectively used to eliminate the reliability problem of the chip structure.

Abstract translation: 提供具有历史记录单元的芯片结构。 除了历史记录单元之外，芯片结构还包括核心电路单元。 历史记录单元包括感测单元，记录单元和传送单元。 感测单元检测核心电路单元的状态并相应地生成历史信息。 历史信息被保存到记录单元中，并且可以由传送单元进一步输出。 因此，可以记录和有效地利用芯片结构的历史信息来消除芯片结构的可靠性问题。

公开(公告)号：US20110188210A1

公开(公告)日：2011-08-04

申请号：US12752345

申请日：2010-04-01

Applicant: Chun-Ming Huang ,  Chin-Long Wey ,  Chien-Ming Wu ,  Chih-Chyau Yang ,  Shih-Lun Chen ,  Chi-Shi Chen ,  Chi-Sheng Lin

Inventor： Chun-Ming Huang ,  Chin-Long Wey ,  Chien-Ming Wu ,  Chih-Chyau Yang ,  Shih-Lun Chen ,  Chi-Shi Chen ,  Chi-Sheng Lin

IPC: H05K1/14 ,  H05K7/00

CPC classification number: H05K1/14 ,  H01L2224/16227 ,  H01L2924/15153 ,  H01L2924/15311 ,  H05K7/00

Abstract: A three-dimensional SoC structure formed by stacking multiple chip modules is provided. The three-dimensional SoC structure includes at least two vertical SoC modules and at least one connector module, wherein each connector module electrically connects two vertical SoC modules. Each vertical SoC module is constructed by stacking at least two chip modules vertically. Each chip module includes a module circuit board and at least one preset element. A recess is formed in each module circuit board and provided with a first connecting interface for electrically connecting with the corresponding at least one preset element. The at least two vertical SoC modules are connected by the connector module to form a three-dimensional SoC structure with multiple functions. Besides, the recesses formed in the module circuit boards provide effective heat dissipation paths for the preset elements.

Abstract translation: 提供了通过堆叠多个芯片模块形成的三维SoC结构。 三维SoC结构包括至少两个垂直SoC模块和至少一个连接器模块，其中每个连接器模块电连接两个垂直SoC模块。 每个垂直SoC模块通过垂直堆叠至少两个芯片模块构成。 每个芯片模块包括模块电路板和至少一个预设元件。 在每个模块电路板中形成凹部，并设置有用于与相应的至少一个预设元件电连接的第一连接接口。 至少两个垂直SoC模块通过连接器模块连接，形成具有多种功能的三维SoC结构。 此外，形成在模块电路板中的凹部为预设元件提供有效的散热路径。

公开(公告)号：US07056164B2

公开(公告)日：2006-06-06

申请号：US10896907

申请日：2004-07-23

Applicant: Shao-Hwa Wang ,  Chi-Sheng Lin

Inventor： Shao-Hwa Wang ,  Chi-Sheng Lin

IPC: H01R9/22

CPC classification number: H05K7/142 ,  Y10T29/49128 ,  Y10T29/49718

Abstract: A method for repairing and assembling contact image sensor module and structure thereof are provided. The method includes following steps: (1) making a sensor housing; (2) providing a PCB; (3) assembling the PCB into the sensor housing; (4) melting an end of a securing post located on the sensor housing and forming fastening means for fixing the PCB to the sensor housing; (5) testing the assembled CIS, if it can't pass the test, then cut off the fastening means and take away the PCB for repairing or replacing it; (6) cutting off the securing post located on the housing; (7) making an adapted post with a securing tip and fixing said adapted post to a corresponding position of the sensor housing on which the former securing post being located; (8) assembling the repaired or replaced PCB into the sensor housing, and make the securing tip of the adapted post passing through the securing hole and extending outwardly from the PCB; (9) melting the tip of the adapted post by the manner of hot-press and forming a new fastening means for fixing the repaired or replaced PCB to the sensor housing again.

Abstract translation: 提供了一种修复和组装接触式图像传感器模块及其结构的方法。 该方法包括以下步骤：（1）制作传感器外壳; （2）提供PCB; （3）将PCB组装到传感器外壳中; （4）熔化位于传感器壳体上的固定杆的端部，并形成用于将PCB固定到传感器壳体的紧固装置; （5）测试组装的CIS，如果不能通过测试，则切断紧固装置并取出PCB进行修理或更换; （6）切断位于壳体上的固定柱; （7）制成具有固定尖端的适配柱，并将所述适配柱固定到位于所述前固定柱的所述传感器壳体的对应位置; （8）将修理或更换的PCB组装到传感器壳体中，并使适配柱的固定尖端穿过固定孔并从PCB向外延伸; （9）通过热压方式熔化适配柱的末端，并形成用于将修复或更换的PCB再次固定到传感器壳体的新的紧固装置。

公开(公告)号：US20120299877A1

公开(公告)日：2012-11-29

申请号：US13296385

申请日：2011-11-15

Applicant: Shao-Keng Huang ,  Shin-Chang Chen ,  Chi-Sheng Lin

Inventor： Shao-Keng Huang ,  Shin-Chang Chen ,  Chi-Sheng Lin

IPC: G06F3/042

CPC classification number: G06F3/0421

Abstract: An optical touch display device is provided. The optical touch display device includes a front frame, a light guide strip, a photosensitive element, and a light source. The front frame includes a body portion having a display opening, at least one positioning board located on a corner of the body portion, and a protecting cover located on the body portion. An end of the protecting cover is adjacent to the positioning board. An opening groove is defined between the protecting cover and the body portion. The body portion, the positioning board, and the protecting cover are integrally formed. The light guide strip is placed in the opening groove. The photosensitive element is fixed on the positioning board. The light source is located between the photosensitive element and the light guide strip, and a light-emitting side of the light source faces a light inlet side of the light guide strip.

Abstract translation: 提供了一种光学触摸显示装置。 光学触摸显示装置包括前框架，导光条，感光元件和光源。 前框架包括具有显示开口的主体部分，位于主体部分的角部上的至少一个定位板和位于主体部分上的保护盖。 保护盖的一端与定位板相邻。 在保护盖和主体部分之间限定开口槽。 主体部分，定位板和保护盖一体形成。 导光条被放置在开口槽中。 光敏元件固定在定位板上。 光源位于感光元件和导光条之间，光源的发光侧面对导光条的光入射侧。

公开(公告)号：US08219879B2

公开(公告)日：2012-07-10

申请号：US12707848

申请日：2010-02-18

Applicant: Chien-Ming Wu ,  Ming-Der Shieh ,  Chun-Ming Huang ,  Chi-Sheng Lin ,  Shih-Hao Fang ,  Shing-Chung Tang

Inventor： Chien-Ming Wu ,  Ming-Der Shieh ,  Chun-Ming Huang ,  Chi-Sheng Lin ,  Shih-Hao Fang ,  Shing-Chung Tang

IPC: H03M13/00 ,  G11C29/00 ,  G06F11/00

CPC classification number: H03M13/116 ,  H03M13/1137 ,  H03M13/6505 ,  H03M13/6566

Abstract: A method for arranging memories of a low-complexity low-density parity-check (LDPC) decoder and a low-complexity LDPC decoder using the same method are provided. The main idea of the method for arranging memories of a low-complexity LDPC decoder is to merge at least one or two small-capacity memory blocks into one memory group, so that the memory area can be reduced and the power consumption in reading or writing data is lowered. Besides, as the merged memory group shares the same address line in reading or writing data, at least one delay unit is used to adjust the reading or writing order and thereby ensure data validity. A low-complexity LDPC decoder using the disclosed method can meet the demands of high processing rate and low power consumption.

Abstract translation: 提供了一种用于使用相同方法来布置低复杂度低密度奇偶校验（LDPC）解码器和低复杂度LDPC解码器的存储器的方法。 用于布置低复杂度LDPC解码器的存储器的方法的主要思想是将至少一个或两个小容量存储器块合并到一个存储器组中，使得存储器区域可以减少，读取或写入中的功耗 数据降低。 此外，由于合并的存储器组在读取或写入数据时共享相同的地址线，所以使用至少一个延迟单元来调整读取或写入顺序，从而确保数据的有效性。 使用所公开的方法的低复杂度LDPC解码器可以满足高处理速率和低功耗的需求。

公开(公告)号：US20130291628A1

公开(公告)日：2013-11-07

申请号：US13547061

申请日：2012-07-12

Applicant: Chun-ming Huang ,  Chen-chia Chen ,  Chi-Sheng Lin ,  Chien-ming Wu

Inventor： Chun-ming Huang ,  Chen-chia Chen ,  Chi-Sheng Lin ,  Chien-ming Wu

IPC: G01N33/49 ,  G01N21/85 ,  G01N27/74

CPC classification number: G01N21/85 ,  G01N15/0272 ,  G01N2015/0065 ,  G01N2021/8571

Abstract: A microparticle detecting apparatus is disclosed and includes at least one detection unit, each of which includes: a first sieve having at least a first mesh, a separator stacked on one side of the first sieve and having a separator hole, and a second sieve stacked on one side of the separator and having several second meshes. The diameter of the second mesh is smaller than that of the first mesh, and the first and second meshes are misaligned with each other in a vertical direction of the first and second sieves. The detection unit further includes at least a sensor aligned with the first or second mesh for detecting microparticles trapping into the first mesh or passing through the second mesh. Therefore, the microparticle detecting apparatus is suitably used for detecting or counting any microparticles with different size, to effectively shorten the detection processes of sample fluids.

Abstract translation: 公开了一种微粒检测装置，包括至少一个检测单元，每个检测单元包括：具有至少第一筛网的第一筛网，堆叠在第一筛子的一侧上并具有分隔件孔的隔板，以及堆叠的第二筛 在分离器的一侧并具有多个第二网格。 第二网格的直径小于第一网格的直径，并且第一和第二网格在第一和第二筛网的垂直方向上彼此不对准。 检测单元还包括至少一个与第一或第二网格对准的传感器，用于检测捕获到第一网孔中的微粒或通过第二网孔。 因此，微粒检测装置适合用于检测或计数不同尺寸的微粒，以有效地缩短样品流体的检测过程。

公开(公告)号：US08199510B2

公开(公告)日：2012-06-12

申请号：US12685723

申请日：2010-01-12

Applicant: Chun-Ming Huang ,  Chien-Ming Wu ,  Chih-Chyau Yang ,  Shih-Lun Chen ,  Chin-Long Wey ,  Chi-Shi Chen ,  Chi-Sheng Lin

Inventor： Chun-Ming Huang ,  Chien-Ming Wu ,  Chih-Chyau Yang ,  Shih-Lun Chen ,  Chin-Long Wey ,  Chi-Shi Chen ,  Chi-Sheng Lin

IPC: H05K7/20

CPC classification number: H05K7/20 ,  H01L23/49833 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2225/1094 ,  H05K1/0272 ,  H05K1/144 ,  H05K1/181 ,  H05K3/284 ,  H05K2201/064 ,  H05K2201/09063 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2201/2018 ,  H05K2203/1572

Abstract: A multi-layer system-on-chip (SoC) module structure is provided. The multi-layer SoC module structure includes at least two circuit board module layers and at least one connector module layer. Each connector module layer is sandwiched between and thus electrically connects two circuit board module layers such that the SoC module structure is formed by stacking. Each circuit board module layer is composed of at least one circuit board module while each connector module layer is composed of at least one connector module. Hence, the SoC module structure can be manufactured as a three-dimensional structure, thus allowing highly flexible connections within the SoC module structure.

Abstract translation: 提供了多层片上系统（SoC）模块结构。 多层SoC模块结构包括至少两个电路板模块层和至少一个连接器模块层。 每个连接器模块层夹在两个电路板模块层之间并由此电连接，使得SoC模块结构通过堆叠形成。 每个电路板模块层由至少一个电路板模块组成，而每个连接器模块层由至少一个连接器模块组成。 因此，SoC模块结构可以制造为三维结构，从而允许SoC模块结构内的高度灵活的连接。