公开(公告)号：US06492872B1

公开(公告)日：2002-12-10

申请号：US09657237

申请日：2000-09-07

申请人： Toru Fujioka ,  Yoshikuni Matsunaga ,  Isao Yoshida ,  Masatoshi Morikawa ,  Masao Hotta ,  Tetsuaki Adachi

发明人： Toru Fujioka ,  Yoshikuni Matsunaga ,  Isao Yoshida ,  Masatoshi Morikawa ,  Masao Hotta ,  Tetsuaki Adachi

IPC分类号： H03G310

CPC分类号： H03F1/301 ,  H03G3/3042

摘要： A high frequency power amplifier module is provided for improving output controllability. A wireless communication apparatus incorporates a high frequency power amplifier module in a multi-stage configuration including a plurality of cascaded MOSFETS. The power amplifier module comprises a bias circuit for generating a gate voltage in response to a power control voltage (vapc) generated based on a power control signal of the wireless communication apparatus. The gate voltage has a bias pattern which presents smaller fluctuations in output power in response to a control voltage (Vapc) in a region near a threshold voltage (Vth) of the MOSFETs in respective amplification stages. In this way, the controllability for the output power is improved. More specifically, the power amplifier module has a gate bias circuit for generating the gate voltage (Vg) which follows a gate voltage pattern. The gate voltage (Vg) supplied to a control terminal in response to the control voltage (Vapc) largely changes in a region where the gate voltage (Vg) is lower than the threshold voltage (Vth) of the respective MOSFETs, and slightly changes near the threshold voltage (Vth). Also, the gate voltage (Vg) presents desired characteristics from the vicinity of the threshold voltage (Vth) to a high Vapc voltage region.

摘要翻译： 提供了一种用于提高输出可控性的高频功率放大器模块。 无线通信装置将包括多个级联MOSFET的多级配置的高频功率放大器模块结合在一起。 功率放大器模块包括用于响应于基于无线通信设备的功率控制信号产生的功率控制电压（vapc）产生栅极电压的偏置电路。 栅极电压具有偏置图案，其响应于在各个放大级中的MOSFET的阈值电压（Vth）附近的区域中的控制电压（Vapc），输出功率的波动较小。 以这种方式，提高了输出功率的可控性。 更具体地，功率放大器模块具有用于产生跟随栅极电压图案的栅极电压（Vg）的栅极偏置电路。 响应于控制电压（Vapc）而提供给控制端的栅极电压（Vg）在栅极电压（Vg）低于各个MOSFET的阈值电压（Vth）的区域内大大变化，并且稍微改变 阈值电压（Vth）。 此外，栅极电压（Vg）从阈值电压（Vth）附近到高Vapc电压区域呈现期望的特性。

公开(公告)号：US06384688B1

公开(公告)日：2002-05-07

申请号：US09673977

申请日：2000-10-25

申请人： Toru Fujioka ,  Isao Yoshida ,  Mineo Katsueda ,  Masatoshi Morikawa ,  Yoshikuni Matsunaga ,  Kenji Sekine ,  Osamu Kagaya

发明人： Toru Fujioka ,  Isao Yoshida ,  Mineo Katsueda ,  Masatoshi Morikawa ,  Yoshikuni Matsunaga ,  Kenji Sekine ,  Osamu Kagaya

IPC分类号： H03F304

CPC分类号： H03F3/72 ,  H03F3/193 ,  H03F3/211 ,  H03F2200/306 ,  H03F2200/309 ,  H03F2200/39 ,  H03F2200/429 ,  H04B1/0053 ,  H04B1/0458

摘要： A radio frequency power amplifier module for a dual-band type mobile communication apparatus that can transmit and receive the first frequency f1 and the second frequency f2 (f2=2×f1) is structured as explained below. This radio frequency power amplifier module for dual-band type mobile communication apparatus is comprised of a drive stage amplifier having the gain peaks at f1 and f2 with a matching circuit and a radio frequency power output circuit including a radio frequency power output transistor. The output circuit is constituted of a transmission line connected to the drain end of the output transistor, a parallel resonance circuit connected in series to the transmission line to resonate at the harmonics in the frequency twice the frequency f2, a series resonance circuit provided between one end of the resonance circuit and the ground to resonate at the harmonics in the frequency twice the frequency f2 and an output matching circuit provided in series to the other end of the parallel resonance circuit for the matching with f1 and f2. The transmission line is set to terminate at the drain end for the even number order harmonics of f2 with the reactance existing at the drain end and a circuit element constant forming the parallel resonance circuit is set to open at the drain end for the odd number order harmonics of f2 with the series resonance circuit, transmission line and reactance existing at the drain end. With the structure explained above, since harmonics power can be controlled through control of the predetermined harmonics, high efficiency and reduction in size of the radio frequency power amplifier module can be realized.

摘要翻译： 可以发送和接收第一频率f1和第二频率f2（f2 = 2xf1）的用于双频带型移动通信装置的射频功率放大器模块如下所述地构成。该射频功率放大器模块用于双频 型移动通信装置包括具有匹配电路的具有在f1和f2的增益峰值的驱动级放大器和包括射频功率输出晶体管的射频功率输出电路。 输出电路由连接到输出晶体管的漏极端的传输线构成，并联谐振电路与传输线串联连接，以频率f2的频率谐振地谐振，串联谐振电路设置在一个 谐振电路的端部和谐振频率为频率f2的频率的谐波的接地和与并联谐振电路的另一端串联设置以用于与f1和f2匹配的输出匹配电路。 传输线被设置为在漏极端处终止，其中存在于漏极端处的电抗的偶数次谐波为f2，并且形成并联谐振电路的电路元件常数设置为在漏极端处为奇数阶开路 具有串联谐振电路的f2谐波，漏极端存在的传输线和电抗。通过上述结构，由于能够通过控制预定谐波来控制谐波功率，高效率和减小射频功率放大器的尺寸 模块可以实现。

公开(公告)号：US06865399B2

公开(公告)日：2005-03-08

申请号：US10062529

申请日：2002-02-05

申请人： Toru Fujioka ,  Isao Yoshida ,  Mineo Katsueda ,  Masatoshi Morikawa ,  Yoshikuni Matsunaga ,  Kenji Sekine ,  Osamu Kagaya

发明人： Toru Fujioka ,  Isao Yoshida ,  Mineo Katsueda ,  Masatoshi Morikawa ,  Yoshikuni Matsunaga ,  Kenji Sekine ,  Osamu Kagaya

IPC分类号： H04B1/40 ,  H04B1/00 ,  H04B1/04

CPC分类号： H03F3/245 ,  H03F1/56 ,  H03F3/195 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/18 ,  H03F2200/222 ,  H03F2200/387 ,  H03F2200/405 ,  H03F2200/429 ,  H03F2203/7209 ,  H03F2203/7221 ,  H04B1/005 ,  H04B1/006 ,  H04B1/406

摘要： In a mobile telephone apparatus corresponding to dual-band provided with an RF power module to operate in two kinds of different frequencies, a common harmonics control circuit is provided to the output circuit of such RF power module to realize higher efficiency in view of controlling respective harmonics power for both band frequencies. Moreover, a means for selectively setting the bias is also provided so that the maximum efficiency can be attained depending on the output power required with respective communication systems with the bias control signal output from the CPU of the control unit interlocking with selection of frequency of the mobile telephone apparatus body.

摘要翻译： 在对应于具有以两种不同频率工作的RF功率模块的双频带的移动电话装置中，向这种RF功率模块的输出电路提供公共谐波控制电路，以实现更高的效率 两个频段的谐波功率。 此外，还提供了用于选择性地设置偏置的装置，使得可以根据各个通信系统所需的输出功率来获得最大效率，其中从控制单元的CPU输出的偏置控制信号与选择频率的 移动电话机身。

公开(公告)号：US06535069B2

公开(公告)日：2003-03-18

申请号：US10084364

申请日：2002-02-28

申请人： Toru Fujioka ,  Isao Yoshida ,  Mineo Katsueda ,  Masatoshi Morikawa ,  Yoshikuni Matsunaga ,  Kenji Sekine ,  Osamu Kagaya

发明人： Toru Fujioka ,  Isao Yoshida ,  Mineo Katsueda ,  Masatoshi Morikawa ,  Yoshikuni Matsunaga ,  Kenji Sekine ,  Osamu Kagaya

IPC分类号： H03F304

CPC分类号： H03F3/72 ,  H03F3/193 ,  H03F3/211 ,  H03F2200/306 ,  H03F2200/309 ,  H03F2200/39 ,  H03F2200/429 ,  H04B1/0053 ,  H04B1/0458

摘要： A radio frequency power amplifier module for a dual-band type mobile communication apparatus that can transmit and receive a first frequency f1 and second frequency f2 (f2=2×f1). It includes a drive stage amplifier having the gain peaks at f1 and f2 with a matching circuit and a radio frequency power output circuit including a radio frequency power output transistor. The output circuit has a transmission line connected to the drain end of the output transistor, a parallel resonance circuit connected in series to the transmission line to resonate at harmonics of a frequency twice the frequency f2, a series resonance circuit provided between one end of the resonance circuit and the ground to resonate at harmonics of a frequency twice the frequency f2 and an output matching circuit provided in series to the other end of the parallel resonance circuit for matching with f1 and f2.

摘要翻译： 一种能够发送和接收第一频率f1和第二频率f2（f2 = 2xf1）的双频带型移动通信装置的射频功率放大器模块。 它包括具有匹配电路的f1和f2处的增益峰值的驱动级放大器和包括射频功率输出晶体管的射频功率输出电路。 输出电路具有连接到输出晶体管的漏极端的传输线，串联连接到传输线的并联谐振电路，以使谐振频率为频率f2的两倍的频率，串联谐振电路设置在 谐振电路和接地谐振频率为频率f2的频率的谐波，以及与并联谐振电路的另一端串联设置的与f1和f2匹配的输出匹配电路。

公开(公告)号：US06366788B1

公开(公告)日：2002-04-02

申请号：US09674072

申请日：2000-10-26

申请人： Toru Fujioka ,  Isao Yoshida ,  Mineo Katsueda ,  Masatoshi Morikawa ,  Yoshikuni Matsunaga ,  Kenji Sekine ,  Osamu Kagaya

发明人： Toru Fujioka ,  Isao Yoshida ,  Mineo Katsueda ,  Masatoshi Morikawa ,  Yoshikuni Matsunaga ,  Kenji Sekine ,  Osamu Kagaya

IPC分类号： H04B138

CPC分类号： H04B1/006 ,  H03F3/193 ,  H03F3/604 ,  H03F3/72 ,  H03F2200/306 ,  H03F2200/309 ,  H03F2200/39 ,  H03F2200/429 ,  H04B1/005 ,  H04B1/406

摘要： In a mobile telephone apparatus corresponding to dual-band provided with an RF power module to operate in two kinds of different frequencies, a common harmonics control circuit is provided to the output circuit of such RF power module to realize higher efficiency in view of controlling respective harmonics power for both band frequencies. Moreover, a means for selectively setting the bias is also provided so that the maximum efficiency can be attained depending on the output power required with respective communication systems with the bias control signal output from the CPU of the control unit interlocking with selection of frequency of the mobile telephone apparatus body.

摘要翻译： 在对应于具有以两种不同频率工作的RF功率模块的双频带的移动电话装置中，向这种RF功率模块的输出电路提供公共谐波控制电路，以实现更高的效率 两个频段的谐波功率。 此外，还提供了用于选择性地设置偏置的装置，使得可以根据各个通信系统所需的输出功率来获得最大效率，其中从控制单元的CPU输出的偏置控制信号与选择频率的 移动电话机身。

公开(公告)号：US20110220999A1

公开(公告)日：2011-09-15

申请号：US13111001

申请日：2011-05-19

申请人： Yutaka Hoshino ,  Shuji Ikeda ,  Isao Yoshida ,  Shiro Kamohara ,  Megumi Kawakami ,  Tomoyuki Miyake ,  Masatoshi Morikawa

发明人： Yutaka Hoshino ,  Shuji Ikeda ,  Isao Yoshida ,  Shiro Kamohara ,  Megumi Kawakami ,  Tomoyuki Miyake ,  Masatoshi Morikawa

IPC分类号： H01L29/78

CPC分类号： H01L29/66659 ,  H01L21/823475 ,  H01L21/823871 ,  H01L23/4827 ,  H01L23/53219 ,  H01L23/53295 ,  H01L27/0255 ,  H01L27/088 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/086 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/7835 ,  H01L29/861 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： In a high frequency amplifying MOSFET having a drain offset region, the size is reduced and the on-resistance is decreased by providing conductor plugs 13 (P1) for leading out electrodes on a source region 10, a drain region 9 and leach-through layers 3 (4), to which a first layer wirings 11a, 11d (M1) are connected and, further, backing second layer wirings 12a to 12d are connected on the conductor plugs 13 (P1) to the first layer wirings 11s, 11d (M1).

摘要翻译： 在具有漏极偏移区域的高频放大MOSFET中，通过在源极区域10，漏极区域9和浸出层9上引出电极的导体插头13（P1）来减小尺寸并降低导通电阻。 连接有第一层布线11a，11d（M1）的第3层（4），另外，背面的第二层布线12a〜12d在导体插塞13（P1）上连接到第一层布线11s，11d（M1 ）。

公开(公告)号：US06815707B2

公开(公告)日：2004-11-09

申请号：US10259396

申请日：2002-09-30

申请人： Nobuyuki Sugii ,  Masatoshi Morikawa ,  Isao Yoshida ,  Katsuyoshi Washio

发明人： Nobuyuki Sugii ,  Masatoshi Morikawa ,  Isao Yoshida ,  Katsuyoshi Washio

IPC分类号： H01L2904

CPC分类号： H01L29/66659 ,  H01L29/1045 ,  H01L29/1087 ,  H01L29/165 ,  H01L29/7835 ,  H03F3/601 ,  Y10S438/933

摘要： In a semiconductor multi-layer structure in which a first SiGe layer having a first conductivity-type and high impurity concentration, a second SiGe layer having the first conductivity-type and a low impurity concentration and a Si layer having a low impurity concentration are formed one on another in this order on a Si substrate of the first conductivity-type, a channel is formed in a part of the Si layer and a source electrode passes through the second SiGe layer of low impurity concentration to electrically contact the first SiGe layer of high impurity concentration or the substrate.

摘要翻译： 在具有第一导电型和高杂质浓度的第一SiGe层的半导体多层结构中，形成具有第一导电型和低杂质浓度的第二SiGe层和具有低杂质浓度的Si层 在第一导电类型的Si衬底上依次另一个，在Si层的一部分中形成沟道，并且源极通过低杂质浓度的第二SiGe层，以电接触第一SiGe层的第一SiGe层 高杂质浓度或底物。

公开(公告)号：US5379230A

公开(公告)日：1995-01-03

申请号：US232402

申请日：1994-04-25

申请人： Masatoshi Morikawa ,  Isao Yoshida ,  Terumi Sawase ,  Kouzou Sakamoto ,  Takeaki Okabe

发明人： Masatoshi Morikawa ,  Isao Yoshida ,  Terumi Sawase ,  Kouzou Sakamoto ,  Takeaki Okabe

IPC分类号： G06F1/00 ,  G01Q70/00 ,  G05F1/56 ,  H01L21/822 ,  H01L27/04 ,  H03K17/08 ,  H03K17/082 ,  H03M1/08 ,  G01K7/00 ,  H03K17/12

CPC分类号： H03K17/18 ,  H03K17/0822 ,  H03K2017/0806

摘要： A semiconductor integrated circuit has a semiconductor output device (3) , a sensor (5) generating an electric signal (7) relevant to heat generation (6) of the output device (3) and a microprocessor unit MPU 2, inside a chip (1). The MPU (2) is constructed of a memory (20) and CPU (22). The electric signal (7) generated from the sensor (5) is processed by the CPU (22) in accordance with a stored program of the memory (20). Accordingly, the drivability of the semiconductor output device (3) can be set in an optimum state corresponding to changes in chip temperature including changes that are only momentary.

摘要翻译： 半导体集成电路具有半导体输出装置（3），产生与输出装置（3）的发热（6）有关的电信号（7）的传感器（5）和芯片内的微处理器单元MPU2 1）。 MPU（2）由存储器（20）和CPU（22）构成。 根据存储器（20）的存储程序，由CPU（22）处理从传感器（5）产生的电信号（7）。 因此，可以将半导体输出装置（3）的驾驶性能设定为对应于仅包含瞬时变化的芯片温度变化的最佳状态。

公开(公告)号：US20120235250A1

公开(公告)日：2012-09-20

申请号：US13486153

申请日：2012-06-01

申请人： Yutaka Hoshino ,  Shuji Ikeda ,  Isao Yoshida ,  Shiro Kamohara ,  Megumi Kawakami ,  Tomoyuki Miyake ,  Masatoshi Morikawa

发明人： Yutaka Hoshino ,  Shuji Ikeda ,  Isao Yoshida ,  Shiro Kamohara ,  Megumi Kawakami ,  Tomoyuki Miyake ,  Masatoshi Morikawa

IPC分类号： H01L29/78

CPC分类号： H01L29/66659 ,  H01L21/823475 ,  H01L21/823871 ,  H01L23/4827 ,  H01L23/53219 ,  H01L23/53295 ,  H01L27/0255 ,  H01L27/088 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/086 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/7835 ,  H01L29/861 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： In a high frequency amplifying MOSFET having a drain offset region, the size is reduced and the on-resistance is decreased by providing conductor plugs 13 (P1) for leading out electrodes on a source region 10, a drain region 9 and leach-through layers 3 (4), to which a first layer wirings 11a, 11d (M1) are connected and, further, backing second layer wirings 12a to 12d are connected on the conductor plugs 13 (P1) to the first layer wirings 11s, 11d (M1).

摘要翻译： 在具有漏极偏移区域的高频放大MOSFET中，通过在源极区域10，漏极区域9和浸出层9上引出电极的导体插头13（P1）来减小尺寸并降低导通电阻。 连接有第一层布线11a，11d（M1）的第3层（4），另外，背面的第二层布线12a〜12d在导体插塞13（P1）上连接到第一层布线11s，11d（M1 ）。

公开(公告)号：US08232595B2

公开(公告)日：2012-07-31

申请号：US13111001

申请日：2011-05-19

申请人： Yutaka Hoshino ,  Shuji Ikeda ,  Isao Yoshida ,  Shiro Kamohara ,  Megumi Kawakami ,  Tomoyuki Miyake ,  Masatoshi Morikawa

发明人： Yutaka Hoshino ,  Shuji Ikeda ,  Isao Yoshida ,  Shiro Kamohara ,  Megumi Kawakami ,  Tomoyuki Miyake ,  Masatoshi Morikawa

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L27/10 ,  H01L29/74

CPC分类号： H01L29/66659 ,  H01L21/823475 ,  H01L21/823871 ,  H01L23/4827 ,  H01L23/53219 ,  H01L23/53295 ,  H01L27/0255 ,  H01L27/088 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/086 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/7835 ,  H01L29/861 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： In a high frequency amplifying MOSFET having a drain offset region, the size is reduced and the on-resistance is decreased by providing conductor plugs 13 (P1) for leading out electrodes on a source region 10, a drain region 9 and leach-through layers 3 (4), to which a first layer wirings 11a, 11d (M1) are connected and, further, backing second layer wirings 12a to 12d are connected on the conductor plugs 13 (P1) to the first layer wirings 11s, 11d (M1).

摘要翻译： 在具有漏极偏移区域的高频放大MOSFET中，通过在源极区域10，漏极区域9和浸出层9上引出电极的导体插头13（P1）来减小尺寸并降低导通电阻。 连接有第一层布线11a，11d（M1）的第3层（4），另外，背面的第二层布线12a〜12d在导体插塞13（P1）上连接到第一层布线11s，11d（M1 ）。