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    Semiconductor device and method of manufacturing the same
    2.
    发明授权
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US08828853B2

    公开(公告)日：2014-09-09

    申请号：US13415232

    申请日：2012-03-08

    申请人： Tomonori Aoyama ,  Kiyotaka Miyano

    发明人： Tomonori Aoyama ,  Kiyotaka Miyano

    IPC分类号： H01L21/20

    CPC分类号： H01L29/66757 ,  H01L21/02532 ,  H01L21/02667 ,  H01L27/11582 ,  H01L29/04 ,  H01L29/78675 ,  H01L29/78696 ,  H01L29/7926

    摘要： In one embodiment, a method of manufacturing a semiconductor device includes forming an amorphous semiconductor film on a substrate. The method further includes annealing the amorphous semiconductor film by irradiating the substrate with a microwave to form a polycrystalline semiconductor film from the amorphous semiconductor film. The method further includes forming a transistor whose channel is the polycrystalline semiconductor film.

    摘要翻译： 在一个实施例中，制造半导体器件的方法包括在衬底上形成非晶半导体膜。 该方法还包括通过用微波照射衬底来从非晶半导体膜形成多晶半导体膜来退火非晶半导体膜。 该方法还包括形成其通道为多晶半导体膜的晶体管。

    Semiconductor device and method of manufacturing the same
    4.
    发明授权
    Semiconductor device and method of manufacturing the same 失效
    半导体装置及其制造方法

    公开(公告)号：US08198155B2

    公开(公告)日：2012-06-12

    申请号：US12693985

    申请日：2010-01-26

    申请人： Daisuke Ikeno ,  Tomonori Aoyama ,  Kazuaki Nakajima ,  Seiji Inumiya ,  Takashi Shimizu ,  Takuya Kobayashi

    发明人： Daisuke Ikeno ,  Tomonori Aoyama ,  Kazuaki Nakajima ,  Seiji Inumiya ,  Takashi Shimizu ,  Takuya Kobayashi

    IPC分类号： H01L21/8234 ,  H01L21/8238 ,  H01L29/51

    CPC分类号： H01L21/823842 ,  H01L21/28088 ,  H01L21/823807 ,  H01L21/82385 ,  H01L29/1054 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/6659

    摘要： A semiconductor device according to an embodiment of the present invention includes an N-type transistor formed in a first region on a substrate, and a P-type transistor formed in a second region on the substrate. The device includes the substrate, a first gate insulation film formed on the substrate in the first and second regions, and containing silicon, a second gate insulation film formed on the first gate insulation film in the first region, and containing first metal and oxygen, a third gate insulation film formed on the first gate insulation film in the second region, and containing second metal different from the first metal and oxygen, a fourth gate insulation film formed on the second and third gate insulation films in the first and second regions, and containing hafnium, and a gate electrode layer formed on the fourth gate insulation film in the first and second regions, and containing metal and nitrogen, a thickness of the gate electrode layer formed in the second region being greater than a thickness of the gate electrode layer formed in the first region.

    摘要翻译： 根据本发明的实施例的半导体器件包括形成在衬底上的第一区域中的N型晶体管和形成在衬底上的第二区域中的P型晶体管。 该器件包括衬底，形成在第一和第二区域的衬底上并含有硅的第一栅极绝缘膜，形成在第一区域中的第一栅极绝缘膜上并且包含第一金属和氧的第二栅极绝缘膜， 形成在所述第二区域中的所述第一栅极绝缘膜上并且包含不同于所述第一金属和氧的第二金属的第三栅极绝缘膜，形成在所述第一和第二区域中的所述第二和第三栅极绝缘膜上的第四栅极绝缘膜， 并且含有铪，以及形成在第一和第二区域中的第四栅极绝缘膜上并且包含金属和氮的栅极电极层，在第二区域中形成的栅电极层的厚度大于栅电极的厚度 层形成在第一区域中。

    Semiconductor device having a high-dielectric-constant gate insulating film
    5.
    发明授权
    Semiconductor device having a high-dielectric-constant gate insulating film 失效
    具有高介电常数栅极绝缘膜的半导体器件

    公开(公告)号：US08143676B2

    公开(公告)日：2012-03-27

    申请号：US12261770

    申请日：2008-10-30

    申请人： Seiji Inumiya ,  Takuya Kobayashi ,  Tomonori Aoyama

    发明人： Seiji Inumiya ,  Takuya Kobayashi ,  Tomonori Aoyama

    IPC分类号： H01L21/02

    CPC分类号： H01L21/823857 ,  H01L21/02148 ,  H01L21/02156 ,  H01L21/02161 ,  H01L21/02178 ,  H01L21/02192 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/02332 ,  H01L21/0234 ,  H01L21/3162 ,  H01L21/31641 ,  H01L21/31645

    摘要： A semiconductor device includes a substrate having first and second regions on a surface thereof, a first conductivity type first MISFET formed in the first region and a second conductivity type second MISFET formed in the second region. The first MISFET includes a silicon oxide film or a silicon oxynitride film formed on the surface of the substrate and a first insulating film which is formed in contact with the silicon oxide film or the silicon oxynitride film and which has a first element forming electric dipoles that reduce a threshold voltage of the first MISFET and the second MISFET includes a silicon oxide film or a silicon oxynitride film formed on the surface of the substrate, and a second insulating film which is formed in contact with the silicon oxide film or the silicon oxynitride film formed on the surface of the substrate and which has a second element forming electric dipoles in a direction opposite to that in the first MISFET.

    摘要翻译： 半导体器件包括在其表面上具有第一和第二区域的衬底，在第一区域中形成的第一导电类型的第一MISFET和形成在第二区域中的第二导电类型的第二MISFET。 第一MISFET包括在基板的表面上形成的氧化硅膜或氮氧化硅膜，以及形成为与氧化硅膜或氮氧化硅膜接触形成的第一元件的第一绝缘膜，其具有形成电偶极子的第一元件， 降低第一MISFET的阈值电压，并且第二MISFET包括在衬底的表面上形成的氧化硅膜或氧氮化硅膜，以及形成为与氧化硅膜或氮氧化硅膜接触的第二绝缘膜 形成在基板的表面上，并且具有在与第一MISFET中的方向相反的方向上形成电偶极子的第二元件。

    SEMICONDUCTOR DEVICE MANUFACTURING METHOD
    6.
    发明申请
    SEMICONDUCTOR DEVICE MANUFACTURING METHOD 有权
    半导体器件制造方法

    公开(公告)号：US20120045882A1

    公开(公告)日：2012-02-23

    申请号：US13282507

    申请日：2011-10-27

    申请人： Seiji Inumiya ,  Tomonori Aoyama

    发明人： Seiji Inumiya ,  Tomonori Aoyama

    IPC分类号： H01L21/762 ,  H01L21/28

    CPC分类号： H01L21/28167 ,  H01L21/02057 ,  H01L21/28088 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/7624 ,  H01L21/823857 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66795 ,  H01L29/785

    摘要： A semiconductor device manufacturing method includes: removing an insulating film on a semiconductor substrate by etching and subsequently oxidizing a surface of the semiconductor substrate by using a liquid oxidation agent without exposing this surface to an atmosphere, thereby forming a first insulating film containing an oxide of a constituent element of the semiconductor substrate on the surface of the semiconductor substrate; forming a second insulating film containing an aluminum oxide on the first insulating film; forming a third insulating film containing a rare earth oxide on the second insulating film; forming a high-k insulating film on the third insulating film; introducing nitrogen into the high-k insulating film to thereby make it a fourth insulating film; and conducting heat treatment to change the first through third insulating films into a insulating film made of a mixture containing aluminum, a rare earth element, the constituent element of the semiconductor substrate, and oxygen.

    摘要翻译： 半导体器件制造方法包括：通过使用液体氧化剂蚀刻并随后氧化半导体衬底的表面而在半导体衬底上去除绝缘膜而不将该表面暴露在大气中，从而形成含有氧化物的第一绝缘膜 半导体衬底的表面上的构成元件; 在所述第一绝缘膜上形成含有氧化铝的第二绝缘膜; 在所述第二绝缘膜上形成含有稀土类氧化物的第三绝缘膜; 在第三绝缘膜上形成高k绝缘膜; 将氮引入高k绝缘膜，从而使其成为第四绝缘膜; 并且进行热处理以将第一至第三绝缘膜改变为由含有铝，稀土元素，半导体衬底的构成元素和氧的混合物制成的绝缘膜。

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    7.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
    半导体器件及其制造方法

    公开(公告)号：US20100187612A1

    公开(公告)日：2010-07-29

    申请号：US12693985

    申请日：2010-01-26

    申请人： Daisuke IKENO ,  Tomonori Aoyama ,  Kazuaki Nakajima ,  Seiji Inumiya ,  Takashi Shimizu ,  Takuya Kobayashi

    发明人： Daisuke IKENO ,  Tomonori Aoyama ,  Kazuaki Nakajima ,  Seiji Inumiya ,  Takashi Shimizu ,  Takuya Kobayashi

    IPC分类号： H01L27/092 ,  H01L21/8238

    CPC分类号： H01L21/823842 ,  H01L21/28088 ,  H01L21/823807 ,  H01L21/82385 ,  H01L29/1054 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/6659

    摘要： A semiconductor device according to an embodiment of the present invention includes an N-type transistor formed in a first region on a substrate, and a P-type transistor formed in a second region on the substrate. The device includes the substrate, a first gate insulation film formed on the substrate in the first and second regions, and containing silicon, a second gate insulation film formed on the first gate insulation film in the first region, and containing first metal and oxygen, a third gate insulation film formed on the first gate insulation film in the second region, and containing second metal different from the first metal and oxygen, a fourth gate insulation film formed on the second and third gate insulation films in the first and second regions, and containing hafnium, and a gate electrode layer formed on the fourth gate insulation film in the first and second regions, and containing metal and nitrogen, a thickness of the gate electrode layer formed in the second region being greater than a thickness of the gate electrode layer formed in the first region.

    摘要翻译： 根据本发明的实施例的半导体器件包括形成在衬底上的第一区域中的N型晶体管和形成在衬底上的第二区域中的P型晶体管。 该器件包括衬底，形成在第一和第二区域的衬底上并含有硅的第一栅极绝缘膜，形成在第一区域中的第一栅极绝缘膜上并且包含第一金属和氧的第二栅极绝缘膜， 形成在所述第二区域中的所述第一栅极绝缘膜上并且包含不同于所述第一金属和氧的第二金属的第三栅极绝缘膜，形成在所述第一和第二区域中的所述第二和第三栅极绝缘膜上的第四栅极绝缘膜， 并且含有铪，以及形成在第一和第二区域中的第四栅极绝缘膜上并且包含金属和氮的栅极电极层，在第二区域中形成的栅电极层的厚度大于栅电极的厚度 层形成在第一区域中。

    Constant Velocity Joint
    8.
    发明申请
    Constant Velocity Joint 失效
    恒速接头

    公开(公告)号：US20080096676A1

    公开(公告)日：2008-04-24

    申请号：US11795713

    申请日：2006-01-19

    申请人： Tsutomu Kawakatsu ,  Naoto Shibata ,  Masato Saika ,  Tomonori Aoyama

    发明人： Tsutomu Kawakatsu ,  Naoto Shibata ,  Masato Saika ,  Tomonori Aoyama

    IPC分类号： F16D3/205 ,  F16D3/16

    CPC分类号： F16D3/2055 ,  F16D2003/2026 ,  Y10S464/905

    摘要： A constant velocity joint, wherein the tilt angle of a first trunnion relative to a plane crossing perpendicularly to the axis of a second shaft is set to be different from the tilt angle of a second trunnion and the tilt angle of a third trunnion. The tilt angle of the second trunnion and the tilt angle of the third trunnion are set to be equal to each other, and three axes of the first to third trunnions are set to be included on a same plane

    摘要翻译： 等速万向节，其中第一耳轴相对于垂直于第二轴的轴线交叉的平面的倾斜角被设定为不同于第二耳轴的倾斜角和第三耳轴的倾斜角。 第二耳轴的倾斜角度和第三耳轴的倾斜角度被设定为彼此相等，并且将第一至第三耳轴的三个轴线设置为包括在同一平面上

    Semiconductor device with gate insulator formed of high dielectric film
    9.
    发明授权
    Semiconductor device with gate insulator formed of high dielectric film 失效
    具有栅极绝缘体的半导体器件由高介电膜形成

    公开(公告)号：US06278164B1

    公开(公告)日：2001-08-21

    申请号：US08996704

    申请日：1997-12-23

    申请人： Katsuhiko Hieda ,  Yoshitaka Tsunashima ,  Keitaro Imai ,  Tomonori Aoyama

    发明人： Katsuhiko Hieda ,  Yoshitaka Tsunashima ,  Keitaro Imai ,  Tomonori Aoyama

    IPC分类号： H01L2976

    CPC分类号： H01L29/513 ,  H01L29/4983 ,  H01L29/516 ,  H01L29/517 ,  H01L29/66537 ,  H01L29/66545 ,  H01L29/78391

    摘要： A p-type silicon substrate has an element isolation region of an STI structure formed therein. A transistor region isolated by the isolation region has a n-type source/drain diffusion layer. Further, a p-channel impurity layer is formed substantially only in its channel region for controlling its threshold voltage (Vth). A gate insulator film consisting of a high dielectric film is formed on the channel region with an Si3N4 film interposed therebetween. A metal gate electrode having its bottom and side surfaces covered with the gate insulator film is provided in a self-alignment manner with respect to the source/drain diffusion layer.

    摘要翻译： p型硅衬底具有形成在其中的STI结构的元件隔离区域。 由隔离区隔离的晶体管区域具有n型源极/漏极扩散层。 此外，p沟道杂质层基本上仅在其沟道区域中形成，用于控制其阈值电压（Vth）。 在沟道区域上形成由高介电膜构成的栅极绝缘膜，其间插入有Si 3 N 4膜。 相对于源极/漏极扩散层以自对准的方式设置具有被栅极绝缘膜覆盖的底部和侧面的金属栅电极。