Bipolar transistor and manufacturing method
    9.
    发明授权
    Bipolar transistor and manufacturing method 失效
    双极晶体管及其制造方法

    公开(公告)号:US5587599A

    公开(公告)日:1996-12-24

    申请号:US449213

    申请日:1995-05-23

    CPC分类号: H01L29/66265 H01L27/0623

    摘要: Bipolar transistor, potentially with monolithically integrated MOSFETs, in the body silicon layer having a thickness of approximately 0.6 .mu.m in a SOI substrate, have a collector region and a base region that are produced by implantation. An oxide layer provided for the gate oxide of the MOSFETs is applied surface-wide and is partially removed in the region of the bipolar transistor, a polysilicon layer (5) also employed for the gate electrodes of the MOSFETs is applied and structured. Implantation for highly doped termination regions (5, 10, 12) for emitter, base and collector ensue with masks (13). An emitter region (8) is driven out of the highly doped polysilicon layer as terminal region for the emitter in a temperature step. The doping degree of the collector region, as lowest doped region, can be selected so light that the collector region is completely depleted. The function corresponds to a vertical bipolar transistor with a lateral collector space-charged zone.

    摘要翻译: 在SOI衬底中具有约0.6μm厚度的体硅层中的潜在地具有单片集成MOSFET的双极晶体管具有通过注入产生的集电极区域和基极区域。 为MOSFET的栅极氧化物提供的氧化物层被施加在表面宽度上,并且在双极晶体管的区域中部分地去除,并且还应用并构造了也用于MOSFET的栅电极的多晶硅层(5)。 用于发射器,基极和集电极的高掺杂终止区域(5,10,12)的植入物随着掩模(13)而发生。 在温度步骤中,发射极区域(8)从高掺杂多晶硅层作为发射极的端子区域被驱出。 作为最低掺杂区域的集电极区域的掺杂度可以如此选择,使得集电极区域完全耗尽。 该功能对应于具有横向收集器空间带电区域的垂直双极晶体管。