公开(公告)号：US09056763B2

公开(公告)日：2015-06-16

申请号：US14039157

申请日：2013-09-27

申请人： Christian Geissler ,  Thorsten Meyer ,  Gerald Ofner ,  Reinhard Mahnkopf ,  Andreas Augustin ,  Christian Mueller

发明人： Christian Geissler ,  Thorsten Meyer ,  Gerald Ofner ,  Reinhard Mahnkopf ,  Andreas Augustin ,  Christian Mueller

IPC分类号： H01L23/02 ,  B81C1/00 ,  B81B7/00

CPC分类号： B81C1/00666 ,  B81B7/0054 ,  B81C1/00261 ,  B81C1/00349 ,  B81C2203/0136 ,  B81C2203/0154 ,  H01L21/568 ,  H01L23/3135 ,  H01L24/19 ,  H01L24/96 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/24137 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/73207 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/73277 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： Stress buffer layers for integrated microelectromechanical systems (MEMS) are described. For example, a semiconductor package includes a substrate having first and second surfaces, the second surface having an array of external conductive contacts. A microelectromechanical system (MEMS) component is disposed above the first surface of the substrate. A buffer layer is disposed above the MEMS component, the buffer layer having a first Young's modulus. A mold compound is disposed above the buffer layer, the mold compound having a second Young's modulus higher than the first Young's modulus.

摘要翻译： 描述了用于集成微机电系统（MEMS）的应力缓冲层。 例如，半导体封装包括具有第一和第二表面的衬底，第二表面具有外部导电触点阵列。 微机电系统（MEMS）部件设置在基板的第一表面上方。 缓冲层设置在MEMS部件上方，缓冲层具有第一杨氏模量。 模具化合物设置在缓冲层上方，模塑料具有高于第一杨氏模量的第二杨氏模量。

公开(公告)号：US20150091167A1

公开(公告)日：2015-04-02

申请号：US14039157

申请日：2013-09-27

申请人： Christian Geissler ,  Thorsten Meyer ,  Gerald Ofner ,  Reinhard Mahnkopf ,  Andreas Augustin ,  Christian Mueller

发明人： Christian Geissler ,  Thorsten Meyer ,  Gerald Ofner ,  Reinhard Mahnkopf ,  Andreas Augustin ,  Christian Mueller

IPC分类号： B81C1/00 ,  B81B7/00

CPC分类号： B81C1/00666 ,  B81B7/0054 ,  B81C1/00261 ,  B81C1/00349 ,  B81C2203/0136 ,  B81C2203/0154 ,  H01L21/568 ,  H01L23/3135 ,  H01L24/19 ,  H01L24/96 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/24137 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/73207 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/73277 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： Stress buffer layers for integrated microelectromechanical systems (MEMS) are described. For example, a semiconductor package includes a substrate having first and second surfaces, the second surface having an array of external conductive contacts. A microelectromechanical system (MEMS) component is disposed above the first surface of the substrate. A buffer layer is disposed above the MEMS component, the buffer layer having a first Young's modulus. A mold compound is disposed above the buffer layer, the mold compound having a second Young's modulus higher than the first Young's modulus.

公开(公告)号：US20140361387A1

公开(公告)日：2014-12-11

申请号：US13910133

申请日：2013-06-05

申请人： Thorsten Meyer ,  Gerald Ofner ,  Christian Mueller ,  Reinhard Mahnkopf ,  Christian Geissler ,  Andreas Augustin

发明人： Thorsten Meyer ,  Gerald Ofner ,  Christian Mueller ,  Reinhard Mahnkopf ,  Christian Geissler ,  Andreas Augustin

IPC分类号： B81B7/00 ,  B81C1/00

CPC分类号： B81B7/0077 ,  B81B7/007 ,  B81B2207/012 ,  B81B2207/095 ,  B81C1/00333 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/24137 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73259 ,  H01L2224/73267 ,  H01L2924/1431 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A chip arrangement may include: a mold compound; and a microelectromechanical systems device at least partially embedded in the mold compound.

摘要翻译： 芯片布置可以包括：模具化合物; 以及至少部分地嵌入模具化合物中的微机电系统装置。

公开(公告)号：US20150266728A1

公开(公告)日：2015-09-24

申请号：US14731211

申请日：2015-06-04

申请人： Christian Geissler ,  Thorsten Meyer ,  Gerald Ofner ,  Reinhard Mahnkopf ,  Andreas Augustin ,  Christian Mueller

发明人： Christian Geissler ,  Thorsten Meyer ,  Gerald Ofner ,  Reinhard Mahnkopf ,  Andreas Augustin ,  Christian Mueller

IPC分类号： B81C1/00

CPC分类号： B81C1/00666 ,  B81B7/0054 ,  B81C1/00261 ,  B81C1/00349 ,  B81C2203/0136 ,  B81C2203/0154 ,  H01L21/568 ,  H01L23/3135 ,  H01L24/19 ,  H01L24/96 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/24137 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/73207 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/73277 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： Stress buffer layers for integrated microelectromechanical systems (MEMS) are described. For example, a semiconductor package includes a substrate having first and second surfaces, the second surface having an array of external conductive contacts. A microelectromechanical system (MEMS) component is disposed above the first surface of the substrate. A buffer layer is disposed above the MEMS component, the buffer layer having a first Young's modulus. A mold compound is disposed above the buffer layer, the mold compound having a second Young's modulus higher than the first Young's modulus.

摘要翻译： 描述了用于集成微机电系统（MEMS）的应力缓冲层。 例如，半导体封装包括具有第一和第二表面的衬底，第二表面具有外部导电触点阵列。 微机电系统（MEMS）部件设置在基板的第一表面上方。 缓冲层设置在MEMS部件上方，缓冲层具有第一杨氏模量。 模具化合物设置在缓冲层上方，模塑料具有高于第一杨氏模量的第二杨氏模量。

公开(公告)号：US20150282308A1

公开(公告)日：2015-10-01

申请号：US14229476

申请日：2014-03-28

申请人： Thorsten Meyer ,  Gerald Ofner ,  Sven Albers ,  Reinhard Mahnkopf

发明人： Thorsten Meyer ,  Gerald Ofner ,  Sven Albers ,  Reinhard Mahnkopf

IPC分类号： H05K1/03 ,  H05K1/18 ,  H05K7/02 ,  H05K1/02

CPC分类号： H05K1/181 ,  H01L21/568 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5227 ,  H01L23/66 ,  H01L24/00 ,  H01L24/96 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/18 ,  H01L2224/04042 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/19011 ,  H01L2924/19105 ,  H05K1/0233 ,  H05K1/0292 ,  H05K1/162 ,  H05K1/165 ,  H05K1/185 ,  H05K3/4644 ,  H05K2201/10636 ,  H05K2203/1469 ,  H05K2203/171 ,  H05K2203/173 ,  H05K2203/175 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00

摘要： Passive electrical devices are described with a polymer carrier. In one example, a conductive layer is formed over a polymer substrate in a pattern to form a passive electrical device and at least two terminals of the device. A plurality of external connection pads are connected to the terminals of the device.

摘要翻译： 无源电器件用聚合物载体描述。 在一个示例中，导电层以图案形成在聚合物基板上，以形成无源电器件和器件的至少两个端子。 多个外部连接焊盘连接到设备的端子。

公开(公告)号：US20180092443A1

公开(公告)日：2018-04-05

申请号：US15282633

申请日：2016-09-30

申请人： Sven Albers ,  Klaus Reingruber ,  Andreas Wolter ,  Georg Seidemann ,  Christian Geissler ,  Thorsten Meyer ,  Gerald Ofner

发明人： Sven Albers ,  Klaus Reingruber ,  Andreas Wolter ,  Georg Seidemann ,  Christian Geissler ,  Thorsten Meyer ,  Gerald Ofner

IPC分类号： A44C5/02 ,  H04B1/3827 ,  A45F5/00 ,  A44C5/00 ,  G01D11/30 ,  A61B5/0205 ,  A61B5/00

CPC分类号： G06F1/163 ,  A44C5/00 ,  A44C5/02 ,  A44C5/105 ,  A45F5/00 ,  A45F2005/008 ,  A45F2200/0508 ,  A61B5/02055 ,  A61B5/021 ,  A61B5/02438 ,  A61B5/1112 ,  A61B5/681 ,  A61B2560/0257 ,  A61B2560/0443 ,  A61B2562/0219 ,  G04B37/1486 ,  G04B47/00 ,  H04B1/385

摘要： A flexible band wearable electronic device includes a plurality of rigid links. The flexible band wearable electronic device also includes a number of pivot joints coupling the plurality of rigid links together. The flexible band wearable electronic device further includes a first electronic device on a first of the plurality of rigid links, and a second electronic device on a second of the plurality of rigid links. The flexible band wearable electronic device still further includes an electrical communication pathway between first electronic device and the second electronic device and through at least a portion of one of the number of pivot joints.

公开(公告)号：US20180095426A1

公开(公告)日：2018-04-05

申请号：US15282615

申请日：2016-09-30

申请人： Sven Albers ,  Klaus Reingruber ,  Andreas Wolter ,  Georg Seidemann ,  Christian Geissler ,  Thorsten Meyer ,  Gerald Ofner

发明人： Sven Albers ,  Klaus Reingruber ,  Andreas Wolter ,  Georg Seidemann ,  Christian Geissler ,  Thorsten Meyer ,  Gerald Ofner

IPC分类号： G04B37/14 ,  H04B1/3827 ,  A44C5/02 ,  A44C5/00 ,  A44C5/14

CPC分类号： G04B37/1486 ,  A44C5/0053 ,  A44C5/02 ,  A44C5/105 ,  A44C5/14 ,  G06F1/163 ,  H04B1/385 ,  H04B2001/3861 ,  H04W4/80

摘要： A flexible band wearable electronic device includes a plurality of rigid links. The flexible band wearable electronic device also includes a number of pivot joints coupling the plurality of rigid links together. The flexible band wearable electronic device further includes a first electronic device on a first of the plurality of rigid links, and a second electronic device on a second of the plurality of rigid links. The flexible band wearable electronic device still further includes an electrical communication pathway between first electronic device and the second electronic device and through at least a portion of one of the number of pivot joints.

公开(公告)号：US20150262866A1

公开(公告)日：2015-09-17

申请号：US14205093

申请日：2014-03-11

申请人： Thorsten Meyer ,  Gerald Ofner ,  Teodora Ossiander ,  Frank Zudock ,  Christian Geissler

发明人： Thorsten Meyer ,  Gerald Ofner ,  Teodora Ossiander ,  Frank Zudock ,  Christian Geissler

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L23/00 ,  H01L23/532 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/02 ,  H01L23/528

CPC分类号： H01L24/11 ,  H01L21/02282 ,  H01L21/02318 ,  H01L21/311 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/7685 ,  H01L21/76871 ,  H01L23/525 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/81 ,  H01L24/94 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/0361 ,  H01L2224/0381 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05083 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/211 ,  H01L2224/8112 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/821 ,  H01L2224/82105 ,  H01L2224/94 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/143 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2224/03

摘要： Embodiments of the present disclosure are directed towards a method of assembling an integrated circuit package. In embodiments the method may include providing a wafer having an unpatterned passivation layer to prevent corrosion of metal conductors embedded in the wafer. The method may further include laminating a dielectric material on the passivation layer to form a dielectric layer and selectively removing dielectric material to form voids in the dielectric layer. These voids may reveal portions of the passivation layer disposed over the metal conductors. The method may then involve removing the portions of the passivation layer to reveal the metal conductors. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例涉及组装集成电路封装的方法。 在实施例中，该方法可以包括提供具有未图案化钝化层的晶片以防止嵌入晶片中的金属导体的腐蚀。 该方法还可以包括将绝缘材料层压在钝化层上以形成电介质层，并选择性地去除电介质材料以在电介质层中形成空隙。 这些空隙可以露出设置在金属导体上的钝化层的部分。 该方法可以包括去除钝化层的部分以露出金属导体。 可以描述和/或要求保护其他实施例。

公开(公告)号：US08878360B2

公开(公告)日：2014-11-04

申请号：US13548705

申请日：2012-07-13

申请人： Thorsten Meyer ,  Gerald Ofner ,  Sven Albers

发明人： Thorsten Meyer ,  Gerald Ofner ,  Sven Albers

IPC分类号： H01L23/48

CPC分类号： H01L23/49816 ,  H01L21/561 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/16 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/24011 ,  H01L2224/24105 ,  H01L2224/24145 ,  H01L2224/24146 ,  H01L2224/24195 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/73209 ,  H01L2224/73217 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/81191 ,  H01L2224/82031 ,  H01L2224/82039 ,  H01L2224/821 ,  H01L2224/83191 ,  H01L2224/83385 ,  H01L2224/92124 ,  H01L2224/92224 ,  H01L2224/92244 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19105 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2224/83 ,  H01L2924/01014 ,  H01L2924/01006 ,  H01L2224/82 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stacked semiconductor device and method of manufacturing a stacked semiconductor device are described. The semiconductor device may include a reconstituted base layer having a plurality of embedded semiconductor chips. A first redistribution layer may contact the electrically conductive contacts of the embedded chips and extend beyond the boundary of one or more of the embedded chips, forming a fan-out area. Another chip may be stacked above the chips embedded in the base layer and be electrically connected to the embedded chips by a second redistribution layer. Additional layers of chips may be included in the semiconductor device.

摘要翻译： 对叠层半导体器件及其制造方法进行说明。 半导体器件可以包括具有多个嵌入式半导体芯片的复原基底层。 第一再分配层可以接触嵌入式芯片的导电触点并且延伸超过一个或多个嵌入式芯片的边界，形成扇出区域。 另外的芯片可以堆叠在嵌入在基底层中的芯片之上，并通过第二再分布层与嵌入式芯片电连接。 芯片的附加层可以包括在半导体器件中。

公开(公告)号：US20140138827A1

公开(公告)日：2014-05-22

申请号：US14164289

申请日：2014-01-27

申请人： Thorsten Meyer ,  Gerald Ofner ,  Bernd Waidhas

发明人： Thorsten Meyer ,  Gerald Ofner ,  Bernd Waidhas

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L23/498

CPC分类号： H01L24/81 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/14 ,  H01L24/17 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/16 ,  H01L2224/0231 ,  H01L2224/02371 ,  H01L2224/02373 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/00

摘要： According to various embodiments, a flip chip package structure is provided in which a redistribution layer (RDL) is disposed on a surface of both a semiconductor chip and one or more lateral extensions of the semiconductor chip surface. The lateral extensions may be made using, e.g., a reconstituted wafer to implement a fanout region lateral to one or more sides of the semiconductor chip. One or more electrical connectors such as solder bumps or copper cylinders may be applied to the RDL, and an interposer such as a PCB interposer may be connected to the electrical connectors. In this way, a relatively tight semiconductor pad pitch may be accommodated and translated to an appropriate circuit board pitch without necessarily requiring a silicon or glass interposer.

摘要翻译： 根据各种实施例，提供了一种倒装芯片封装结构，其中再分配层（RDL）设置在半导体芯片和半导体芯片表面的一个或多个侧向延伸部分的表面上。 横向延伸部可以使用例如重构的晶片来实现半导体芯片的一个或多个侧面的横向扇出区域。 可以将一个或多个电连接器（例如焊料凸块或铜圆筒）施加到RDL，并且诸如PCB插入器的插入件可以连接到电连接器。 以这种方式，可以容纳相对紧凑的半导体衬垫间距并将其转换成适当的电路板间距，而不需要硅或玻璃插入件。