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19 条记录 (耗时 0.026 秒)

    FASTENING MECHANISM
    1.
    发明申请
    FASTENING MECHANISM 审中-公开
    快速机制

    公开(公告)号：US20100212228A1

    公开(公告)日：2010-08-26

    申请号：US12424532

    申请日：2009-04-15

    申请人： Yi-Ming Chang ,  Min-Chun Chen

    发明人： Yi-Ming Chang ,  Min-Chun Chen

    IPC分类号： E05F11/24

    CPC分类号： E05B65/006 ,  E05B17/0037 ,  E05B2015/0235 ,  G06F1/1616 ,  G06F1/1679

    摘要： A fastening mechanism suitable for being assembled into a device having a housing is provided. The fastening mechanism includes a post, a latching element, at least a plunger assembly, and an operating element. The latching element has at least an opening, the plunger assembly is disposed at a side of the latching element, and the operating element is in contact with the latching element. The post passes through the opening and presses against the plunger assembly and the post is confined by the latching element when the operating element is in a locking position. The operating element drives the latching element to move horizontally relative to the latching element so as to release the post from confinement and the plunger assembly moves vertically relative to the latching element so as to push the post out of the opening when the operating element moves to an unlocking position.

    摘要翻译： 提供一种适于组装成具有壳体的装置的紧固机构。 紧固机构包括柱，闩锁元件，至少一个柱塞组件和操作元件。 闩锁元件具有至少一个开口，柱塞组件设置在闩锁元件的一侧，并且操作元件与闩锁元件接触。 柱通过开口并压靠在柱塞组件上，当操作元件处于锁定位置时，该柱由锁定元件限制。 操作元件驱动闩锁元件相对于闩锁元件水平移动，以便将柱塞从限制释放，并且柱塞组件相对于闩锁元件垂直移动，以便当操作元件移动到 解锁位置

    Electronic device
    3.
    发明授权
    Electronic device 有权
    电子设备

    公开(公告)号：US08116101B2

    公开(公告)日：2012-02-14

    申请号：US12368963

    申请日：2009-02-10

    申请人： Yi-Ming Chang ,  Yung-Chih Kuo ,  Chung-Teng Wu

    发明人： Yi-Ming Chang ,  Yung-Chih Kuo ,  Chung-Teng Wu

    IPC分类号： H05K7/02

    CPC分类号： G06F1/1656 ,  G06F1/1616

    摘要： An electronic device including a housing, a circuit board, a first non-metal conductive cushion and a fastening element is provided. The circuit board is disposed in the housing. The first non-metal conductive cushion is disposed between the circuit board and the housing. A potential of the first non-metal conductive cushion is equal to a potential of the housing. The fastening element fastens the circuit board and the non-metal conductive cushion to the housing.

    摘要翻译： 提供了一种包括壳体，电路板，第一非金属导电衬垫和紧固元件的电子设备。 电路板设置在壳体中。 第一非金属导电衬垫设置在电路板和壳体之间。 第一非金属导电垫的电位等于壳体的电位。 紧固元件将电路板和非金属导电垫紧固到壳体。

    METHOD OF MANUFACTURING A LIQUID CRYSTAL ALIGNMENT FILM UTILIZING LONG-THROW SPUTTERING
    4.
    发明申请
    METHOD OF MANUFACTURING A LIQUID CRYSTAL ALIGNMENT FILM UTILIZING LONG-THROW SPUTTERING 审中-公开
    使用长时间喷溅的液晶对准膜的制造方法

    公开(公告)号：US20060272938A1

    公开(公告)日：2006-12-07

    申请号：US10908916

    申请日：2005-06-01

    申请人： Ta-Shuang Kuan ,  Yi-Ming Chang ,  Chia-Te Lin ,  Chia-Tsung Chan

    发明人： Ta-Shuang Kuan ,  Yi-Ming Chang ,  Chia-Te Lin ,  Chia-Tsung Chan

    IPC分类号： C23C14/00

    CPC分类号： C23C14/34 ,  C23C14/225

    摘要： The present invention provides a method of manufacturing an LC alignment film utilizing long-throw sputtering. The method includes putting a substrate on a substrate carrier in a chamber, utilizing high-density plasma to bombard a target over the substrate to produce sputtering species, and providing a bias voltage in the chamber. Nearly vertical directional sputtering species are deposited on the surface of the substrate to form an LC alignment film. The distance between the target and the substrate is more than 20 cm.

    摘要翻译： 本发明提供利用长投射溅射制造LC取向膜的方法。 该方法包括将衬底放置在室中的衬底载体上，利用高密度等离子体在衬底上轰击靶以产生溅射物质，并在腔室中提供偏置电压。 几乎垂直的定向溅射物质沉积在衬底的表面上以形成LC取向膜。 靶和基片之间的距离大于20厘米。

    ELECTRONIC DEVICE
    7.
    发明申请
    ELECTRONIC DEVICE 有权
    电子设备

    公开(公告)号：US20100142166A1

    公开(公告)日：2010-06-10

    申请号：US12368963

    申请日：2009-02-10

    申请人： Yi-Ming Chang ,  Yung-Chih Kuo ,  Chung-Teng Wu

    发明人： Yi-Ming Chang ,  Yung-Chih Kuo ,  Chung-Teng Wu

    IPC分类号： H05K5/00

    CPC分类号： G06F1/1656 ,  G06F1/1616

    摘要： An electronic device including a housing, a circuit board, a first non-metal conductive cushion and a fastening element is provided. The circuit board is disposed in the housing. The first non-metal conductive cushion is disposed between the circuit board and the housing. A potential of the first non-metal conductive cushion is equal to a potential of the housing. The fastening element fastens the circuit board and the non-metal conductive cushion to the housing.

    摘要翻译： 提供了一种包括壳体，电路板，第一非金属导电衬垫和紧固元件的电子设备。 电路板设置在壳体中。 第一非金属导电衬垫设置在电路板和壳体之间。 第一非金属导电垫的电位等于壳体的电位。 紧固元件将电路板和非金属导电垫紧固到壳体。

    Method and structure for a wafer level packaging
    8.
    发明申请
    Method and structure for a wafer level packaging 有权
    晶圆级封装的方法和结构

    公开(公告)号：US20050077605A1

    公开(公告)日：2005-04-14

    申请号：US10986104

    申请日：2004-11-12

    申请人： Dylan Yu ,  Gary Guan ,  Jolas Chen ,  Yi-Ming Chang

    发明人： Dylan Yu ,  Gary Guan ,  Jolas Chen ,  Yi-Ming Chang

    IPC分类号： G02F1/13 ,  H01L21/48 ,  H01L21/50 ,  H01L23/00 ,  H01L23/02 ,  H01L23/28 ,  H01L27/14

    CPC分类号： H01L27/14618 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/16195 ,  H01L2924/00014

    摘要： A method and structure for a wafer level package is provided, which utilizes a plurality of spacer walls on a semiconductor wafer or a transparent substrate, which has the ability to decide the position of the sealant. As a result, the dimension of a device is decided by the position of the sealant and the spacer walls, therefore, shrinking the distance between the photosensitive zone and the sealant will enhance the gross dies after performing a die sawing process to the whole semiconductor wafer. In addition, the semiconductor process decides the height of the spacer walls so that the yield will be improved due to the fact that a uniformity of the gap, which is between the semiconductor wafer and the transparent substrate, and the width of sealant, will be controlled.

    摘要翻译： 提供了一种用于晶片级封装的方法和结构，其利用半导体晶片或透明基板上的多个间隔壁，其具有决定密封剂位置的能力。 结果，装置的尺寸由密封剂和间隔壁的位置决定，因此，在对整个半导体晶片进行模切工艺之后，缩小感光区和密封剂之间的距离将增加总模量 。 此外，半导体工艺决定间隔壁的高度，从而由于半导体晶片和透明基板之间的间隙的均匀性和密封剂的宽度将是 受控。

    Chip package and method for forming the same
    9.
    发明授权
    Chip package and method for forming the same 有权
    芯片封装及其形成方法

    公开(公告)号：US08890191B2

    公开(公告)日：2014-11-18

    申请号：US13536628

    申请日：2012-06-28

    申请人： Chuan-Jin Shiu ,  Po-Shen Lin ,  Yi-Ming Chang

    发明人： Chuan-Jin Shiu ,  Po-Shen Lin ,  Yi-Ming Chang

    IPC分类号： H01L33/00 ,  H01L21/00 ,  H01L27/146

    CPC分类号： H01L27/14618 ,  H01L27/1463 ,  H01L2224/13 ,  H01L2924/1461 ,  H01L2924/00

    摘要： An embodiment of the invention provides a chip package which includes: a substrate having a first surface and a second surface; an optoelectronic device formed in the substrate; a conducting layer disposed on the substrate, wherein the conducting layer is electrically connected to the optoelectronic device; an insulating layer disposed between the substrate and the conducting layer; a light shielding layer disposed on the second surface of the substrate and directly contacting with the conducting layer, wherein the light shielding layer has a light shielding rate of more than about 80% and has at least an opening exposing the conducting layer; and a conducting bump disposed in the opening of the light shielding layer to electrically contact with the conducting layer, wherein all together the light shielding layer and the conducting bump substantially and completely cover the second surface of the substrate.

    摘要翻译： 本发明的实施例提供了一种芯片封装，其包括：具有第一表面和第二表面的基板; 形成在所述基板中的光电子器件; 设置在所述基板上的导电层，其中所述导电层电连接到所述光电子器件; 设置在所述基板和所述导电层之间的绝缘层; 遮光层，其设置在所述基板的所述第二表面上并与所述导电层直接接触，其中所述遮光层具有大于约80％的遮光率并且具有暴露所述导电层的至少一个开口; 以及布置在所述遮光层的开口中以与所述导电层电接触的导电凸块，其中所述遮光层和所述导电凸起部分都基本上完全覆盖所述基板的第二表面。