公开(公告)号：US06489181B2

公开(公告)日：2002-12-03

申请号：US09897408

申请日：2001-07-03

申请人： Yoshiyuki Kado ,  Tsukio Funaki ,  Hiroshi Kikuchi ,  Ikuo Yoshida

发明人： Yoshiyuki Kado ,  Tsukio Funaki ,  Hiroshi Kikuchi ,  Ikuo Yoshida

IPC分类号： H01L2148

CPC分类号： H01L24/81 ,  H01L23/49838 ,  H01L23/528 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H01L2924/00

摘要： Silicon chip having narrow pitches of Au bumps are mounted on a module substrate in such a way that while taking into consideration a difference in coefficient of thermal expansion between the silicon chip and the module substrate, a total pitch of electrode pads of the silicon chip is made narrower than a total pitch of the Au bumps, thereby preventing misregistration between the Au bumps and the electrode pads in the course of heat treatment to ensure reliable contact therebetween.

摘要翻译： 具有较小间距的Au凸块的硅芯片以这样的方式安装在模块基板上，同时考虑到硅芯片和模块基板之间的热膨胀系数的差异，硅芯片的电极焊盘的总间距为 比Au凸块的总间距窄，从而防止在热处理过程中Au凸块和电极焊盘之间的不对准，以确保其间的可靠接触。

公开(公告)号：US06787395B2

公开(公告)日：2004-09-07

申请号：US10269972

申请日：2002-10-15

申请人： Yoshiyuki Kado ,  Tsukio Funaki ,  Hiroshi Kikuchi ,  Ikuo Yoshida

发明人： Yoshiyuki Kado ,  Tsukio Funaki ,  Hiroshi Kikuchi ,  Ikuo Yoshida

IPC分类号： H01L2144

CPC分类号： H01L24/81 ,  H01L23/49838 ,  H01L23/528 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H01L2924/00

摘要： Silicon chip having narrow pitches of Au bumps are mounted on a module substrate in such a way that while taking into consideration a difference in coefficient of thermal expansion between the silicon chip and the module substrate, a total pitch of electrode pads of the silicon chip is made narrower than a total pitch of the Au bumps, thereby preventing misregistration between the Au bumps and the electrode pads in the course of heat treatment to ensure reliable contact therebetween.

摘要翻译： 具有较小间距的Au凸块的硅芯片以这样的方式安装在模块基板上，同时考虑到硅芯片和模块基板之间的热膨胀系数的差异，硅芯片的电极焊盘的总间距为 比Au凸块的总间距窄，从而防止在热处理过程中Au凸块和电极焊盘之间的不对准，以确保其间的可靠接触。

公开(公告)号：US06714383B2

公开(公告)日：2004-03-30

申请号：US09740957

申请日：2000-12-21

申请人： Yoshiyuki Kado ,  Hiroshi Kikuchi ,  Ikuo Yoshida

发明人： Yoshiyuki Kado ,  Hiroshi Kikuchi ,  Ikuo Yoshida

IPC分类号： G11B560

CPC分类号： G11B5/4846 ,  G11B5/4853 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/05599

摘要： A technique to be applied to improve the reliability of a magnetic disk apparatus is disclosed. In detail, a magnetic disk apparatus comprises a disk-shaped magnetic recording medium that rotates in operation, a magnetic head for writing the data in the magnetic recording medium and for reading out the data written in the magnetic recording medium, a carriage mechanism having an arm on which the magnetic head is located and moving the magnetic head to an arbitrary position on the magnetic recording medium, a wiring member having wiring, a semiconductor chip having a first main surface and a second main surface that are opposed to each other and electrodes formed on the first main surface, the semiconductor chip being fixed to the wiring member in the state that the electrodes are facing to the wiring of the wiring member, and a housing that contains the magnetic recording medium, the magnetic head, the carriage mechanism, the wiring member, and the semiconductor chip, wherein the edge of the first main surface side of the semiconductor chip and the edge of the second main surface side are covered with insulative resin.

摘要翻译： 公开了一种应用于提高磁盘装置的可靠性的技术。 详细地说，一种磁盘装置包括一个在工作中旋转的盘形磁记录介质，一个磁头，用于将数据写入磁记录介质中，并读出写在磁记录介质中的数据;一个滑架机构， 磁头位于其上并将磁头移动到磁记录介质上的任意位置，具有布线的布线构件，具有彼此相对的第一主表面和第二主表面的半导体芯片和电极 形成在所述第一主表面上，所述半导体芯片在所述电极面对所述布线构件的布线的状态下固定到所述布线构件;以及壳体，其容纳所述磁记录介质，所述磁头，所述滑架机构， 布线部件和半导体芯片，其中半导体芯片的第一主表面侧的边缘和第二主表面的边缘 侧面用绝缘树脂覆盖。

公开(公告)号：US06528343B1

公开(公告)日：2003-03-04

申请号：US09646711

申请日：2000-11-29

申请人： Hiroshi Kikuchi ,  Yoshiyuki Kado ,  Ikuo Yoshida

发明人： Hiroshi Kikuchi ,  Yoshiyuki Kado ,  Ikuo Yoshida

IPC分类号： H01L2144

CPC分类号： H01L24/94 ,  H01L23/3114 ,  H01L24/02 ,  H01L24/11 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29355 ,  H01L2224/29499 ,  H01L2224/32225 ,  H01L2224/48247 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H05K3/323 ,  H05K2201/023 ,  H05K2201/091 ,  H05K2201/10719 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/13111 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： Disclosed herein is a semiconductor device, which comprises a semiconductor chip including, over one main surface thereof, first wirings, protective films formed so as to cover other portions excluding parts of the first wirings, flexible layers respectively formed on the protective films so as to exclude the parts of the first wirings, and second wirings having first portions respectively electrically connected to the parts of the first wirings, and second portions respectively drawn onto the flexible layers; a wiring board having third wirings over one main surface thereof; and an adhesive comprising a large number of conductive particles contained in an insulative resin, and wherein the semiconductor chip is bonded to the wiring board with the adhesive interposed therebetween in a state in which the one main surface thereof is face to face with the one main surface of the wiring board, and the second portions of the second wirings are respectively electrically connected to the third wirings with some of the large number of conductive particles interposed therebetween.

摘要翻译： 这里公开了一种半导体器件，其包括在其一个主表面上包括第一布线的半导体芯片，形成为覆盖除了第一布线的部分以外的其它部分的保护膜，分别形成在保护膜上的柔性层，以便 排除第一布线的部分，第二布线具有分别电连接到第一布线的部分的第一部分和分别拉到柔性层上的第二部分; 布线板，其一个主表面上具有第三布线; 以及包含绝缘树脂中所含的大量导电性粒子的粘合剂，其中，所述半导体芯片在其一个主面与所述一个主体面对的状态下与所述配线基板接合， 布线板的表面和第二布线的第二部分分别电连接到第三布线，其中一些导电颗粒被插入其间。

公开(公告)号：US06646350B2

公开(公告)日：2003-11-11

申请号：US09922230

申请日：2001-08-03

申请人： Naotaka Tanaka ,  Hideo Miura ,  Yoshiyuki Kado ,  Ikuo Yoshida ,  Takahiro Naito

发明人： Naotaka Tanaka ,  Hideo Miura ,  Yoshiyuki Kado ,  Ikuo Yoshida ,  Takahiro Naito

IPC分类号： H01L2352

CPC分类号： H01L23/562 ,  H01L21/563 ,  H01L23/145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/12044 ,  H01L2924/00

摘要： In order to realize a semiconductor device and a manufacturing method thereof which can keep with a high reliability an electric connection between each of bump pads formed on LSI chips and each of electrode pads formed on an interconnection substrate, within an guaranteed temperature range, a thermal expansion coefficient of an adhesive (3) is in the range of 20 to 60 ppm, and an elastic modulus of a build-up portion (6) is in the range of 5 to 10 GPa. Further, the build-up portion (6) is constituted by a multi-layer build-up substrate in which buid-up portion a peak value (a glass transition temperature) of a loss coefficient exists within a range of 100° C. to 250° C. and does not exist within a range of 0° C. to 100° C. By setting or selecting the physical properties in the manner disclosed above, it is possible to realize a semiconductor device and a manufacturing method thereof which can keep with a high reliability an electric bonding between the bump pads (2) formed on the LSI chips (1) and the electrode pads (4) on the interconnection substrate (5) within an guaranteed temperature range.

摘要翻译： 为了实现能够保持高可靠性的半导体器件及其制造方法，在形成在LSI芯片上的每个凸块焊盘和形成在互连基板上的每个电极焊盘之间的电连接在保证的温度范围内， 粘合剂（3）的膨胀系数在20〜60ppm的范围内，积聚部（6）的弹性模量在5〜10GPa的范围内。 此外，积存部（6）由多层积层基板构成，在该多层积层基板中，增益部分的损耗系数的峰值（玻璃化转变温度）存在于100℃〜 250℃，并且不存在于0℃至100℃的范围内。通过以上述方式设置或选择物理性质，可以实现可以保持的半导体器件及其制造方法 在保证温度范围内，形成在LSI芯片（1）上的凸块焊盘（2）和互连基板（5）上的电极焊盘（4）之间的电连接具有高可靠性。

公开(公告)号：US06492737B1

公开(公告)日：2002-12-10

申请号：US09921919

申请日：2001-08-06

申请人： Satoshi Imasu ,  Ikuo Yoshida ,  Norio Kishikawa ,  Yoshiyuki Kado ,  Kazuyuki Taguchi ,  Takahiro Naito ,  Toshihiko Sato

发明人： Satoshi Imasu ,  Ikuo Yoshida ,  Norio Kishikawa ,  Yoshiyuki Kado ,  Kazuyuki Taguchi ,  Takahiro Naito ,  Toshihiko Sato

IPC分类号： H01L2312

CPC分类号： H01L21/563 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/31 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/06136 ,  H01L2224/1134 ,  H01L2224/13023 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/293 ,  H01L2224/29386 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83101 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/1517 ,  H01L2924/15747 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/13111 ,  H01L2924/05442 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/05552

摘要： An electronic device comprising: a semiconductor chip having plural electrode pads on one main surface thereof; a wiring board having plural connection parts; and plural salient electrodes disposed respectively between the electrode pads of the semiconductor chip and the connection parts of the wiring board to provide electrical connections between the two, the salient electrodes being arranged in an array not providing balance of the semiconductor chip with respect to one main surface of the wiring board, the plural connection parts of the wiring board being arranged at a deeper position than one main surface of the wiring board in a depth direction from the one main surface.

摘要翻译： 一种电子设备，包括：在其一个主表面上具有多个电极焊盘的半导体芯片; 具有多个连接部的布线板; 以及分别设置在半导体芯片的电极焊盘和布线板的连接部分之间以提供两者之间的电连接的多个凸起电极，所述凸起电极被布置成不能提供半导体芯片相对于一个主体的平衡的阵列 布线板的多个连接部分布置在比一个主表面在深度方向上比布线板的一个主表面更深的位置。

公开(公告)号：US07531441B2

公开(公告)日：2009-05-12

申请号：US11399365

申请日：2006-04-07

申请人： Yoshiyuki Kado ,  Takahiro Naito ,  Toshihiko Sato ,  Hikaru Ikegami ,  Takafumi Kikuchi

发明人： Yoshiyuki Kado ,  Takahiro Naito ,  Toshihiko Sato ,  Hikaru Ikegami ,  Takafumi Kikuchi

IPC分类号： H01L21/44

CPC分类号： H01L24/14 ,  H01L23/28 ,  H01L23/3128 ,  H01L23/50 ,  H01L23/5386 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/18 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06558 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/20752 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/92247 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00011

摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

摘要翻译： 在多芯片模块（MCM）中安装在封装基板（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A）和芯片 （2B），其上形成有闪速存储器，通过Au凸块（4）与封装基板（1）的布线（5）电连接，并且在芯片（2A）的主表面（下表面）之间形成间隙， （2B）和封装基板（1）的主表面填充有未填充树脂（6）。 其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过Au导线（8）电连接到封装衬底（1）的焊盘（9）。

公开(公告)号：US07042073B2

公开(公告)日：2006-05-09

申请号：US10479785

申请日：2002-04-05

申请人： Yoshiyuki Kado ,  Takahiro Naito ,  Toshihiko Sato ,  Hikaru Ikegami ,  Takafumi Kikuchi

发明人： Yoshiyuki Kado ,  Takahiro Naito ,  Toshihiko Sato ,  Hikaru Ikegami ,  Takafumi Kikuchi

IPC分类号： H01L23/02

CPC分类号： H01L24/14 ,  H01L23/28 ,  H01L23/3128 ,  H01L23/50 ,  H01L23/5386 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/18 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06558 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/20752 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/92247 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00011

摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

公开(公告)号：US20060189031A1

公开(公告)日：2006-08-24

申请号：US11399365

申请日：2006-04-07

申请人： Yoshiyuki Kado ,  Takahiro Naito ,  Toshihiko Sato ,  Hikaru Ikegami ,  Takafumi Kikuchi

发明人： Yoshiyuki Kado ,  Takahiro Naito ,  Toshihiko Sato ,  Hikaru Ikegami ,  Takafumi Kikuchi

IPC分类号： H01L21/78

CPC分类号： H01L24/14 ,  H01L23/28 ,  H01L23/3128 ,  H01L23/50 ,  H01L23/5386 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/18 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06558 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/20752 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/92247 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00011

摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

摘要翻译： 在多芯片模块（MCM）中安装在封装衬底（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A） 其上形成有闪速存储器的芯片（2B）通过Au凸块（4）与封装衬底（1）的布线（5）电连接，并且在主表面（下表面）之间形成间隙 芯片（2A），（2B）和封装基板（1）的主表面填充有未填充树脂（6）。 在其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过Au线（...）电连接到封装衬底（1）的焊盘（9） 8）。

公开(公告)号：US06828174B2

公开(公告)日：2004-12-07

申请号：US10364318

申请日：2003-02-12

申请人： Mitsuaki Katagiri ,  Yuji Shirai ,  Yoshiyuki Kado

发明人： Mitsuaki Katagiri ,  Yuji Shirai ,  Yoshiyuki Kado

IPC分类号： H01L2144

CPC分类号： H01L21/6836 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0655 ,  H01L2221/68327 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/4943 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/97 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012

摘要： With respect to two types of chips to be mounted on a main surface of a package substrate, the ratio of chip area to the number of terminals of one chip and that of the other chip are compared with each other and the chip smaller in the ratio is mounted by the wire bonding method, while the chip larger in the ratio is mounted by the flip-chip method. It is possible to reduce the cost of manufacturing a multi-chip module wherein plural types of chips having different terminal pitches are mounted on a wiring substrate.

摘要翻译： 对于要安装在封装基板的主表面上的两种类型的芯片，将芯片面积与一个芯片的端子数与另一个芯片的端子数之比进行比较，并且芯片的比例越小 通过引线接合方式安装，而通过倒装芯片方法安装比例大的芯片。 可以降低制造具有不同端子间距的多种类型的芯片的多芯片模块的成本安装在布线基板上。