公开(公告)号：US5486716A

公开(公告)日：1996-01-23

申请号：US880720

申请日：1992-05-08

申请人： Yutaka Saito ,  Jun Osanai ,  Yoshikazu Kojima ,  Masaaki Kamiya

发明人： Yutaka Saito ,  Jun Osanai ,  Yoshikazu Kojima ,  Masaaki Kamiya

IPC分类号： H01L21/8238 ,  H01L21/336 ,  H01L21/822 ,  H01L21/8234 ,  H01L27/02 ,  H01L27/04 ,  H01L27/088 ,  H01L27/092 ,  H01L29/78 ,  H01L23/62

CPC分类号： H01L27/0266 ,  H01L2924/0002

摘要： A semiconductor integrated circuit device has a peripheral transistor having a strengthened ESD resistance for external connection. The peripheral transistor has a channel structure effective to release an electrostatic stress current more efficiently than an internal transistor of the semiconductor integrated circuit. In one embodiment, the peripheral transistor has a channel portion that is shorter than the channel portion of an internal transistor. In another embodiment, the peripheral transistor has a substrate contact, a ground line, and an additional resistor interconnection between them to efficiently release an electrostatic stress current. In another embodiment, the peripheral transistor has an asymmetric channel structure so that the distance between the source contact and the gate electrode is set shorter than the distance between the drain contact and the gate electrode. In another embodiment, the peripheral transistor has a drain region and a gate insulating film having a portion of the insulating film that is thinner than the rest of the gate insulating film. In another embodiment, a gate contact is electrically connected between a gate electrode and a metal gate line of the peripheral transistor to reduce a resistance therebetween. In another embodiment, the peripheral transistor has a transistor breakdown voltage that is smaller than a gate breakdown voltage to efficiently release electrostatic stress current.

摘要翻译： 半导体集成电路器件具有用于外部连接的具有增强的ESD电阻的外围晶体管。 外围晶体管具有有效地比半导体集成电路的内部晶体管更有效地释放静电应力电流的沟道结构。 在一个实施例中，外围晶体管具有比内部晶体管的沟道部分短的沟道部分。 在另一个实施例中，外围晶体管具有衬底接触，接地线和它们之间的附加电阻器互连，以有效地释放静电应力电流。 在另一个实施例中，外围晶体管具有非对称沟道结构，使得源极接触和栅电极之间的距离被设定为短于漏极接触和栅电极之间的距离。 在另一个实施例中，外围晶体管具有漏极区域和栅极绝缘膜，其绝缘膜的一部分比栅极绝缘膜的其余部分薄。 在另一个实施例中，栅极接触电连接在外围晶体管的栅电极和金属栅极线之间以减小它们之间的电阻。 在另一个实施例中，外围晶体管具有小于栅极击穿电压的晶体管击穿电压，以有效地释放静电应力电流。

公开(公告)号：US6028338A

公开(公告)日：2000-02-22

申请号：US463729

申请日：1995-06-05

申请人： Yutaka Saito ,  Jun Osanai ,  Yoshikazu Kojima ,  Masaaki Kamiya

发明人： Yutaka Saito ,  Jun Osanai ,  Yoshikazu Kojima ,  Masaaki Kamiya

IPC分类号： H01L21/8238 ,  H01L21/336 ,  H01L21/822 ,  H01L21/8234 ,  H01L27/02 ,  H01L27/04 ,  H01L27/088 ,  H01L27/092 ,  H01L29/78 ,  H01L23/62 ,  H01L29/76

CPC分类号： H01L27/0266 ,  H01L2924/0002

摘要： A semiconductor integrated circuit device has a peripheral transistor having a strengthened ESD resistance for external connection. The peripheral transistor has a channel structure effective to release an electrostatic stress current more efficiently than an internal transistor of the semiconductor integrated circuit. In one embodiment, the peripheral transistor has a channel portion that is shorter than the channel portion of an internal transistor. In another embodiment, the peripheral transistor has a substrate contact, a ground line, and an additional resistor interconnection between them to efficiently release an electrostatic stress current. In another embodiment, the peripheral transistor has an asymmetric channel structure so that the distance between the source contact and the gate electrode is set shorter than the distance between the drain contact and the gate electrode. In a further embodiment, the peripheral transistor has a drain region and a gate insulating film having a portion of the insulating film that is thinner than the rest of the gate insulating film. In another embodiment, a gate contact is electrically connected between a gate electrode and a metal gate line of the peripheral transistor to reduce a resistance therebetween. In another embodiment, the peripheral transistor has a transistor breakdown voltage that is smaller than a gate breakdown voltage to efficiently release electrostatic stress current.

摘要翻译： 半导体集成电路器件具有用于外部连接的具有增强的ESD电阻的外围晶体管。 外围晶体管具有有效地比半导体集成电路的内部晶体管更有效地释放静电应力电流的沟道结构。 在一个实施例中，外围晶体管具有比内部晶体管的沟道部分短的沟道部分。 在另一个实施例中，外围晶体管具有衬底接触，接地线和它们之间的附加电阻器互连，以有效地释放静电应力电流。 在另一个实施例中，外围晶体管具有非对称沟道结构，使得源极接触和栅电极之间的距离被设定为短于漏极接触和栅电极之间的距离。 在另一个实施例中，外围晶体管具有漏区和栅极绝缘膜，绝缘膜的一部分比栅极绝缘膜的其余部分薄。 在另一个实施例中，栅极接触电连接在外围晶体管的栅电极和金属栅极线之间以减小它们之间的电阻。 在另一个实施例中，外围晶体管具有小于栅极击穿电压的晶体管击穿电压，以有效地释放静电应力电流。

公开(公告)号：US06747319B2

公开(公告)日：2004-06-08

申请号：US09803624

申请日：2001-03-09

申请人： Yoshikazu Kojima ,  Kazutoshi Ishii ,  Masaaki Kamiya ,  Yasuhiro Moya

发明人： Yoshikazu Kojima ,  Kazutoshi Ishii ,  Masaaki Kamiya ,  Yasuhiro Moya

IPC分类号： H01L2976

CPC分类号： H01L29/7834 ,  H01L27/0266 ,  H01L27/092 ,  H01L29/0847 ,  H01L29/105 ,  H01L29/42364 ,  H01L29/42368 ,  H01L29/7835 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device including multiple high-voltage drive transistors in its output section is improved in electrostatic withstand voltage by connecting electrostatic protection transistors in parallel with the high-voltage drive transistors connected to the output pads. The drain withstand voltage of the electrostatic protection transistors is made lower than the drain withstand voltage of the high-voltage drive transistors. In addition, the channel length of electrostatic protection transistors is made short to enable efficient bipolar operation of the electrostatic protection transistors.

摘要翻译： 在其输出部分中包括多个高电压驱动晶体管的半导体器件通过将静电保护晶体管与连接到输出焊盘的高电压驱动晶体管并联连接来提高静电耐受电压。 使静电保护晶体管的漏极耐受电压低于高电压驱动晶体管的漏极耐受电压。 此外，静电保护晶体管的沟道长度变短，以实现静电保护晶体管的高效双极性操作。

公开(公告)号：US5825064A

公开(公告)日：1998-10-20

申请号：US25822

申请日：1993-03-03

申请人： Yutaka Hayashi ,  Yoshikazu Kojima ,  Ryoji Takada ,  Masaaki Kamiya

发明人： Yutaka Hayashi ,  Yoshikazu Kojima ,  Ryoji Takada ,  Masaaki Kamiya

IPC分类号： G11C17/00 ,  G11C11/56 ,  G11C14/00 ,  G11C16/04 ,  G11C27/00 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/105 ,  H01L29/788 ,  H01L29/792 ,  H01L29/76

CPC分类号： G11C27/005 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C14/00

摘要： The semiconductor nonvolatile memory has integrated memory cells, each being operative to carry out writing and reading of information in random-access basis and having an electric charge storage structure effective to memorize the information in nonvolatile state. The information is temporarily written into each memory cell in volatile state, and thereafter the temporarily written information is written at one into the respective electric charge storage structure of each memory cell, thereby effecting quick writing of nonvolatile information into the respective memory cells of multi-bits.

摘要翻译： 半导体非易失性存储器具有集成存储单元，每个存储单元可操作以在随机存取的基础上进行信息的写入和读取，并且具有有效地将信息存储在非易失性状态的电荷存储结构。 该信息以易失性状态临时写入每个存储单元，之后将临时写入的信息一个写入每个存储单元的各个电荷存储结构中，从而将非易失性信息快速写入到多个存储单元的各个存储单元中， 位。

公开(公告)号：US4943943A

公开(公告)日：1990-07-24

申请号：US633863

申请日：1984-07-24

申请人： Yutaka Hayashi ,  Yoshikazu Kojima ,  Masaaki Kamiya ,  Kojiro Tanaka

发明人： Yutaka Hayashi ,  Yoshikazu Kojima ,  Masaaki Kamiya ,  Kojiro Tanaka

IPC分类号： H01L27/112 ,  G11C16/04 ,  G11C16/26 ,  G11C17/00 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/10 ,  H01L29/788 ,  H01L29/792 ,  H03K19/0944

CPC分类号： G11C16/0425 ,  G11C16/26 ,  G11C17/00

摘要： The present invention provides a read-out circuit for a nonvolatile memory which is capable of extracting a widely-fluctuating output voltage, even when the threshold value of the nonvolatile memory changes only a little.

摘要翻译： 本发明提供了一种非易失性存储器的读出电路，即使在非易失性存储器的阈值变化很小时也能够提取广泛波动的输出电压。

公开(公告)号：USRE36836E

公开(公告)日：2000-08-29

申请号：US510422

申请日：1995-08-02

申请人： Yutaka Hayashi ,  Masaaki Kamiya ,  Yoshikazu Kojima ,  Hiroaki Takasu

发明人： Yutaka Hayashi ,  Masaaki Kamiya ,  Yoshikazu Kojima ,  Hiroaki Takasu

IPC分类号： G02F1/136 ,  G02F1/1335 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L21/86 ,  H01L27/12 ,  H01L29/78 ,  H01L29/786 ,  H01L29/04 ,  H01L27/01

CPC分类号： G02F1/13454 ,  G02F1/136209 ,  G02F1/1368 ,  H01L21/84 ,  H01L21/86 ,  H01L27/1203 ,  H01L27/1214 ,  H01L29/66772 ,  H01L29/78633 ,  H01L29/78645 ,  H01L29/78648 ,  H01L29/78654 ,  G02F1/133512 ,  G02F2001/13613 ,  G02F2202/105 ,  Y10S148/012 ,  Y10S148/15 ,  Y10S438/977

摘要： The invention provides a semi-conductor light valve device and a process for fabricating the same. The device comprises a composite substrate having a supporte substrate, a light-shielding thin film formed on said supporte substrate and semiconductive thin film disposed on the light-shielding thin film with interposing an insulating thin film. A switching element made of a transistor and a transparent electrode for driving light valve are formed on the semiconductive thin film, and the switching element and the transparent electrode are connected electrically with each other. The transistor includes a channel region in the semiconductive thin film and a main gate electrode for controlling the conduction in the channel region, and the light-shielding thin film layer is so formed as to cover the channel region on the side opposite to said channel region, so as to prevent effectively a back channel and shut off the incident light.

摘要翻译： 本发明提供一种半导体光阀装置及其制造方法。 该装置包括具有支撑衬底的复合衬底，在所述支撑衬底上形成的遮光薄膜和设置在遮光薄膜上并具有绝缘薄膜的半导体薄膜。 在半导体薄膜上形成由晶体管构成的开关元件和用于驱动光阀的透明电极，并且开关元件和透明电极彼此电连接。 晶体管包括半导体薄膜中的沟道区域和用于控制沟道区域中的导通的主栅电极，并且遮光薄膜层形成为覆盖与所述沟道区域相对的一侧上的沟道区域 ，以便有效地防止背部通道并且切断入射光。

公开(公告)号：US6107163A

公开(公告)日：2000-08-22

申请号：US81987

申请日：1998-05-20

申请人： Yoshikazu Kojima ,  Masaaki Kamiya

发明人： Yoshikazu Kojima ,  Masaaki Kamiya

IPC分类号： H01L21/301 ,  B23D57/00 ,  B28D5/04 ,  H01L21/304 ,  H01L21/46

CPC分类号： H01L21/3043 ,  B23D57/0023 ,  B28D5/045

摘要： In a method of manufacturing a semiconductor chip, a wire is traveled in one way to cut a wafer into a plurality of chips while a wire train where wires are arranged by pitches of scribe lines is brought into contact with the scribe lines of the wafer linearly, and an abrasive solution is supplied to a contact portion thereof.

摘要翻译： 在制造半导体芯片的方法中，将导线以一种方式移动以将晶片切割成多个芯片，同时通过划线的间距布置导线的线串与晶片的划线线性地接触 并且将磨料溶液供应到其接触部分。

公开(公告)号：US5982461A

公开(公告)日：1999-11-09

申请号：US834288

申请日：1992-02-14

申请人： Yutaka Hayashi ,  Masaaki Kamiya ,  Yoshikazu Kojima ,  Hiroaki Takasu

发明人： Yutaka Hayashi ,  Masaaki Kamiya ,  Yoshikazu Kojima ,  Hiroaki Takasu

IPC分类号： G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  G09F9/30 ,  G09G3/20 ,  G09G3/36 ,  H01L27/12 ,  H01L29/78 ,  H01L29/786

CPC分类号： G02F1/13454 ,  G02F1/1362 ,  G02F2202/105

摘要： A light valve device has a drive substrate integrated with a drive electrode. A transistor is connected to the drive electrode and a driving circuit energizes the drive electrode through the transistor. An opposed substrate is provided opposed to the drive electrode, and an electrooptical material layer is disposed between the drive substrate and the opposed substrate. The drive substrate has a structure comprising a substrate layer and a semiconductor single crystal thin film layer. The semiconductor single crystal thin film layer is made by thinning a semiconductor single crystal wafer which has been bonded to the substrate layer. The light valve device has a small size and high pixel density and can be formed using miniaturization technology. The light valve can be used for a small size, high resolution video projector and a color matrix display device.

摘要翻译： PCT No.PCT / JP91 / 00580 Sec。 371日期：1992年2月14日 102（e）日期1992年2月14日PCT 1991年4月26日PCT PCT。 WO91 / 17471 PCT出版物 日期1991年11月14日光阀装置具有与驱动电极集成的驱动基板。 晶体管连接到驱动电极，驱动电路通过晶体管对驱动电极通电。 相对的基板与驱动电极相对设置，电光材料层设置在驱动基板和相对的基板之间。 驱动基板具有包括基板层和半导体单晶薄膜层的结构。 半导体单晶薄膜层通过使已结合到基底层的半导体单晶晶片变薄来制造。 光阀装置具有小尺寸和高像素密度，并且可以使用小型化技术形成。 光阀可用于小尺寸，高分辨率的视频投影机和彩色矩阵显示设备。

公开(公告)号：US4639755A

公开(公告)日：1987-01-27

申请号：US413492

申请日：1982-08-31

申请人： Masayuki Namiki ,  Masaaki Kamiya ,  Yoshikazu Kojima ,  Kojiro Tanaka

发明人： Masayuki Namiki ,  Masaaki Kamiya ,  Yoshikazu Kojima ,  Kojiro Tanaka

IPC分类号： H01L29/73 ,  G01K7/01 ,  H01L21/331 ,  H01L27/02 ,  H01L27/082 ,  H01L27/092 ,  H01L27/16 ,  H01L29/66 ,  H01L35/00 ,  H01L23/56

CPC分类号： H01L27/16 ,  H01L27/0211 ,  H01L27/0825 ,  H01L27/092 ,  H01L29/66

摘要： A thermosensitive semiconductor device has a semiconductor substrate of one conductivity type which is used as the common collector of at least two Darlington-connected transistors. The base of the first stage transistor is connected to the common collector to form a first terminal and the emitter of the final stage transistor forms a second terminal. A constant current source is connected between the first and second terminals. To reduce deviations in the temperature response, a second collector region can be used and which can extend to a depth deeper than the depth of the emitter of the final stage transistor to absorb some of the carriers injected by the emitter.

摘要翻译： 热敏半导体器件具有一种导电类型的半导体衬底，其用作至少两个达林顿连接的晶体管的公共集电极。 第一级晶体管的基极连接到公共集电极以形成第一端子，并且最后级晶体管的发射极形成第二端子。 恒流源连接在第一和第二端子之间。 为了减少温度响应的偏差，可以使用第二集电极区域，并且其可以延伸到比最终级晶体管的发射极的深度更深的深度，以吸收由发射极注入的一些载流子。

公开(公告)号：US5759878A

公开(公告)日：1998-06-02

申请号：US496540

申请日：1995-06-29

申请人： Yutaka Hayashi ,  Masaaki Kamiya ,  Yoshikazu Kojima ,  Hiroaki Takasu

发明人： Yutaka Hayashi ,  Masaaki Kamiya ,  Yoshikazu Kojima ,  Hiroaki Takasu

IPC分类号： G02F1/136 ,  G02F1/1335 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L21/86 ,  H01L27/12 ,  H01L29/78 ,  H01L29/786

CPC分类号： G02F1/13454 ,  G02F1/136209 ,  G02F1/1368 ,  H01L21/84 ,  H01L21/86 ,  H01L27/1203 ,  H01L27/1214 ,  H01L29/66772 ,  H01L29/78633 ,  H01L29/78645 ,  H01L29/78648 ,  H01L29/78654 ,  G02F1/133512 ,  G02F2001/13613 ,  G02F2202/105 ,  Y10S148/012 ,  Y10S148/15 ,  Y10S438/977

摘要： A method of fabricating a semiconductor device comprises the steps of preparing a transparent support substrate, forming a first gate electrode comprising semiconductor single crystal silicon by epitaxial growth on the transparent support substrate, forming an insulating film over the first gate electrode, forming a through-hole in the insulating film to expose a portion of the first gate electrode, laterally and epitaxially growing a semiconductor single crystal silicon thin film over the transparent substrate by epitaxial growth in the through-hole of the insulating film, forming a transistor element having a channel region formed in the semiconductor single crystal silicon thin film, and forming a second gate electrode over and electrically insulated from the channel region.

摘要翻译： 制造半导体器件的方法包括以下步骤：制备透明支撑衬底，通过在透明支撑衬底上外延生长形成包含半导体单晶硅的第一栅电极，在第一栅电极上形成绝缘膜，形成通孔， 在所述绝缘膜上露出以暴露所述第一栅电极的一部分，通过在所述绝缘膜的通孔中外延生长横向并外延生长所述透明基板上的半导体单晶硅薄膜，形成具有沟道的晶体管元件 形成在所述半导体单晶硅薄膜中的区域，以及在所述沟道区域上形成第二栅电极并与所述沟道区域电绝缘。