公开(公告)号：US5535699A

公开(公告)日：1996-07-16

申请号：US418886

申请日：1995-04-07

Applicant: Zempei Kawazu ,  Akihiro Takami

Inventor： Zempei Kawazu ,  Akihiro Takami

IPC: C30B19/04 ,  C30B29/46 ,  C30B33/02 ,  G01J1/02 ,  H01L21/368 ,  H01L31/0264 ,  H01L31/0296 ,  H01L31/10 ,  H01L31/103 ,  H01L31/18 ,  C30B25/04

CPC classification number: H01L31/1832 ,  C30B19/04 ,  C30B29/48 ,  H01L21/02411 ,  H01L21/02562 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02625 ,  H01L21/02628 ,  H01L31/02963 ,  H01L31/1032 ,  H01L21/02557

Abstract: A method for producing a photo-voltaic infrared detector including growing a crystalline CdHgTe layer on a CdTe substrate by liquid phase epitaxy using a growth melt including tellurium as a solvent to which indium is added as a dopant impurity in a concentration of from 0.01 to 0.1 ppm; annealing the CdHgTe layer to produce a p-type CdHgTe layer including indium as an n-type background dopant impurity; forming an n-type region of a desired depth as a light receiving region at the surface of the p-type CdHgTe layer by implanting a dopant impurity producing n-type conductivity and annealing; and forming an n-side electrode on the n-type region and a p-side electrode a prescribed distance from the n-type region on the p-type CdHgTe layer.

Abstract translation: 一种光电红外检测器的制造方法，包括：使用包含碲作为掺杂铟作为掺杂剂的溶剂的生长熔液，通过液相外延在CdTe基板上生长结晶CdHgTe层，其浓度为0.01〜0.1 ppm; 退火CdHgTe层以产生包含铟作为n型背景掺杂剂杂质的p型CdHgTe层; 通过注入产生n型导电性和退火的掺杂剂杂质，在p型CdHgTe层的表面上形成具有所需深度的n型区域作为光接收区域; 在n型区域上形成n侧电极，在p型CdHgTe层上形成与n型区域规定距离的p侧电极。

公开(公告)号：US08012787B2

公开(公告)日：2011-09-06

申请号：US12989098

申请日：2008-04-30

Applicant: Masato Yonezawa ,  Kimikazu Hazumi ,  Akihiro Takami ,  Hiroaki Morikawa ,  Kunihiko Nishimura

Inventor： Masato Yonezawa ,  Kimikazu Hazumi ,  Akihiro Takami ,  Hiroaki Morikawa ,  Kunihiko Nishimura

IPC: H01L21/00

CPC classification number: H01L31/022425 ,  H01L31/0236 ,  H01L31/02363 ,  H01L31/03529 ,  H01L31/068 ,  Y02E10/547

Abstract: The manufacturing method includes: forming a P-type silicon substrate and a high-concentration N-type diffusion layer, in which an N-type impurity is diffused in a first concentration, on an entire surface at a light-incident surface side; forming an etching resistance film on the high-concentration N-type diffusion layer and forming fine pores at a predetermined position within a recess forming regions on the etching resistance film; forming recesses by etching the silicon substrate around a forming position of the fine pores, so as not to leave the high-concentration N-type diffusion layer within the recess forming region; forming the low-concentration N-type diffusion layer, in which an N-type impurity is diffused in a second concentration that is lower than the first concentration, on a surface on which the recesses are formed; and forming a grid electrode in an electrode forming region at a light-incident surface side of the silicon substrate.

Abstract translation: 该制造方法包括：在光入射表面侧的整个表面上形成P型硅衬底和其中N型杂质以第一浓度扩散的高浓度N型扩散层; 在高浓度N型扩散层上形成耐腐蚀性膜，在蚀刻电阻膜的凹部形成区域内的规定位置形成细孔; 通过在所述细孔的形成位置周围蚀刻所述硅基板而形成凹部，以便不将所述高浓度N型扩散层留在所述凹部形成区域内; 在其上形成凹部的表面上形成其中N型杂质以低于第一浓度的第二浓度扩散的低浓度N型扩散层; 以及在所述硅衬底的光入射表面侧的电极形成区域中形成栅电极。

公开(公告)号：US07564511B2

公开(公告)日：2009-07-21

申请号：US10968961

申请日：2004-10-21

Applicant: Hiroshi Tabatake ,  Tetsuya Kawamura ,  Shinichi Kawamura ,  Katsuhiko Inada ,  Atsushi Takeda ,  Nobuo Imai ,  Akihiro Takami

Inventor： Hiroshi Tabatake ,  Tetsuya Kawamura ,  Shinichi Kawamura ,  Katsuhiko Inada ,  Atsushi Takeda ,  Nobuo Imai ,  Akihiro Takami

IPC: G02F1/1333

CPC classification number: G02F1/136204 ,  H01L27/12 ,  H01L27/124

Abstract: A circuit array substrate includes an optically transparent substrate, pixels having switching elements formed on the transparent substrate, gate electrode lines connected to the switching elements, the gate electrode lines being provided on a first insulation film with separating portions in the pixels, signal lines connected to the switching elements, the signal lines being provided on a second insulation film which is different from the first insulation film, and electrically conductive portions provided on the second film to electrically connect the electrode lines with the separating portions to each other. The separating portions reduce electrostatic capacitances defined between the gate electrode lines and the switching elements when the conductive portions are not connected between the separating portions.

Abstract translation: 电路阵列基板包括光学透明基板，具有形成在透明基板上的开关元件的像素，连接到开关元件的栅电极线，栅极电极线设置在具有像素中的分离部分的第一绝缘膜上，连接信号线 所述开关元件设置在与所述第一绝缘膜不同的第二绝缘膜上的所述信号线以及设置在所述第二膜上的导电部，以使所述电极线与所述分离部彼此电连接。 当导电部分未连接在分离部分之间时，分离部分减小限定在栅电极线和开关元件之间的静电电容。

公开(公告)号：US20060267015A1

公开(公告)日：2006-11-30

申请号：US11411119

申请日：2006-04-26

Applicant: Hiroshi Omi ,  Mamoru Furuta ,  Shoso Nambu ,  Takayoshi Dohi ,  Akihiro Takami ,  Shuji Manda ,  Hajime Inoue

Inventor： Hiroshi Omi ,  Mamoru Furuta ,  Shoso Nambu ,  Takayoshi Dohi ,  Akihiro Takami ,  Shuji Manda ,  Hajime Inoue

IPC: H01L29/04

CPC classification number: H01L29/4908 ,  H01L27/124 ,  H01L29/42384 ,  H01L29/66757 ,  H01L29/78675

Abstract: A gate electrode of a thin film transistor is composed by a three layer structure obtained by laminating a titanium nitride layer as an upper layer on an aluminum layer as a base layer and by laminating an unalloyed titanium layer as a lower layer under the base layer. An ion implantation is used as an ion doping into a source region and drain region as an active layer of the thin film transistor. The source region and the drain region are annealed at a low temperature of 350° C. to 450° C. to be activated. A chemical reaction between the base layer and the upper layer and between the base layer and the lower layer can be suppressed. The rise of the resistance value in the gate electrode can be suppressed. The resistance of the gate electrode can be reduced. The fluctuation of the threshold voltage of the thin film transistor can be suppressed.

Abstract translation: 薄膜晶体管的栅极由通过在作为基底层的铝层上层叠氮化钛层作为上层而获得的三层结构，并且在基底层下层叠作为下层的非合金化钛层而构成。 使用离子注入作为源极区和漏极区中的离子掺杂作为薄膜晶体管的有源层。 源极区域和漏极区域在350℃至450℃的低温下退火以被激活。 可以抑制基层与上层之间以及基层与下层之间的化学反应。 可以抑制栅电极中的电阻值的上升。 可以减小栅电极的电阻。 可以抑制薄膜晶体管的阈值电压的波动。

公开(公告)号：US20060196534A1

公开(公告)日：2006-09-07

申请号：US10552511

申请日：2004-03-12

Applicant: Takeshi Takada ,  Akihiro Takami

Inventor： Takeshi Takada ,  Akihiro Takami

IPC: H02N6/00

CPC classification number: H01R9/2425 ,  H02S40/34 ,  Y10S248/906

Abstract: A terminal box of an output part of a solar cell module, including a case and an outer lid that are molded with a thermoplastic resin and an removal cable cover that is of a knockout type and is arranged in the case includes an inner lid that covers to close an electric circuit that is housed in the case.

Abstract translation: 太阳能电池模块的输出部分的接线盒，包括用热塑性树脂模制的壳体和外盖以及具有脱模型并布置在壳体中的拆卸电缆盖包括盖子 关闭容纳在壳体中的电路。

公开(公告)号：US4060661A

公开(公告)日：1977-11-29

申请号：US711639

申请日：1976-08-04

Applicant: Akihiro Takami ,  Takayuki Kuroda ,  Katsuo Nagano ,  Michio Matsuoka

Inventor： Akihiro Takami ,  Takayuki Kuroda ,  Katsuo Nagano ,  Michio Matsuoka

IPC: H01C7/112 ,  H01C17/065 ,  H01C17/28 ,  H01B1/02 ,  H01B1/08

CPC classification number: H01C7/112 ,  H01C17/06546 ,  H01C17/285

Abstract: There is provided a voltage-dependent resistor comprising a bulk consisting essentially of zinc oxide as the major part and as additives 0.01 to 10 mol % of Bi.sub.2 O.sub.3, CoO, MnO, TiO and NiO and electrodes on the bulk, said electrodes having been formed by baking a silver paste comprising silver powder and a glass frit on the bulk, said glass frit containing as its principal content 80 to 95% by weight of Bi.sub.2 O.sub.3 and correspondingly 20 to 5% by weight of SiO.sub.2, said glass frit also containing 1 to 5 parts by weight of B.sub.2 O.sub.3 for 100 parts of said principal content. The electrodes can also contain minor amounts of CoO, Sb.sub.2 O.sub.3, a mixture of Sb.sub.2 O.sub.3 with Ag.sub.2 O or MgO, or a mixture of CoO with MgO or Ag.sub.2 O.

Abstract translation: 提供了一种电压依赖性电阻器，其包含主要由氧化锌作为主要部分的本体，并且作为添加剂，添加剂为Bi2O3，CoO，MnO，TiO和NiO的0.01〜10mol％，本体上为电极，所述电极由 在其上烘烤包含银粉和玻璃料的银糊，所述玻璃料的主要含量为80至95重量％的Bi 2 O 3和相应的20至5重量％的SiO 2，所述玻璃料还含有1至5个 B2O3重量份为100份所述主要成分。 电极也可以含有少量的CoO，Sb2O3，Sb2O3与Ag2O或M​​gO的混合物，或CoO与MgO或Ag2O的混合物。

公开(公告)号：US07432439B2

公开(公告)日：2008-10-07

申请号：US10552511

申请日：2004-03-12

Applicant: Takeshi Takada ,  Akihiro Takami

Inventor： Takeshi Takada ,  Akihiro Takami

IPC: H02G3/08

CPC classification number: H01R9/2425 ,  H02S40/34 ,  Y10S248/906

Abstract: A terminal box of an output part of a solar cell module, including a case and an outer lid that are molded with a thermoplastic resin and an removal cable cover that is of a knockout type and is arranged in the case includes an inner lid that covers to close an electric circuit that is housed in the case.

Abstract translation: 太阳能电池模块的输出部分的接线盒，包括用热塑性树脂模制的壳体和外盖以及具有脱模型并布置在壳体中的拆卸电缆盖包括盖子 关闭容纳在壳体中的电路。

公开(公告)号：US5725006A

公开(公告)日：1998-03-10

申请号：US563420

申请日：1995-11-28

Applicant: Yoshitatsu Kawama ,  Takashi Ishihara ,  Satoshi Arimoto ,  Hiroaki Morikawa ,  Akihiro Takami ,  Yoshinori Matsuno ,  Hideo Naomoto ,  Yoichiro Nishimoto

Inventor： Yoshitatsu Kawama ,  Takashi Ishihara ,  Satoshi Arimoto ,  Hiroaki Morikawa ,  Akihiro Takami ,  Yoshinori Matsuno ,  Hideo Naomoto ,  Yoichiro Nishimoto

IPC: E04D13/18 ,  G09F7/00 ,  H01L31/0236 ,  H01L31/0352 ,  H01L31/04 ,  H01L31/042 ,  H01L31/048 ,  H01L31/052

CPC classification number: H01L31/03529 ,  H01L31/0236 ,  H01L31/048 ,  Y02E10/50

Abstract: A solar battery cell, solar battery module, and solar battery module group achieving high product value by enabling the display of surface patterns without reducing the power generating efficiency of the solar battery cells are provided. The direction and/or reflectance of reflected light incident to the surface of the solar battery cell are varied by controlling the distribution of the rough surface structure imparted to the solar battery cell surface. The direction or reflectance of reflected light incident to the surface of the solar battery cell is changed in part depending upon the part of the semiconductor solar battery cell surface to which the light is incident. Semiconductor solar battery cells with high product value can therefore be achieved because patterns with strong visual impact can be displayed and easily recognized without reducing the power generation efficiency of the solar battery cell.

Abstract translation: 提供了一种能够在不降低太阳能电池单元的发电效率的情况下实现表面图案的显示而实现高产品价值的太阳能电池单元，太阳能电池模块和太阳能电池模块组。 通过控制赋予太阳能电池单元表面的粗糙表面结构的分布来改变入射到太阳能电池单元的表面的反射光的方向和/或反射率。 入射到太阳能电池单元的表面的反射光的方向或反射率部分地取决于光入射的半导体太阳能电池单元表面的部分。 因此，可以在不降低太阳能电池单元的发电效率的情况下显示并容易地识别具有强烈的视觉冲击的图案，从而实现具有高产品值的半导体太阳能电池单元。

公开(公告)号：US5547907A

公开(公告)日：1996-08-20

申请号：US388086

申请日：1995-02-14

Applicant: Masaaki Katsumata ,  Osamu Kanaya ,  Nobuharu Katsuki ,  Akihiro Takami

Inventor： Masaaki Katsumata ,  Osamu Kanaya ,  Nobuharu Katsuki ,  Akihiro Takami

IPC: H01C7/102 ,  H01C7/112 ,  C03C3/074

CPC classification number: H01C7/102 ,  H01C7/112

Abstract: The present invention relates to a zinc oxide varistor as a characteristic element of an arrestor for protecting a transmission and distribution line and peripheral devices thereof from surge voltage created by lightning, and more particularly a highly reliable zinc oxide varistor excellent in the non-linearity with respect to voltage, the discharge withstand current rating properties, and the life characteristics under voltage, a method of preparing the same, and PbO type crystallized glass for coating oxide ceramics employed for a zinc oxide varistor, etc. A zinc oxide varistor of the present invention comprises a sintered body (1) and a high resistive side layer (3) consisting of crystallized glass with high crystallinity containing the prescribed amount of SiO.sub.2, MoO.sub.3, WO.sub.3, TiO.sub.2, NiO, etc., formed on the sides of the sintered body (1) to enhance the strength and the insulating property thereof, thereby improving the non-linearity with respect to voltage, the discharge withstand current rating properties and the life characteristics under voltage. The crystallized glass composition for coating of the present invention comprises PbO as a main component and additives such as ZnO, B.sub.2 O.sub.3, SiO.sub.2, MoO.sub.3, WO.sub.3, TiO.sub.2, and NiO to enhance the crystallinity and the insulating property thereof.

Abstract translation: 本发明涉及作为用于保护输配电线路及其外围装置的避雷器的特征元件的氧化锌压敏电抗器由闪电产生的浪涌电压，更具体地说，涉及一种非常可靠的非线性优异的氧化锌压敏电阻， 相对于电压，放电耐受额定电流特性，电压下的寿命特性，制备方法以及用于氧化锌变阻器等的氧化物陶瓷的PbO型结晶玻璃等。本发明的氧化锌变阻器 本发明包括烧结体（1）和高电阻侧层（3），所述高电阻侧层（3）由在所述烧结体的侧面上形成的含有规定量的SiO 2，MoO 3，WO 3，TiO 2，NiO等的具有高结晶度的结晶玻璃构成 （1）提高强度和绝缘性，从而提高相对于电压的非线性，放电耐受曲线 额定特性和电压下的寿命特性。 本发明的涂布用结晶化玻璃组合物包含PbO作为主要成分，添加ZnO，B2O3，SiO2，MoO3，WO3，TiO2，NiO等添加剂，以提高其结晶性和绝缘性。

公开(公告)号：US5447892A

公开(公告)日：1995-09-05

申请号：US147182

申请日：1993-11-01

Applicant: Masaaki Katsumata ,  Osamu Kanaya ,  Nobuharu Katsuki ,  Akihiro Takami

Inventor： Masaaki Katsumata ,  Osamu Kanaya ,  Nobuharu Katsuki ,  Akihiro Takami

IPC: H01C7/102 ,  H01C7/112 ,  C03C3/074

CPC classification number: H01C7/102 ,  H01C7/112

Abstract: The present invention relates to a zinc oxide varistor as a characteristic element of an arrestor for protecting a transmission and distribution line and peripheral devices thereof from surge voltage created by lightning, and more particularly a highly reliable zinc oxide varistor excellent in the non-linearity with respect to voltage, the discharge withstand current rating properties, and the life characteristics under voltage, a method of preparing the same, and PbO type crystallized glass for coating oxide ceramics employed for a zinc oxide varistor, etc. A zinc oxide varistor of the present invention comprises a sintered body (1) and a high resistive side layer (3) consisting of crystallized glass with high crystallinity containing the prescribed amount of SiO.sub.2, MoO.sub.3, WO.sub.3, TiO.sub.2, NiO, etc., formed on the sides of the sintered body (1) to enhance the strength and the insulating property thereof, thereby improving the non-linearity with respect to voltage, the discharge withstand current rating properties and the life characteristics under voltage. The crystallized glass composition for coating of the present invention comprises PbO as a main component and additives such as ZnO, B.sub.2 O.sub.3 , SiO.sub.2, MoO.sub.3, WO.sub.3, TiO.sub.2, and NiO to enhance the crystallinity and the insulating property thereof.

Abstract translation: 本发明涉及作为用于保护输配电线路及其外围装置的避雷器的特征元件的氧化锌压敏电抗器由闪电产生的浪涌电压，更具体地说，涉及一种非常可靠的非线性优异的氧化锌压敏电阻， 相对于电压，放电耐受额定电流特性，电压下的寿命特性，制备方法以及用于氧化锌变阻器等的氧化物陶瓷的PbO型结晶玻璃等。本发明的氧化锌变阻器 本发明包括烧结体（1）和高电阻侧层（3），所述高电阻侧层（3）由在所述烧结体的侧面上形成的含有规定量的SiO 2，MoO 3，WO 3，TiO 2，NiO等的具有高结晶度的结晶玻璃构成 （1）提高强度和绝缘性，从而提高相对于电压的非线性，放电耐受曲线 额定特性和电压下的寿命特性。 本发明的涂布用结晶化玻璃组合物包含PbO作为主要成分，添加ZnO，B2O3，SiO2，MoO3，WO3，TiO2，NiO等添加剂，以提高其结晶性和绝缘性。