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    Sintered Silicon Wafer
    2.
    发明申请
    Sintered Silicon Wafer 审中-公开
    烧结硅片

    公开(公告)号：US20100187661A1

    公开(公告)日：2010-07-29

    申请号：US12668307

    申请日：2008-07-04

    申请人： Ryo Suzuki ,  Hiroshi Takamura

    发明人： Ryo Suzuki ,  Hiroshi Takamura

    IPC分类号： H01L29/04

    CPC分类号： C30B29/06 ,  C30B28/00 ,  H01L29/045

    摘要： Provided is a sintered silicon wafer, wherein the ratio [I(220)/I(111) . . . (1)] of intensity of a (220) plane and intensity of a (111) plane measured by X-ray diffraction is 0.5 or more and 0.8 or less, and the ratio [I(311)/I(111) . . . (2)] of intensity of a (311) plane and intensity of a (111) plane is 0.3 or more and 0.5 or less. The provided sintered silicon wafer has a smooth surface in which its surface roughness is equivalent to a single crystal silicon.

    摘要翻译： 提供了一种烧结硅晶片，其中[I（220）/ I（111）]的比率。 。 。 （220）面的强度的（1）]和通过X射线衍射测定的（111）面的强度为0.5以上且0.8以下，[I（311）/ I（111）]比。 。 。 （311）面的强度和（111）面的强度的平均值（2）]为0.3以上且0.5以下。 所提供的烧结硅晶片具有光滑表面，其表面粗糙度等同于单晶硅。

    Hybrid silicon wafer and method for manufacturing same
    3.
    发明授权
    Hybrid silicon wafer and method for manufacturing same 有权
    混合硅晶片及其制造方法

    公开(公告)号：US08236428B2

    公开(公告)日：2012-08-07

    申请号：US13002928

    申请日：2009-06-23

    申请人： Kazuyuki Satoh ,  Yoshimasa Koido

    发明人： Kazuyuki Satoh ,  Yoshimasa Koido

    IPC分类号： G11B11/105 ,  B32B9/04 ,  B32B13/04 ,  B32B37/00 ,  B32B38/04 ,  B29C65/00

    CPC分类号： C30B29/06 ,  C30B23/02 ,  C30B28/00 ,  C30B33/00 ,  C30B33/06 ,  H01L21/187 ,  Y10T156/1052 ,  Y10T428/26 ,  Y10T428/31663

    摘要： Provided is a hybrid silicon wafer comprising a structure in which a single-crystal wafer is embedded in a sintered polysilicon wafer. Also provided is a method for manufacturing a hybrid silicon wafer having a structure in which a single-crystal wafer is embedded in a sintered polysilicon wafer, wherein a part of the sintered polysilicon is hollowed, a single crystal ingot is inserted into the hollowed portion, these are mutually bonded through thermal diffusion bonding based on HIP to prepare a complex of the sintered polysilicon and the single-crystal silicon ingot, and the complex is sliced. Thereby provided are a hybrid silicon wafer comprising functions of both the polysilicon wafer and the single-crystal wafer, and a method for manufacturing such a hybrid silicon wafer.

    摘要翻译： 提供了一种混合硅晶片，其包括将单晶晶片嵌入烧结多晶硅晶片中的结构。 还提供了一种用于制造具有单晶晶片嵌入烧结多晶硅晶片的结构的混合硅晶片的方法，其中一部分烧结多晶硅被中空化，单晶锭插入到中空部分中， 这些通过基于HIP的热扩散接合相互结合以制备烧结多晶硅和单晶硅锭的复合物，并将复合物切片。 由此提供了包括多晶硅晶片和单晶晶片的功能的混合硅晶片，以及用于制造这种混合硅晶片的方法。

    Hybrid Silicon Wafer and Method for Manufacturing Same
    4.
    发明申请
    Hybrid Silicon Wafer and Method for Manufacturing Same 有权
    混合硅晶片及其制造方法相同

    公开(公告)号：US20110123795A1

    公开(公告)日：2011-05-26

    申请号：US13002928

    申请日：2009-06-23

    申请人： Kazuyuki Satoh ,  Yoshimasa Koido

    发明人： Kazuyuki Satoh ,  Yoshimasa Koido

    IPC分类号： B32B17/00 ,  B32B37/00

    CPC分类号： C30B29/06 ,  C30B23/02 ,  C30B28/00 ,  C30B33/00 ,  C30B33/06 ,  H01L21/187 ,  Y10T156/1052 ,  Y10T428/26 ,  Y10T428/31663

    摘要： Provided is a hybrid silicon wafer comprising a structure in which a single-crystal wafer is embedded in a sintered polysilicon wafer. Also provided is a method for manufacturing a hybrid silicon wafer having a structure in which a single-crystal wafer is embedded in a sintered polysilicon wafer, wherein a part of the sintered polysilicon is hollowed, a single crystal ingot is inserted into the hollowed portion, these are mutually bonded through thermal diffusion bonding based on HIP to prepare a complex of the sintered polysilicon and the single-crystal silicon ingot, and the complex is sliced. Thereby provided are a hybrid silicon wafer comprising functions of both the polysilicon wafer and the single-crystal wafer, and a method for manufacturing such a hybrid silicon wafer.

    摘要翻译： 提供了一种混合硅晶片，其包括将单晶晶片嵌入烧结多晶硅晶片中的结构。 还提供了一种用于制造具有单晶晶片嵌入烧结多晶硅晶片的结构的混合硅晶片的方法，其中一部分烧结多晶硅被中空化，单晶锭插入到中空部分中， 这些通过基于HIP的热扩散接合相互结合以制备烧结多晶硅和单晶硅锭的复合物，并将复合物切片。 由此提供了包括多晶硅晶片和单晶晶片的功能的混合硅晶片，以及用于制造这种混合硅晶片的方法。

    SILICON MATERIAL SURFACE ETCHING FOR LARGE GRAIN POLYSILICON THIN FILM DEPOSITION AND STRUCTURE
    9.
    发明申请
    SILICON MATERIAL SURFACE ETCHING FOR LARGE GRAIN POLYSILICON THIN FILM DEPOSITION AND STRUCTURE 审中-公开
    用于大颗粒多晶硅薄膜沉积和结构的硅材料表面蚀刻

    公开(公告)号：US20100129996A1

    公开(公告)日：2010-05-27

    申请号：US12431735

    申请日：2009-04-28

    申请人： JIAN ZHONG YUAN

    发明人： JIAN ZHONG YUAN

    IPC分类号： H01L21/306 ,  H01L21/203 ,  C30B19/00 ,  H01L21/205

    CPC分类号： H01L21/02381 ,  C23C16/0227 ,  C23C16/24 ,  C30B28/00 ,  C30B29/06 ,  H01L21/02008 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/02658 ,  H01L31/182 ,  Y02E10/546 ,  Y02P70/521

    摘要： A method of surface treatment for silicon material. The method includes providing a first silicon material having a surface region. The first silicon material has a first purity characteristics and a first surface roughness characteristics. A chemical polishing process is perform to the surface region to cause the surface region to have a second roughness characteristics. Thereafter, a chemical leaching process is performed to the surface region to cause the first silicon material in a depth within a vicinity of the surface region to have a second purity characteristics. A polysilicon material characterized by a grain size greater than about 0.1 mm is formed using a deposition process overlying the surface region.

    摘要翻译： 一种硅材料表面处理方法。 该方法包括提供具有表面区域的第一硅材料。 第一硅材料具有第一纯度特性和第一表面粗糙度特性。 对表面区域进行化学抛光工艺以使表面区域具有第二粗糙度特性。 此后，对表面区域进行化学浸出处理，使第一硅材料在表面区域附近的深度具有第二纯度特性。 使用覆盖表面区域的沉积工艺形成特征在于大于约0.1mm的晶粒尺寸的多晶硅材料。

    POLYCRYSTALLINE DIAMOND COMPACT
    10.
    发明申请
    POLYCRYSTALLINE DIAMOND COMPACT 审中-公开

    公开(公告)号：US20190210931A1

    公开(公告)日：2019-07-11

    申请号：US16352830

    申请日：2019-03-14

    申请人： SF DIAMOND CO., LTD.

    发明人： Caili WANG ,  Dongpeng ZHAO ,  Saifei YANG ,  Haijiang FANG

    IPC分类号： C04B37/02 ,  C22C26/00 ,  E21B10/567

    CPC分类号： C04B37/028 ,  C04B2237/363 ,  C04B2237/401 ,  C04B2237/68 ,  C22C26/00 ,  C30B28/00 ,  E21B10/46 ,  E21B10/567

    摘要： A polycrystalline diamond compact including a cemented carbide substrate and a polycrystalline diamond layer bonded to the cemented carbide substrate. The cemented carbide substrate is cylindrical and includes a circumferential wall. The polycrystalline diamond layer includes a central part including between 8 and 15 wt. % of cobalt and an outer part including between 0.5 and 2 wt. % of cobalt. The outer part is a columnar ring belt and includes a chamfer. The outer part includes an upper surface, a side surface connected to the circumferential wall of the cemented carbide substrate, and a chamfer surface connecting the upper surface and the side surface. The chamfer includes a first terminal connected to the upper surface of the outer part and a second terminal connected to the side surface of the outer part.