Abstract:
Ein Substrat (1) für einen portablen Datenträger (10) umfasst eine elektrische Komponente (2, 3), wie eine Antenne, die zwei auf einander gegenüberliegenden Oberflächen des Substrats (1) aufgebrachte Teile aufweist. Die Teile der elektrischen Komponente (2, 3) umfassen ein elektrisch leitfähiges Material und sind in Durchkontaktierungsbereichen (4, 5, 6, 7) des Substrats (1) durch Durchbrechungen (8, 13) des Substrats (1) hindurch elektrisch leitend miteinander verbunden. Die Durchbrechungen (8, 13) werden mittels Laser hergestellt und weisen eine maximale Weite von maximal 20 μιη auf. Vorzugsweise weist ein Durchkontaktierungsbereich (4, 5, 6, 7) eine Vielzahl von Durchbrechungen (8, 13) auf, die über den Durchkontaktierungsbereich (4, 5, 6, 7) verteilt sind.
Abstract:
An electronic device comprises a housing (2) having an outer face (11) and an inner face (12). A key is provided on the housing (2), which comprises a micro hole (21, 22) formed in the housing (2) and a conductive material (23, 24) extending within the micro hole (21, 22) to the outer face (11) of the housing (2). A sensor (6) is coupled to the conductive material (23, 24) to detect whether an object is brought into contact or out of contact with the micro hole (21, 22) at the outer face (11).
Abstract:
The invention refers to a filter unit (1) and a corresponding printed circuit board (2). The filter unit (1) and the printed circuit board (2) have been equipped with modified end portions (7, 8, 22, 23) being matched such that a number of filter units (1) can be used on the printed circuit board (2) without changing the printed circuit board (2).
Abstract:
A hybrid electromagnetic bandgap (EBG) structure for broadband suppression of noise on printed wiring boards includes an array of coplanar patches interconnected into a grid by series inductances, and a corresponding array of shunt LC networks connecting the coplanar patches to a second conductive plane. This combination of series inductances and shunt resonant vias lowers the cutoff frequency for the fundamental stopband. The series inductances and shunt capacitances may be implemented using surface mount component technology, or printed traces. Patches may also be interconnected by coplanar coupled transmission lines. The even and odd mode impedances of the coupled lines may be increased by forming slots in the second conductive plane disposed opposite to the transmission line, lowering the cutoff frequency and increasing the bandwidth of the fundamental stopband. Coplanar EBG structures may be integrated into power distribution networks of printed wiring boards for broadband suppression of electromagnetic noise.
Abstract:
A film type conductive sheet (10) made of synthetic resin having horizontal and vertical directional conductivities, capable of preventing burrs causing electric short-circuits, and having a narrow thickness while maintaining the horizontal and vertical directional conductivities is disclosed. The film type conductive sheet (10) includes a synthetic resin master film (11) having a plurality of penetrating holes (12), and metals (13, 13') or metal pastes coated to the upper and lower sides of the synthetic resin master film (11) such that the metals (13, 13') are connected to each other through the penetrating holes (12), enabling vertical conduction and horizontal conduction thereof. Since burrs are not generated when cutting and using the film type conductive sheet (10), and applying the same to equipment so that electronic equipment malfunction due to interference between circuits is prevented. Since a very thin film type conductive sheet (10) can be made, the film type conductive sheet (10) is applicable to wide range of applications.
Abstract:
Provided are connection structures for a microelectronic device and methods for forming the structure. A substrate (10) is included having opposing surfaces and a plurality of holes (12A-D) extending through the surfaces. Also included is a plurality of electrically conductive posts (18A-D). Each post extends from a base to a tip located within a corresponding hole of the substrate. An additional substrate (20) may be provided such that the base of each post is located on a surface thereof. Additional electrically conductive posts (28A-D) may be provided having tips in corresponding holes (22A-D) of the additional substrate. Optionally, a dielectric material may be placed between the substrate and the posts.
Abstract:
A process for fabricating a multi-layer circuit assembly is provided. The process generally comprises:(a) providing a perforate electrically conductive core having a via density of 500 to 10,000 holes/square inch (75 to 1550 holes/square centimeter);(b) applying a dielectric coating onto all exposed surfaces of the electrically conductive core to form a conformal coating on all exposed surfaces of the electrically conductive core;(c) ablating the surface of the dielectric coating in a predetermined pattern to expose sections of the electrically conductive core;(d) applying a layer of metal to all surfaces to form metallized vias through the electrically conductive core; and(e) applying a resinous photosensitive layer to the metal layer.The multi-layer circuit assemblies produced by the process, having high via density and thermal coefficients of expansion, are also provided.
Abstract:
A process for fabricating a multi-layer circuit assembly is provided. The process generally comprises:(a) providing a perforate electrically conductive core having a via density of 500 to 10,000 holes/square inch (75 to 1550 holes/square centimeter);(b) applying a dielectric coating onto all exposed surfaces of the electrically conductive core to form a conformal coating on all exposed surfaces of the electrically conductive core;(c) ablating the surface of the dielectric coating in a predetermined pattern to expose sections of the electrically conductive core;(d) applying a layer of metal to all surfaces to form metallized vias through the electrically conductive core; and(e) applying a resinous photosensitive layer to the metal layer.The multi-layer circuit assemblies produced by the process, having high via density and thermal coefficients of expansion, are also provided.