公开(公告)号：EP4409633A1

公开(公告)日：2024-08-07

申请号：EP22786863.5

申请日：2022-08-29

申请人： QUALCOMM INCORPORATED

发明人： CHOI, Seongryul ,  KANG, Kuiwon ,  BUOT, Joan Rey Villarba

IPC分类号： H01L23/498 ,  H01L21/48

CPC分类号： H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L21/4846 ,  H01L2224/1622720130101 ,  H01L2924/153320130101 ,  H01L2924/1533120130101

公开(公告)号：EP4297077A3

公开(公告)日：2024-05-01

申请号：EP23179675.6

申请日：2023-06-16

申请人： MediaTek Inc.

发明人： YU, Ta-Jen ,  TSAI, Wen-Chin ,  SONG, Isabella ,  KUO, Che-Hung ,  LIU, Hsing-Chih ,  CHEN, Tai-Yu ,  LIN, Shih-Chin ,  HSU, Wen-Sung

IPC分类号： H01L23/16 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L25/03 ,  H01L23/538 ,  H01L25/10 ,  H01L23/485 ,  H01L23/488 ,  H01L23/49 ,  H01L23/48 ,  H01L21/60 ,  H01L23/498

CPC分类号： H01L25/105 ,  H01L2224/4822720130101 ,  H01L25/18 ,  H01L2224/1622720130101 ,  H01L2224/3222520130101 ,  H01L2224/7320420130101 ,  H01L2924/1533120130101 ,  H01L2924/1531120130101 ,  H01L25/0655 ,  H01L2225/102320130101 ,  H01L2225/104120130101 ,  H01L2225/105820130101 ,  H01L2924/143120130101 ,  H01L2924/143420130101 ,  H01L2224/9212520130101 ,  H01L2924/1816220130101 ,  H01L23/16 ,  H01L2924/351120130101 ,  H01L23/562 ,  H01L23/49833 ,  H01L24/16 ,  H01L24/48 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L25/03 ,  H01L23/5389 ,  H01L23/49816

摘要： A semiconductor package (2) includes a bottom substrate (100) and a top substrate (300) space apart from the bottom substrate (100) such that the bottom substrate (100) and the top substrate (300) define a gap therebetween. A logic die (50) and a memory die (70) are mounted on a top surface (100a) of the bottom substrate (100) in a side-by-side fashion. The logic die (50) may have a thickness not less than 125 micrometers. A connection structure (90) is disposed between the bottom substrate (100) and the top substrate (300) around the logic die (50) and the memory die (70) to electrically connect the bottom substrate (100) with the top substrate (300). A sealing resin (SM) fills in the gap between the bottom substrate (100) and the top substrate (300) and sealing the logic die (50), the memory die (70), and the connection structure (90) in the gap.

公开(公告)号：EP3127151B1

公开(公告)日：2024-05-01

申请号：EP15773393.2

申请日：2015-03-30

IPC分类号： H01L23/34 ,  H01L23/48 ,  H01L25/00 ,  H01L25/18 ,  H01L25/065 ,  H01L23/00 ,  H01L23/552 ,  H01L23/498 ,  H01L23/367 ,  H01L23/522

CPC分类号： H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/1302520130101 ,  H01L2224/13120130101 ,  H01L2224/1311120130101 ,  H01L2224/1312420130101 ,  H01L2224/1314720130101 ,  H01L2224/1315520130101 ,  H01L2224/13320130101 ,  H01L2224/1614620130101 ,  H01L2224/1622720130101 ,  H01L2224/1718120130101 ,  H01L2224/3214520130101 ,  H01L2224/3222520130101 ,  H01L2224/7320420130101 ,  H01L2224/7325320130101 ,  H01L2224/9212520130101 ,  H01L2225/0651720130101 ,  H01L2225/0658920130101 ,  H01L2924/1025320130101 ,  H01L2924/103320130101 ,  H01L2924/1420130101 ,  H01L2924/143620130101 ,  H01L2924/143720130101 ,  H01L2924/143820130101 ,  H01L2924/1515620130101 ,  H01L2924/1519220130101 ,  H01L2924/1531120130101 ,  H01L2924/1532120130101 ,  H01L2924/1615220130101 ,  H01L2924/1625120130101 ,  H01L2924/1904120130101 ,  H01L2924/1904220130101 ,  H01L2924/1904320130101 ,  H01L2924/1910520130101 ,  H01L2224/132920130101 ,  H01L2225/0651320130101 ,  H01L2225/0654120130101 ,  H01L2225/0656520130101 ,  H01L2225/0656820130101 ,  H01L23/3675 ,  H01L23/3677 ,  H01L23/49811 ,  H01L23/49833 ,  H01L25/18 ,  H01L24/17 ,  H01L25/50 ,  H01L2924/143120130101 ,  H01L2924/143420130101 ,  H01L2924/1533120130101

公开(公告)号：EP4421869A1

公开(公告)日：2024-08-28

申请号：EP23158836.9

申请日：2023-02-27

申请人： Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.

发明人： LANDESBERGER,Christof

IPC分类号： H01L25/10 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065

CPC分类号： H01L25/105 ,  H01L2924/1533120130101 ,  H01L2924/1519220130101 ,  H01L2225/102320130101 ,  H01L2225/10720130101 ,  H01L2225/104120130101 ,  H01L23/5387 ,  H01L25/0655 ,  H01L25/0652 ,  H01L2224/1622720130101 ,  H01L2224/13120130101 ,  H01L24/13 ,  H01L24/32 ,  H01L2224/3222520130101 ,  H01L24/16 ,  H01L2225/109420130101 ,  H01L2924/351120130101

摘要： Das hierin offenbarte erfindungsgemäße Konzept betrifft ein dreidimensional-integriertes Multi-IC System (100) mit einem Substratstapel (110), der mehrere vertikal übereinander gestapelte Substrate (111, 112, 113) aufweist, wobei jedes Substrat (111, 112, 113) jeweils eine Substratebene definiert. Auf den einzelnen Substraten (111, 112, 113) sind aktive IC-Bausteine (120) angeordnet, die in der jeweiligen Substratebene elektrisch untereinander verbunden sind. Erfindungsgemäß werden passive Interconnect-Bausteine (130) vorgeschlagen, die zwischen zwei benachbarten Substraten (111, 112, 113) angeordnet werden, wobei die Interconnect-Bausteine (130) jeweils vertikal verlaufende Signalleitungsstrukturen (131) aufweisen, die ausgestaltet sind, um eine elektrische Verbindung zwischen je zwei benachbarten Substraten (111, 112, 113) herzustellen.

公开(公告)号：EP3614427B1

公开(公告)日：2024-06-19

申请号：EP19192261.6

申请日：2019-08-19

IPC分类号： H01L23/66 ,  H01L23/552 ,  H01L23/538 ,  H01L25/18 ,  H01L25/10

CPC分类号： H01L23/66 ,  H01L25/18 ,  H01L23/5385 ,  H01L23/5389 ,  H01L23/49816 ,  H01L23/552 ,  H01L23/5384 ,  H01L25/105 ,  H01L2225/105820130101 ,  H01L2225/102320130101 ,  H01L2225/10720130101 ,  H01L2224/0410520130101 ,  H01L2225/103520130101 ,  H01L2924/18120130101 ,  H01L2924/1531120130101 ,  H01L24/19 ,  H01L24/20 ,  H01L2924/143620130101 ,  H01L2924/1533120130101 ,  H01L2924/142120130101 ,  H01L2224/1622720130101 ,  H01L2924/302520130101 ,  H01L2224/1210520130101 ,  H01L2225/104120130101

公开(公告)号：EP4437587A1

公开(公告)日：2024-10-02

申请号：EP22822236.0

申请日：2022-10-28

申请人： QUALCOMM INCORPORATED

发明人： PATIL, Aniket ,  LISK, Durodami ,  WE, Hong Bok ,  PAYNTER, Charles David

IPC分类号： H01L23/538 ,  H01L25/10 ,  H05K1/14 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00

CPC分类号： H01L25/105 ,  H01L25/0657 ,  H01L25/18 ,  H01L23/5383 ,  H01L23/5385 ,  H01L23/5387 ,  H01L23/5386 ,  H01L24/16 ,  H05K1/147 ,  H01L2224/1622720130101 ,  H01L2924/1533120130101 ,  H01L2924/1531120130101 ,  H01L2924/1519220130101 ,  H01L2223/667720130101 ,  H01L2225/0651720130101 ,  H01L2225/102320130101 ,  H01L2225/105820130101 ,  H05K1/144 ,  H05K2201/04220130101 ,  H05K2201/1037820130101

公开(公告)号：EP3154083B1

公开(公告)日：2024-08-07

申请号：EP16186286.7

申请日：2016-08-30

IPC分类号： H01L23/498 ,  H01L25/10

CPC分类号： H01L23/49816 ,  H01L23/49833 ,  H01L23/5389 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/040120130101 ,  H01L2224/13120130101 ,  H01L2224/1314720130101 ,  H01L2224/1622720130101 ,  H01L2224/3214520130101 ,  H01L2224/3222520130101 ,  H01L2224/4809120130101 ,  H01L2224/4822720130101 ,  H01L2224/7320420130101 ,  H01L2224/7325320130101 ,  H01L2224/7326520130101 ,  H01L2225/065120130101 ,  H01L2225/103520130101 ,  H01L2924/1531120130101 ,  H01L2924/1533120130101 ,  H01L2225/0656820130101 ,  H01L2924/351120130101 ,  H01L25/105 ,  H01L2225/104120130101 ,  H01L2225/105820130101 ,  H01L2225/109420130101 ,  H01L2924/18120130101 ,  H01L2224/1622520130101 ,  H01L2224/9212520130101

公开(公告)号：EP4293821A3

公开(公告)日：2024-05-22

申请号：EP23208234.7

申请日：2018-05-24

申请人： MediaTek Inc.

发明人： HAN, Fu-Yi ,  CHOU, Che-Ya ,  KUO, Che-Hung ,  WU, Wen-Chou ,  CHEN, Nan-Cheng ,  LIN, Min-Chen ,  LIU, Hsing-Chih

IPC分类号： H01L23/66 ,  H01Q21/06 ,  H01Q1/22

CPC分类号： H01L23/66 ,  H01L2223/661620130101 ,  H01L2223/667720130101 ,  H01L2224/0410520130101 ,  H01L2224/1210520130101 ,  H01L2224/1314420130101 ,  H01L2224/1314720130101 ,  H01L2224/1622720130101 ,  H01L2224/4822720130101 ,  H01L2225/102320130101 ,  H01L2225/103520130101 ,  H01L2225/105820130101 ,  H01L2924/1519220130101 ,  H01L2924/1531120130101 ,  H01L2924/1532120130101 ,  H01L24/20 ,  H01L24/16 ,  H01L2224/1623520130101 ,  H01L2924/1533120130101 ,  H01Q1/2283 ,  H01L23/5389 ,  H01L23/49816 ,  H01L23/5384 ,  H01Q21/06 ,  H01L23/49822 ,  H01L23/49827

摘要： One embodiment of the present disclosure provides a semiconductor package including a bottom chip package (10) having a first side (10a) and a second side (10b) opposing the first side (10a) , and a top antenna package (20) mounted on the first side (10a) of the bottom chip package (10). The bottom chip package (10) further includes a semiconductor chip (30). The semiconductor chip (30) may include a RFIC chip. The top antenna package (20) has at least one radiative antenna element (220).