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公开(公告)号:EP4258336A3
公开(公告)日:2024-08-14
申请号:EP23192886.2
申请日:2019-04-11
申请人: Analog Devices, Inc.
IPC分类号: H01L23/66 , H01L23/367 , H01L23/00 , H01L25/065 , H01L23/04
CPC分类号: H01L23/04 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/92 , H01L2223/662720130101 , H01L2223/668320130101 , H01L2224/0404220130101 , H01L2224/0562420130101 , H01L2224/0564420130101 , H01L2224/1300920130101 , H01L2224/1614520130101 , H01L2224/1622720130101 , H01L2224/1623520130101 , H01L2224/1718120130101 , H01L2224/2617520130101 , H01L2224/2901120130101 , H01L2224/2901420130101 , H01L2224/291920130101 , H01L2224/3222520130101 , H01L2224/3224520130101 , H01L2224/4809120130101 , H01L2224/4822720130101 , H01L2224/7320420130101 , H01L2224/7326520130101 , H01L2224/8338520130101 , H01L2224/859220130101 , H01L2224/9212520130101 , H01L2924/1025320130101 , H01L2924/103220130101 , H01L2924/1032920130101 , H01L2924/103320130101 , H01L2924/142120130101 , H01L2924/1421520130101 , H01L2924/142320130101 , H01L2924/1531120130101 , H01L2924/1531320130101 , H01L2924/1625120130101 , H01L2924/165920130101 , H01L2924/1904120130101 , H01L2924/1904320130101 , H01L2924/1910520130101 , H01L2924/3512120130101 , H01L23/66 , H01L2223/664420130101 , H01L23/3677 , H01L25/0655
摘要: A packaged radio frequency (RF) module is disclosed. The module can include a package substrate, a first die electrically and mechanically attached to the substrate, the first die comprising an RF switch, wherein the first die is flip-chip attached to the package substrate by way of a plurality of interconnects between the first die and the package substrate, a second die electrically and mechanically attached to the substrate, an encapsulating material protecting electrical connections between the first die and the package substrate, and a lid attached to the package substrate such that the package substrate and the lid at least partially define an air cavity within which the first and the second die are mounted, an active surface of the second die being exposed to the air cavity.
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公开(公告)号:EP4420160A1
公开(公告)日:2024-08-28
申请号:EP22817376.1
申请日:2022-11-22
IPC分类号: H01L23/00 , H01L25/065
CPC分类号: H01L2224/1622520130101 , H01L2224/0822520130101 , H01L2224/0823520130101 , H01L24/08 , H01L24/80 , H01L24/95 , H01L2224/9520130101 , H01L2224/13120130101 , H01L24/16 , H01L2224/8089520130101 , H01L2224/8089620130101 , H01L23/562 , H01L25/0655 , H01L2924/1519220130101 , H01L2224/2617520130101 , H01L2224/7320420130101 , H01L2224/9212520130101 , H01L2924/1531320130101 , H01L2924/161520130101 , H01L2924/1625120130101 , H01L2224/7325320130101 , H01L2224/8000620130101 , H01L2224/8100520130101 , H01L2224/8300520130101 , H01L2924/351120130101 , H01L23/16
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公开(公告)号:EP4372801A1
公开(公告)日:2024-05-22
申请号:EP22207914.7
申请日:2022-11-16
发明人: SCHMER, Akexander , STEIN, Markus
IPC分类号: H01L23/053 , H01L23/498 , H01L23/488 , H01L23/49 , H01L23/48 , H01L21/60 , H01L25/07
CPC分类号: H01L2224/3222520130101 , H01L2224/4822720130101 , H01L2224/7326520130101 , H01L2924/1615120130101 , H01L2924/1625120130101 , H01L2224/29120130101 , H01L2224/838420130101 , H01L2224/8385120130101 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/83 , H01L23/053 , H01L25/072 , H01R12/51
摘要: A power semiconductor module arrangement comprises a housing comprising a plurality of through holes, a substrate forming a ground surface of the housing, and a plurality of terminal elements mechanically and electrically connected to the substrate, wherein a first end of each of the plurality of terminal elements is arranged inside the housing and connected to the substrate, each of the plurality of terminal elements extends from the substrate in a vertical direction perpendicular to a top surface of the substrate through one of the plurality of through holes to the outside of the housing such that a second end of each of the plurality of terminal elements is arranged outside of the housing, each of the plurality of terminal elements comprises a holding element arranged between the first end and the second end, and each of the plurality of holding elements exerts a force on the housing, thereby holding the housing in a desired position with regard to the substrate.
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公开(公告)号:EP4401126A3
公开(公告)日:2024-09-25
申请号:EP24171908.7
申请日:2018-01-30
发明人: ROTH, Alexander , HOHLFELD, Olaf
IPC分类号: H01L23/053 , H01L23/24 , H01L21/54
CPC分类号: H01L23/053 , H01L21/54 , H01L23/562 , H01L2224/29120130101 , H01L2224/2913920130101 , H01L2224/3222520130101 , H01L2224/838420130101 , H01L2224/8385120130101 , H01L2924/1305520130101 , H01L2924/1306220130101 , H01L2924/1306420130101 , H01L2924/1309120130101 , H01L2924/1615120130101 , H01L2924/1625120130101 , H01L2924/181520130101 , H01L23/24
摘要: A power semiconductor module arrangement comprises a housing, a substrate arranged in the housing, the substrate comprising a dielectric insulation layer, a first metallization layer arranged on a first side of the dielectric insulation layer, and a second metallization layer arranged on a second side of the dielectric insulation layer, at least one semiconductor body mounted on a first surface of the first metallization layer, at least one connecting element arranged on and electrically connected to the first surface of the first metallization layer, at least one contact element, wherein each of the at least one contact element is inserted into and electrically connected to one of the at least one connecting element, wherein each of the at least one contact element extends from the respective connecting element through the interior of the housing and to the outside of the housing in a direction perpendicular to the first surface, and a hard encapsulation that is arranged adjacent to the first metallization layer and that at least partly fills the inside of the housing, wherein the hard encapsulation has a hardness of at least 40 Shore A, each of the at least one contact element is partly embedded in the hard encapsulation, the hard encapsulation completely covers the at least one semiconductor body and any other components mounted on the substrate, each of the at least one contact element has a first length between the substrate and a cover of the housing in a direction perpendicular to the first surface of the first metallization layer, the hard encapsulation has a first thickness in a direction perpendicular to the first surface of the first metallization layer in areas surrounding each of the at least one contact element, the hard encapsulation has a second thickness in a direction perpendicular to the first surface of the first metallization layer in other areas, and the first thickness is greater than the second thickness.
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公开(公告)号:EP3758058B1
公开(公告)日:2024-07-17
申请号:EP20165695.6
申请日:2020-03-25
IPC分类号: H01L23/42 , H01L23/433
CPC分类号: H01L23/42 , H01L23/433 , H01L2224/1718120130101 , H01L2224/7320420130101 , H01L2224/7325320130101 , H01L2224/1622720130101 , H01L2924/1531120130101 , H01L2924/1625120130101 , H01L2924/16320130101 , H01L24/29 , H01L2224/3222520130101 , H01L2224/3318120130101 , H01L2924/163120130101 , H01L2224/291920130101 , H01L2224/3201320130101 , H01L2224/3205820130101 , H01L2224/0402620130101 , H01L24/05 , H01L2224/3250320130101 , H01L2224/0556720130101 , H01L24/13 , H01L2224/13120130101 , H01L2224/1311120130101 , H01L24/16 , H01L24/32 , H01L2224/039120130101 , H01L24/17 , H01L24/33 , H01L2224/1624520130101 , H01L2224/3224520130101 , H01L2924/1615220130101 , H01L2924/17320130101 , H01L2224/8319120130101 , H01L2224/8119220130101 , H01L2224/7310420130101 , H01L24/14 , H01L2224/1413120130101 , H01L2224/1413320130101 , H01L2224/141620130101 , H01L24/73 , H01L2924/1531220130101 , H01L2924/1531320130101 , H01L2224/140320130101 , H01L2224/141420130101 , H01L2224/1301420130101 , H01L2224/1301320130101 , H01L2224/1301220130101 , H01L2224/3350520130101 , H01L2224/1405120130101 , H01L2224/2743620130101 , H01L2224/2731220130101 , H01L2224/274720130101 , H01L2224/8386220130101 , H01L2224/8387420130101 , H01L2224/9222220130101 , H01L2224/9224220130101 , H01L24/27 , H01L24/92 , H01L24/11 , H01L24/81 , H01L24/83 , H01L2224/8181520130101 , H01L2224/1710620130101 , H01L23/367 , H01L2224/1310920130101 , H01L2224/8344720130101 , H01L2224/8144720130101 , H01L2224/8139920130101 , H01L2224/1313920130101 , H01L2224/1314720130101 , H01L2924/35120130101 , H01L2924/351220130101
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公开(公告)号:EP4325552A3
公开(公告)日:2024-07-10
申请号:EP23219820.0
申请日:2019-05-03
申请人: Intel Corporation
发明人: SANKMAN, Robert , AGRGHARAM, Sairam , WANG, Guotao , OU, Shengquan , DE BONIS, Thomas , SPENCER, Todd , SUN, Yang
IPC分类号: H01L21/60 , H01L25/065 , H01L21/98 , H01L21/56 , H01L23/31 , H01L23/538
CPC分类号: H01L23/3128 , H01L23/3135 , H01L21/56 , H01L21/568 , H01L23/5385 , H01L23/49816 , H01L23/5389 , H01L25/0655 , H01L2224/132920130101 , H01L2224/13320130101 , H01L2224/0822520130101 , H01L2224/0410520130101 , H01L2224/920220130101 , H01L2224/1210520130101 , H01L2224/9720130101 , H01L2224/1622720130101 , H01L2224/8198620130101 , H01L24/95 , H01L24/81 , H01L24/16 , H01L24/17 , H01L2224/8119220130101 , H01L2224/8119120130101 , H01L2224/170320130101 , H01L2224/8100520130101 , H01L2224/9500120130101 , H01L2224/3224520130101 , H01L2224/7325320130101 , H01L2224/7320920130101 , H01L2924/1816220130101 , H01L2924/1816120130101 , H01L24/96 , H01L2224/7320420130101 , H01L2224/3222520130101 , H01L25/0652 , H01L2224/0618120130101 , H01L2224/055720130101 , H01L2225/0651320130101 , H01L2225/0651720130101 , H01L2225/0654120130101 , H01L2225/0656220130101 , H01L2225/0658620130101 , H01L2224/0814520130101 , H01L2224/1614520130101 , H01L2924/1625120130101 , H01L2224/8203920130101 , H01L2223/5442620130101 , H01L2224/9222420130101 , H01L24/19 , H01L2924/1519220130101 , H01L25/50 , H01L2224/13120130101 , H01L2224/7325120130101 , H01L2224/040120130101 , H01L2224/1718120130101 , H01L24/73 , H01L24/08
摘要: An electronic device may include a first die that may include a first set of die contacts. The electronic device may include a second die that may include a second set of die contacts. The electronic device may include a bridge interconnect that may include a first set of bridge contacts and may include a second set of bridge contacts. The first set of bridge contacts may be directly coupled to the first set of die contacts (e.g., with an interconnecting material, such as solder). The second set of bridge contacts may be directly coupled to the second set of die contacts (e.g., with solder). The bridge interconnect may help facilitate electrical communication between the first die and the second die.
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公开(公告)号:EP4365935A1
公开(公告)日:2024-05-08
申请号:EP22205283.9
申请日:2022-11-03
发明人: STEIN, Markus , SCHMER, Alexander
IPC分类号: H01L23/053 , H01L23/373 , H01L23/04 , H01L23/488 , H01L23/49 , H01L23/48 , H01L21/60
CPC分类号: H01L2924/1625120130101 , H01L2924/1615120130101 , H01L2224/3222520130101 , H01L2224/4822720130101 , H01L2224/7326520130101 , H01L2224/29120130101 , H01L2224/838420130101 , H01L2224/8385120130101 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/48 , H01L24/83 , H01L23/053 , H01L23/49811 , H01L23/3735 , H01L23/04
摘要: A power semiconductor module arrangement comprises a housing, a substrate forming a ground surface of the housing, one or more holding pins mechanically connected to the substrate, and one or more holding elements attached to or integrally formed with the housing, wherein a first end of each of the one or more holding pins is arranged inside the housing and connected to the substrate, each of the one or more holding elements comprises a sleeve configured to receive a free end of one of the holding pins, and each of the one or more holding pins extends from the substrate in a vertical direction perpendicular to a top surface of the substrate towards a different one of the one or more holding elements such that the free end of each of the one or more holding pins is arranged inside the respective holding element in order to form a force-fitting connection.
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公开(公告)号:EP3925007B1
公开(公告)日:2024-10-02
申请号:EP20701715.3
申请日:2020-01-20
IPC分类号: B82Y10/00 , G06N10/00 , H01L23/538 , H01L23/00 , H10N69/00 , H01L23/498
CPC分类号: G06N10/00 , B82Y10/00 , H01L24/81 , H01L23/49811 , H01L2224/8119220130101 , H01L2924/1532120130101 , H01L2924/1615220130101 , H01L2924/1625120130101 , H01L2224/8119320130101 , H01L2224/1301920130101 , H01L2224/1622720130101 , H01L2224/113420130101 , H01L2224/8109920130101 , H01L2224/8180120130101 , H01L2224/160120130101 , H01L24/13 , H01L24/16 , H01L2224/0564720130101 , H01L2224/1310920130101 , H01L2224/0564420130101 , H01L2224/0566920130101 , H01L2224/0566420130101 , H01L2224/1311120130101 , H01L2224/1314420130101 , H01L2224/0563920130101 , H01L2224/1316920130101 , H01L2224/1311620130101 , H01L2224/1311320130101 , H01L2224/0566620130101 , H01L2224/1364420130101 , H10N69/00
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公开(公告)号:EP4401126A2
公开(公告)日:2024-07-17
申请号:EP24171908.7
申请日:2018-01-30
发明人: ROTH, Alexander , HOHLFELD, Olaf
IPC分类号: H01L23/24
CPC分类号: H01L23/053 , H01L21/54 , H01L23/562 , H01L2224/29120130101 , H01L2224/2913920130101 , H01L2224/3222520130101 , H01L2224/838420130101 , H01L2224/8385120130101 , H01L2924/1305520130101 , H01L2924/1306220130101 , H01L2924/1306420130101 , H01L2924/1309120130101 , H01L2924/1615120130101 , H01L2924/1625120130101 , H01L2924/181520130101 , H01L23/24
摘要: A power semiconductor module arrangement comprises a housing, a substrate arranged in the housing, the substrate comprising a dielectric insulation layer, a first metallization layer arranged on a first side of the dielectric insulation layer, and a second metallization layer arranged on a second side of the dielectric insulation layer, at least one semiconductor body mounted on a first surface of the first metallization layer, at least one connecting element arranged on and electrically connected to the first surface of the first metallization layer, at least one contact element, wherein each of the at least one contact element is inserted into and electrically connected to one of the at least one connecting element, wherein each of the at least one contact element extends from the respective connecting element through the interior of the housing and to the outside of the housing in a direction perpendicular to the first surface, and a hard encapsulation that is arranged adjacent to the first metallization layer and that at least partly fills the inside of the housing, wherein the hard encapsulation has a hardness of at least 40 Shore A, each of the at least one contact element is partly embedded in the hard encapsulation, the hard encapsulation completely covers the at least one semiconductor body and any other components mounted on the substrate, each of the at least one contact element has a first length between the substrate and a cover of the housing in a direction perpendicular to the first surface of the first metallization layer, the hard encapsulation has a first thickness in a direction perpendicular to the first surface of the first metallization layer in areas surrounding each of the at least one contact element, the hard encapsulation has a second thickness in a direction perpendicular to the first surface of the first metallization layer in other areas, and the first thickness is greater than the second thickness.
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公开(公告)号:EP3103138B1
公开(公告)日:2024-07-03
申请号:EP15714453.6
申请日:2015-03-30
IPC分类号: H01L21/60 , H01L21/50 , H01L23/498 , H01L23/10 , H01L23/488 , H01L23/473
CPC分类号: H01L23/10 , H01L23/473 , H01L23/49833 , H01L21/50 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/75 , H01L24/83 , H01L2224/2911120130101 , H01L2224/2911620130101 , H01L2224/2933920130101 , H01L2224/3222520130101 , H01L2224/3318120130101 , H01L2224/75320130101 , H01L2224/8319220130101 , H01L2224/8343920130101 , H01L2224/8344420130101 , H01L2224/8344720130101 , H01L2224/838220130101 , H01L2224/838420130101 , H01L2924/1025320130101 , H01L2924/1027220130101 , H01L2924/1032920130101 , H01L2924/103320130101 , H01L2924/1519220130101 , H01L2924/1615220130101 , H01L2924/1623520130101 , H01L2924/1625120130101 , H01L2924/1678720130101 , H01L2924/167920130101 , H01L2924/16520130101 , H01L2224/2929420130101 , H01L23/3735
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