INTERIOR TRIM PANEL AND ELECTRICAL HARNESS APPARATUS FOR AN AUTOMOTIVE VEHICLE
    101.
    发明授权
    INTERIOR TRIM PANEL AND ELECTRICAL HARNESS APPARATUS FOR AN AUTOMOTIVE VEHICLE 失效
    内饰件及电器线束机动车

    公开(公告)号:EP1034091B1

    公开(公告)日:2004-01-14

    申请号:EP98936818.8

    申请日:1998-07-02

    Abstract: The preferred embodiment apparatus employs an interior trim panel (23) and an electrical harness (25) for use in an automative vehicle. In one aspect of the present invention, the interior trim panel has a generally rigid substrate (27) covered by an aesthetically pleasing covering material (29). In another aspect of the present invention, an electrical harness (25) is provided with integrally created switch contacts (71; 73; 91; 101) and integrally created connector terminals (271). The invention includes an electrical harness (25) made by injection molding a catalytic platable polymeric resin (41) in a first injection mold. Next, a second shot of a non-catalytic polymeric resin (43) is injection molded over portions of the catalytic platable polymeric resin (41) in a second mold. The surfaces of catalytic platable polymeric resin (41) which remain exposed after overmolding of non-catalytic polymeric resin (43) define multiple circuits (45). An adhesion promoter is applied to these exposed circuit areas and then these exposed surfaces are plated with an electroless copper which is attracted to the catalyst in catalytic platable resin (41). The polymeric resins are preferably selected from those having a relatively high heat deflection temperature. The non-catalytic polymeric resin (43) acts as an insulator while the raised and plated portions of catalytic platable polymeric resin (41) act as electricity carrying, conductive circuits or traces (45).

    METHOD FOR FABRICATING A SELF-LIMITING SILICON BASED INTERCONNECT FOR TESTING BARE SEMICONDUCTOR DICE
    102.
    发明授权
    METHOD FOR FABRICATING A SELF-LIMITING SILICON BASED INTERCONNECT FOR TESTING BARE SEMICONDUCTOR DICE 失效
    制作一个探头硅基用于测试裸半导体芯片

    公开(公告)号:EP0792518B1

    公开(公告)日:2003-04-23

    申请号:EP95940644.8

    申请日:1995-11-06

    Abstract: A method for forming a self-limiting, silicon based interconnect for making temporary electrical contact with bond pads on a semiconductor die is provided. The interconnect includes a silicon substrate having an array of contact members adapted to contact the bond pads on the die for test purposes (e.g., burn-in testing). The interconnect is fabricated by: forming the contact members on the substrate; forming a conductive layer on the tip of the contact members; and then forming conductive traces to the conductive layer. The conductive layer is formed by depositing a silicon containing layer (e.g., polysilicon, amorphous silicon) and a metal layer (e.g., titanium, tungsten, platinum) on the substrate and contact members. These layers are reacted to form a silicide. The unreacted metal and silicon containing layer are then etched selective to the conductive layer which remains on the tip of the contact members. Conductive traces are then formed in contact with the conductive layer using a suitable metallization process. Bond wires are attached to the conductive traces and may be attached to external test circuitry. Alternately, another conductive path such as external contacts (e.g., slide contacts) may provide a conductive path between the conductive traces and external circuitry. The conductive layer, conductive traces and bond wires provide a low resistivity conductive path from the tips of the contact members to external test circuitry.

    PROCEDE DE REALISATION DE MODULES ELECTRONIQUES A CONNECTEUR A BILLES OU A PREFORMES INTEGREES BRASABLES SUR CIRCUIT IMPRIME ET DISPOSITIF DE MISE EN OEUVRE
    103.
    发明授权
    PROCEDE DE REALISATION DE MODULES ELECTRONIQUES A CONNECTEUR A BILLES OU A PREFORMES INTEGREES BRASABLES SUR CIRCUIT IMPRIME ET DISPOSITIF DE MISE EN OEUVRE 无效
    PROCESS FOR生产电子模块上的PCB焊接的INTEGRATED BALL或模制连接器和装置用于实现该过程的

    公开(公告)号:EP1155603B1

    公开(公告)日:2003-03-05

    申请号:EP00900531.5

    申请日:2000-01-06

    Applicant: Novatec S.A.

    Abstract: The invention concerns a method for producing electronic modules with ball connector (7) or integrated preforms capable of being soldered on a printed circuit (3) and a device for implementing said method. The invention concerns a method for producing electronic modules in the form of ball housings combining a ball grid array (7) or geometrically identical preforms for interconnecting or shielding and surface-mounted components (2) on the same surface of a substrate (1), thereby enabling said module to be directly connectable by soldering on a printed circuit (3). The balls (7) and the components (2) are transferred in one single step onto the substrate (1) by means of a gripping device adapted to the topography of the module to be produced.

    Abstract translation: 本发明涉及用于制造电子模块的与球连接器的方法(7)或能够在印刷电路(3)和用于实施所述方法的设备上被焊接一体化的预成型件。 本发明涉及一种方法,用于在球壳体结合球栅阵列(7)或几何形状相同的预型件,用于互连或屏蔽和表面安装部件的形式生产电子模块(2)上的基片的同一表面(1) 从而使得所述模块是由印刷电路(3)上直接焊接连接。 滚珠(7)和所述组件(2)在到衬底(1)一个单独的步骤中通过一个夹紧装置angepasst被转印到要产生的模块的形貌。

    Right angle connector
    105.
    发明公开
    Right angle connector 审中-公开
    直角连接器

    公开(公告)号:EP1128475A3

    公开(公告)日:2002-11-27

    申请号:EP01101986.6

    申请日:2001-01-30

    Abstract: A right angle electrical connector (10, 66, 70) that uses straight contacts (22, 82, 98), rather than contacts bent at a right angle. A flat insulative plate (30, 115) extends rearwardly from a tall portion of the connector body device (12, 77, 91) that is mounted over a printed circuit board (14, 110, 110'). Pegs (40, 120) formed on the bottom of the plate are mounted over a printed circuit board (38, 124, 126) in the printed circuit board. Conductive traces (44, 46, 43, 50, 128, 134) extend from contact passages in the connector body to the flat plate and pegs to provide electrical connections between contacts mounted in the passages and the printed circuit board.

    Abstract translation: 直角电连接器(10,66,70)使用直触头(22,82,98),而不是以直角弯曲的触头。 扁平绝缘板(30,115)从安装在印刷电路板(14,110,110')上的连接器本体装置(12,77,91)的高部向后延伸。 形成在印版底部上的销钉(40,120)安装在印刷电路板中的印刷电路板(38,124,126)上。 导电迹线(44,46,43,50,128,134)从连接器本体中的接触通道延伸到平板和栓钉,以提供安装在通道中的触头与印刷电路板之间的电连接。

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