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    ELECTRICAL CONNECTION STRUCTURE
    21.
    发明公开
    ELECTRICAL CONNECTION STRUCTURE 有权
    ELEKTRISCHE VERBINDUNGSSTRUKTUR

    公开(公告)号：EP2117082A1

    公开(公告)日：2009-11-11

    申请号：EP06822495.5

    申请日：2006-10-27

    Applicant: Asahi Denka Kenkyusho Co., Ltd.

    Inventor： MIZOGUCHI, Masanori

    IPC: H01R12/04 ,  H01R12/32 ,  H05K1/14

    CPC classification number: H01R12/592 ,  H01R12/58 ,  H01R12/613 ,  H01R12/62 ,  H01R12/777 ,  H01R12/778 ,  H01R12/78 ,  H01R12/79 ,  H05K1/118 ,  H05K3/326 ,  H05K3/365 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09063 ,  H05K2201/091 ,  H05K2201/0969 ,  H05K2201/1059 ,  H05K2201/209

    Abstract: An electrical connection structure allowing reduction in height and easy disassembly, wherein a first connecting member comprises a flexible substrate comprising a flexible insulating film, at least one conductive pad formed on at least one side thereof, a conductive circuit pattern extending from the rim of the pad, a through-hole formed through the thickness thereof at a planar position within the pad, and a small aperture formed at a planar position within the pad and communicating with the through-hole, and a second connecting member comprises a conductive projection formed at least one side thereof and electrically connected with a conductive circuit pattern formed inside or on the second connecting member, where the electrical connection is formed in the manner such that the conductive projection is inserted in the through-hole, through the small aperture, and mechanically contacts the pad.

    Abstract translation: 一种电连接结构，其允许降低高度并易于拆卸，其中第一连接构件包括柔性基底，该柔性基底包括柔性绝缘膜，至少一个导电垫在至少一个侧面上形成，导电电路图案从 衬垫，在衬垫内的平面位置处形成通过其厚度的通孔，以及形成在衬垫内的平面位置并与通孔连通的小孔，第二连接构件包括形成在 至少一个侧面，并与形成在第二连接构件内部或第二连接构件上的导电电路图形电连接，其中电连接形成为使得导电突起通过小孔插入到通孔中，并机械地 联系垫

    Wired circuit board and method for producing the same
    23.
    发明公开
    Wired circuit board and method for producing the same 审中-公开
    有线电路板及其制造方法

    公开(公告)号：EP1956875A3

    公开(公告)日：2009-09-30

    申请号：EP08150845.9

    申请日：2008-01-30

    Applicant: Nitto Denko Corporation

    Inventor： Kamei, Katsutoshi Nitto Denko Corporation ,  Nakamura, Kazuya ,  Thaveeprungsriporn, Visit Nitto Denko Corp.

    IPC: H05K3/24 ,  H05K1/11 ,  H05K3/40

    CPC classification number: H05K3/244 ,  H05K1/056 ,  H05K3/243 ,  H05K3/4092 ,  H05K2201/0394 ,  H05K2203/1105 ,  Y10T29/49162

    Abstract: A wired circuit board (1) includes: a first insulating layer (3); a conductive pattern (4) formed on the first insulating layer (3) and having a terminal portion (11B); and a second insulating layer (6) formed on the first insulating layer (3) to cover the conductive pattern (4). A surface of the terminal portion is formed to be exposed from the first insulating layer (3) and the second insulating layer (6). A tin alloy layer (5) is formed at least on a top surface and both side surfaces of the terminal portion (11B). A method for producing a wired circuit board is also disclosed.

    Abstract translation: 线路板（1）包括：第一绝缘层（3）;第二绝缘层 形成在第一绝缘层（3）上并具有端子部分（11B）的导电图案（4）; 以及形成在第一绝缘层（3）上以覆盖导电图案（4）的第二绝缘层（6）。 端子部分的表面形成为从第一绝缘层（3）和第二绝缘层（6）露出。 锡合金层（5）至少形成在端子部分（11B）的顶表面和两个侧表面上。 还公开了一种用于制造布线电路板的方法。

    METHOD OF PRODUCING MULTILAYER CIRCUIT BOARDS
    24.
    发明授权
    METHOD OF PRODUCING MULTILAYER CIRCUIT BOARDS 有权
    制造方法多层电路板

    公开(公告)号：EP1282343B1

    公开(公告)日：2009-06-10

    申请号：EP00976308.7

    申请日：2000-11-16

    Applicant: IBIDEN CO., LTD.

    Inventor： KARIYA, Takashi,

    IPC: H05K3/46

    CPC classification number: H05K3/4617 ,  H05K3/386 ,  H05K3/423 ,  H05K3/4652 ,  H05K2201/0195 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2203/0733 ,  H05K2203/1189

    Abstract: A method of producing multilayer circuit boards, wherein a plurality of printed boards (2) are laminated and pressed as a unit, thereby producing a multiplayer circuit board (1). At this time, an outermost conductor layer (6) is laminated to the surface on the insulation layer side of the first outermost printed board (2A) disposed with the insulation layer side (4A) directed outside and then the laminate is pressed. Further, the pressing is effected in such a manner that the conductor layer of the second outermost printed board (2B) disposed with the conductor layer side (9) directed outside is not formed with a conductor circuit (10) in advance but that a conductor layer of uniform thickness exists over the entire surface. This makes it possible to simplify the manufacturing process and to improve the accuracy of multiplayer circuit boards.

    PLATING APPARATUS AND METHOD OF PLATING
    27.
    发明公开
    PLATING APPARATUS AND METHOD OF PLATING 审中-公开
    PLATTIERUNGSVORRICHTUNG UND PLATTIERUNGSVERFAHREN

    公开(公告)号：EP1988191A1

    公开(公告)日：2008-11-05

    申请号：EP07714599.3

    申请日：2007-02-20

    Applicant: IBIDEN CO., LTD.

    Inventor： NAKAI, Toru ,  KAWAI, Satoru

    IPC: C25D5/22 ,  C25D5/16 ,  C25D7/00 ,  C25D7/06 ,  C25D17/00 ,  H05K3/42

    CPC classification number: H05K3/423 ,  C25D5/02 ,  C25D5/16 ,  C25D5/22 ,  C25D7/06 ,  C25D17/005 ,  H05K3/421 ,  H05K3/429 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2203/0143 ,  H05K2203/0257 ,  H05K2203/1545

    Abstract: [Subject Matter] To provide a plating method to form filled vias with a degree of concavity or convexity at the surface of 7 µm or less
    [Solution] Since insulative contact body 18 with pliability makes direct contact with a substrate, compared with conventional mixing methods using bubbling or splashing a plating solution onto the substrate, the diffusion layer (the region having less plating ingredients or a thinner concentration of additives) may be made thinner. Therefore, on the plating surface, excluding the interiors of via holes 36 (concave portions), inhibitive agents contained in the plating solution may tend to adhere more than in conventional mixing methods. In contrast, since the interiors of via holes 36 (concave portions) have diffusion layers whose thickness is in proportion to the depth of via holes 36 (concave portions), similarly to conventional mixing methods, an inhibitive agent seldom adheres there. Therefore, at the interiors of via holes 36 (concave portions), plated films are formed at a plating speed that is high compared with other portions.

    Abstract translation: [主题]提供一种在7μm以下的表面形成具有凹凸度的填充通孔的电镀方法[解决方案]由于具有柔韧性的绝缘接触体18与基板直接接触，与常规的混合方法 使用鼓泡或溅镀电镀溶液到基底上，可以使扩散层（具有较少电镀成分的区域或更低浓度的添加剂）变薄。 因此，在电镀面上，除了通孔36（凹部）的内部，电镀液中含有的抑制剂比常规的混合方法更容易粘附。 相反，由于通孔36（凹部）的内部具有厚度与通路孔36的深度成比例的扩散层（凹部），所以与现有的混合方式类似，抑制剂很少粘附在其上。 因此，在通孔36（凹部）的内部，以与其他部分相比高的电镀速度形成镀膜。

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