公开(公告)号：EP1269804A1

公开(公告)日：2003-01-02

申请号：EP01913463.4

申请日：2001-03-29

Applicant: DYCONEX PATENTE AG

Inventor： SCHMIDT, Walter

IPC: H05K1/02 ,  H05K1/14 ,  H05K1/18 ,  H01L23/538

CPC classification number: H01L23/49827 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0263 ,  H05K1/0268 ,  H05K1/0272 ,  H05K1/0274 ,  H05K1/113 ,  H05K1/115 ,  H05K1/141 ,  H05K1/144 ,  H05K1/162 ,  H05K1/185 ,  H05K3/005 ,  H05K3/0055 ,  H05K3/0061 ,  H05K3/041 ,  H05K3/046 ,  H05K3/3436 ,  H05K3/368 ,  H05K3/4084 ,  H05K3/4602 ,  H05K3/4614 ,  H05K3/4641 ,  H05K3/4644 ,  H05K3/4652 ,  H05K2201/0379 ,  H05K2201/0394 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09527 ,  H05K2201/09636 ,  H05K2201/0969 ,  H05K2201/09827 ,  H05K2201/10378 ,  H05K2201/10598 ,  H05K2203/0108 ,  H05K2203/0195 ,  H05K2203/0285 ,  H05K2203/095 ,  H05K2203/1189 ,  H05K2203/163 ,  Y02P70/613 ,  H01L2924/00

Abstract: The electrical connecting element comprises an essentially stiff core, essentially mechanically stiff and PCI/HDIs with conductor paths serving as interconnect, wherein the core comprises two parts (1, 3) which can be fixed to each other. Between the two parts, a cavity (101) can be formed, in which components (103) producing a lot of heat or requiring protection from environmental influences can be placed.

公开(公告)号：EP1125325A1

公开(公告)日：2001-08-22

申请号：EP99950846.8

申请日：1999-10-27

Applicant: Novatec S.A.

Inventor： BOURRIERES, Francis ,  KAISER, Clément

IPC: H01L21/48 ,  H01L21/60

CPC classification number: H01L21/4853 ,  H01L21/6835 ,  H01L24/11 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01094 ,  H01L2924/014 ,  H05K3/3478 ,  H05K2201/0379 ,  H05K2203/0113 ,  H05K2203/0338 ,  H05K2203/041 ,  H05K2203/0557

Abstract: The invention concerns a device (14) for implementing a method for setting on a substrate (2) interconnecting balls or preforms (1) comprising the following phases: storing in bulk the preforms (1); seizing in ordered position the preforms (1) with an adapted gripping device (9); setting the preforms (1) on the substrate (2) with the gripping device (9). Said device (14) is characterised in that it consists of at least a matrix for storing the preforms, said matrix comprising a floor capable of acting as stop for the preforms when the matrix is being filled thereby enabling the implementation of a method whereby the passage from bulk storage to ordered storage is performed in masked time. The invention is useful for incorporating or replacing balls in substrates of electronic components.

公开(公告)号：EP1041616A1

公开(公告)日：2000-10-04

申请号：EP98953052.2

申请日：1998-11-13

Applicant: Matsushita Electric Industrial Co., Ltd.

Inventor： TAKEZAWA, Hiroaki ,  TSUKAMOTO, Masahide ,  ITAGAKI, Minehiro ,  BESSHO, Yoshihiro ,  HATANAKA, Hideo ,  FUKUMURA, Yasushi ,  EDA, Kazuo ,  ISHIDA, Toru

IPC: H01L21/60 ,  H01L21/768

CPC classification number: H05K3/3436 ,  H01L23/49816 ,  H01L2224/16225 ,  H05K1/0271 ,  H05K3/105 ,  H05K3/321 ,  H05K2201/0212 ,  H05K2201/0379 ,  H05K2201/10257 ,  H05K2201/10992 ,  H05K2203/121 ,  Y02P70/613 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/254 ,  Y10T428/31681

Abstract: A stress relaxation type electronic component which is to be mounted on a circuit board, wherein a stress relaxation mechanism member is disposed on a surface of said electronic component, said surface being on a side of a connection portion where said electronic component is to be connected to said circuit board, and said stress relaxation mechanism member is electrically conductive.

Abstract translation: 一种应用松弛型电子部件，其安装在电路板上，其中应力松弛机构部件设置在所述电子部件的表面上，所述表面位于所述电子部件要连接的连接部分的一侧 到所述电路板，并且所述应力松弛机构构件是导电的。

公开(公告)号：EP0645948A1

公开(公告)日：1995-03-29

申请号：EP94306928.6

申请日：1994-09-21

Applicant: AT&T Corp.

Inventor： Degani, Yinon ,  Dudderar, Thomas Dixon ,  Woods, William Lonzo, Jr.

IPC: H05K3/34 ,  B23K3/06

CPC classification number: H01L24/81 ,  H01L21/4853 ,  H01L2224/13111 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/1225 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/0379 ,  H05K2201/10734 ,  H05K2201/10992 ,  H05K2203/043 ,  H05K2203/0545 ,  Y02P70/613

Abstract: Described are a process for soldering at least one component having solder bumps (12) to a substrate and a process for forming solder bumps (12) on metal pads (13) of an element, such as an IC package (10) or substrate (11) or both. The bumps (12) are formed by stencil printing solder paste deposits (21) on the metal pads (13), heating the solder paste deposits (21) to reflow temperature of the solder in the solder paste deposits (21), and allowing the molten solder in each deposit to coalesce and during subsequent cooling solidify forming the bumps (12) on the metal pads. The bumps are formed by conducting the stencil printing through apertures (20) in an ultra-thick stencil (19), the apertures (20) having trapezoidal crossection in the plane normal to the broad surfaces of the stencil with the top opening being smaller than the bottom opening and with the walls of the aperture sloping at an angle within a range of from 1 to 45 degrees from the vertical, the solder paste having a low tackiness and high metal loading, and the solder paste deposits (21) covering an area which is equal to or exceeds an area of the metal pad (13) in any ratio between 1.5:1 and 5:1. Bumps formed in this manner lead to the formation of reliable solder joints.

Abstract translation: 描述了将至少一个具有焊料凸块的部件焊接到基板上的工艺，以及用于在诸如IC封装或基板或两者的元件的金属焊盘上形成焊料凸块的工艺。 凸块通过在金属焊盘上的模版印刷焊膏沉积物形成，加热焊膏沉积物以回流焊膏沉积物中的焊料的温度，并且允许每个沉积物中的熔融焊料聚结并且在随后的冷却期间固化形成凸块 在金属垫上。 通过在超厚模板中的孔进行模版印刷来形成凸块，该孔在垂直于模板的宽表面的平面中具有梯形横截面，顶部开口小于底部开口，并且壁的壁 孔径与垂直于1至45度的角度倾斜，焊膏具有低粘性和高金属负载，并且焊膏沉积覆盖等于或超过金属垫的面积的面积 在1.5：1和5：1之间的任何比例。 以这种方式形成的冲击导致形成可靠的焊点。

公开(公告)号：EP0028657B1

公开(公告)日：1988-08-10

申请号：EP80900951.7

申请日：1980-05-23

Applicant: FUJITSU LIMITED

Inventor： KUROSAWA, Keiji ,  YAMAMOTO, Kenji ,  YAMASHITA, Mitsuo ,  MITSUI, Hisami ,  MIYABARA, Ayako ,  MIYAGAWA, Kiyotaka ,  IMURA, Takayoshi

IPC: H05K3/46

CPC classification number: H05K3/462 ,  H05K1/0272 ,  H05K1/053 ,  H05K3/426 ,  H05K3/427 ,  H05K3/429 ,  H05K3/4623 ,  H05K2201/0379 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2203/0315 ,  Y10T29/49126

Abstract: The hollow multilayer printed wiring board is composed of plural print boards (1), (2), (3), (4) laminated with a predetermined spacing therebetween, each of which has a signal-conducting pattern (6) formed on at least one surface thereof and a land-conducting pattern (7) formed on at least one surface thereof. The board has through-holes (10) which are plated to connect with the land-conducting pattern and each of the through-holes and a plated through-hole in at least one board of the boards adjacent thereto are positioned on a straight line so as to provide a plated through-hole or an interstitial wire hole (12), (13). Formed on at least the upper- and lower- end surfaces of each through-hole (10) are low melting-point metal layers which function as conductors among the signal conducting patterns in 2 or more of the plural boards and as layer-bonding materials for the plural boards. The laminated boards, except at least one of the outer sides, is made of a heat-proof organic plastics-sheet or an insulated metal.

公开(公告)号：EP0248566A2

公开(公告)日：1987-12-09

申请号：EP87304510.8

申请日：1987-05-21

Applicant: AT&T Corp.

Inventor： LoVasco, Francis ,  Oien, Michael Ackman

IPC: H01L21/58 ,  H01L21/60 ,  H05K3/34

CPC classification number: H01L24/16 ,  H01L24/81 ,  H01L2224/131 ,  H01L2224/81024 ,  H01L2224/81136 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/303 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/035 ,  H05K2201/0379 ,  H05K2201/09909 ,  H05K2201/10568 ,  H05K2201/10734 ,  H05K2201/2036 ,  H05K2203/043 ,  H05K2203/0465 ,  H05K2203/167 ,  Y02P70/613 ,  H01L2224/13099 ,  H01L2224/29099

Abstract: A solder joint assembly technique applies controlled volumes of solder to pads of both package and substrate (31, 32). The two units are positioned adjacent each other with the pads and solder deposits mechanically maintained in registration with each other (34, 35). The assembly is reflowed and the final separation between package and substrate at which the resulting solder joint solidifies is mechanically controlled in order to control a geometry of the resultant solidified joint (36, 37). The solder volume deposits may assume various forms including spherical bumps and solder paste deposits.

Abstract translation: 焊料接头组件技术适用焊料的受控体积为两者封装的焊盘和基片（31，32）。 这两个单元被定位成机械性地保持在登记海誓山盟（34，35）的焊盘和焊料沉积相邻海誓山盟。 该组件被软熔和封装基板之间和将所得的焊点固化是为了控制所得的几何机械控制的最终分离凝固接头（36，37）。 焊料体积沉积物可以采取各种形式，包括球形凸块和焊锡膏沉积。