公开(公告)号：US20140273515A1

公开(公告)日：2014-09-18

申请号：US14211156

申请日：2014-03-14

Applicant: Applied Materials, Inc.

Inventor： AVGERINOS V. GELATOS ,  SRINIVAS GANDIKOTA ,  SESHADRI GANGULI ,  XINYU FU ,  BO ZHENG ,  YU LEI

IPC: H01L21/67 ,  H01L21/285

CPC classification number: H01L21/6723 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/285 ,  H01L21/28525 ,  H01L21/28568 ,  H01L21/6719 ,  H01L21/67207 ,  H01L29/4958 ,  H01L29/4966

Abstract: Embodiments of an integrated platform for fabricating n-type metal oxide semiconductor (NMOS) devices are provided herein. In some embodiments, an integrated platform for fabricating n-type metal oxide semiconductor (NMOS) devices may include a first deposition chamber configured to deposit a first layer atop the substrate, the first layer comprising titanium oxide (TiO2) or selenium (Se); a second deposition chamber configured to deposit a second layer atop the first layer, the second layer comprising titanium; a third deposition chamber configured to deposit a third layer atop the second layer, the third layer comprising one of titanium nitride (TiN) or tungsten nitride (WN).

Abstract translation: 本文提供了用于制造n型金属氧化物半导体（NMOS）器件的集成平台的实施例。 在一些实施例中，用于制造n型金属氧化物半导体（NMOS）器件的集成平台可以包括第一沉积室，其被配置为在衬底顶部沉积第一层，第一层包含氧化钛（TiO 2）或硒（Se）; 第二沉积室，被配置为在所述第一层顶部沉积第二层，所述第二层包含钛; 第三沉积室，被配置为在所述第二层顶部沉积第三层，所述第三层包括氮化钛（TiN）或氮化钨（WN）之一。

公开(公告)号：US20190229007A1

公开(公告)日：2019-07-25

申请号：US16249716

申请日：2019-01-16

Applicant: APPLIED MATERIALS, INC.

Inventor： MUHANNAD MUSTAFA ,  MUHAMMAD M. RASHEED ,  YU LEI ,  AVGERINOS V. GELATOS ,  VIKASH BANTHIA ,  VICTOR H. CALDERON ,  SHI WEI TOH ,  YUNG-HSIN LEE ,  ANINDITA SEN

IPC: H01L21/687 ,  H01J37/32

Abstract: Methods and apparatus for processing substrates are provided herein. In some embodiments, a process kit for a substrate support includes: an upper edge ring made of quartz and having an upper surface and a lower surface, wherein the upper surface is substantially planar and the lower surface includes a stepped lower surface to define a radially outermost portion and a radially innermost portion of the upper edge ring.

公开(公告)号：US20170148670A1

公开(公告)日：2017-05-25

申请号：US15358690

申请日：2016-11-22

Applicant: APPLIED MATERIALS, INC.

Inventor： YU LEI ,  VIKASH BANTHIA ,  KAI WU ,  XINYU FU ,  YI XU ,  KAZUYA DAITO ,  FEIYUE MA ,  PULKIT AGARWAL ,  CHI-CHOU LIN ,  DIEN-YEH WU ,  GUOQIANG JIAN ,  WEI V. TANG ,  JONATHAN BAKKE ,  MEI CHANG ,  SUNDAR RAMAMURTHY

IPC: H01L21/768 ,  C23C16/52 ,  C23C16/455 ,  C23C16/46 ,  H01L21/311 ,  C23C16/44

CPC classification number: H01L21/76843 ,  C23C16/0227 ,  C23C16/0281 ,  C23C16/045 ,  C23C16/06 ,  C23C16/08 ,  C23C16/4401 ,  C23C16/45536 ,  C23C16/45544 ,  C23C16/46 ,  C23C16/505 ,  C23C16/52 ,  C23C16/54 ,  H01L21/31116 ,  H01L21/76802 ,  H01L21/76877

Abstract: Methods for forming metal contacts having tungsten liner layers are provided herein. In some embodiments, a method of processing a substrate includes: exposing a substrate, within a first substrate process chamber, to a plasma formed from a first gas comprising a metal organic tungsten precursor gas or a fluorine-free tungsten halide precursor to deposit a tungsten liner layer, wherein the tungsten liner layer is deposited atop a dielectric layer and within a feature formed in a first surface of the dielectric layer of a substrate; transferring the substrate to a second substrate process chamber without exposing the substrate to atmosphere; and exposing the substrate to a second gas comprising a tungsten fluoride precursor to deposit a tungsten fill layer atop the tungsten liner layer.

公开(公告)号：US20200251340A1

公开(公告)日：2020-08-06

申请号：US16775752

申请日：2020-01-29

Applicant: APPLIED MATERIALS, INC.

Inventor： ROEY SHAVIV ,  AVGERINOS V. GELATOS ,  ISMAIL EMESH ,  XIKUN WANG ,  YU LEI

IPC: H01L21/285 ,  H01L21/768 ,  H01L21/3213 ,  H01L21/02

Abstract: Methods and apparatus for filling a feature disposed in a substrate, including: depositing a first metal within the feature to a first predetermined thickness in a first process chamber; etching the first metal to remove a first portion of the metal at a top of the feature in a second process chamber different than the first process chamber to form an exposed surface of the first metal, and selectively depositing a second metal atop the exposed surface of the first metal within the feature to a second predetermined thickness in a third process chamber; wherein etching the first metal and selectively depositing a second metal are performed without oxygen contacting the top surface.

公开(公告)号：US20190382895A1

公开(公告)日：2019-12-19

申请号：US16520646

申请日：2019-07-24

Applicant: APPLIED MATERIALS, INC.

Inventor： XIAOXIONG YUAN ,  YU LEI ,  YI XU ,  KAZUYA DAITO ,  PINGYAN LEI ,  DIEN-YEH WU ,  UMESH M. KELKAR ,  VIKASH BANTHIA

IPC: C23C16/455

Abstract: Embodiments of a blocker plate for use in a substrate process chamber are disclosed herein. In some embodiments, a blocker plate for use in a substrate processing chamber configured to process substrates having a given diameter includes: an annular rim; a central plate disposed within the annular rim; and a plurality of spokes coupling the central plate to the annular rim.

公开(公告)号：US20190057863A1

公开(公告)日：2019-02-21

申请号：US16104352

申请日：2018-08-17

Applicant: APPLIED MATERIALS, INC.

Inventor： YIXIONG YANG ,  PAUL F. MA ,  WEI V. TANG ,  WENYU ZHANG ,  SHIH CHUNG CHEN ,  CHEN HAN LIN ,  CHI-CHOU LIN ,  YI XU ,  YU LEI ,  NAOMI YOSHIDA ,  LIN DONG ,  SIDDARTH KRISHNAN

IPC: H01L21/02 ,  H01L29/40 ,  H01L21/28

Abstract: Methods and apparatus for forming a semiconductor structure, including depositing a doping stack having a first surface atop a high-k dielectric layer, wherein the doping stack includes at least one first metal layer having a first surface, at least one second metal layer comprising a first aluminum dopant and a first surface, wherein the second metal layer is atop the first surface of the first metal layer, and at least one third metal layer atop the first surface of the second metal layer; depositing an anneal layer atop the first surface of the doping stack; annealing the structure to diffuse at least the first aluminum dopant into the high-k dielectric layer; removing the anneal layer; and depositing at least one work function layer atop the first surface of the doping stack.

公开(公告)号：US20180347043A1

公开(公告)日：2018-12-06

申请号：US15663734

申请日：2017-07-29

Applicant: APPLIED MATERIALS, INC.

Inventor： XIAOXIONG YUAN ,  YU LEI ,  YI XU ,  KAZUYA DAITO ,  PINGYAN LEI ,  DIEN-YEH WU ,  UMESH M. KELKAR ,  VIKASH BANTHIA

IPC: C23C16/455

CPC classification number: C23C16/45544 ,  C23C16/45508 ,  C23C16/45536 ,  C23C16/45561 ,  C23C16/45563 ,  C23C16/45565 ,  C23C16/45574 ,  H01L21/67017

Abstract: Embodiments of a blocker plate for use in a substrate process chamber are disclosed herein. In some embodiments, a blocker plate for use in a substrate processing chamber configured to process substrates having a given diameter includes: an annular rim; a central plate disposed within the annular rim; and a plurality of spokes coupling the central plate to the annular rim.