摘要:
In a charged-particle-beam lithographic system, charge accumulation on the workpiece during alignment or writing can cause significant pattern placement errors. A film (16) formed directly under the resist layer (56) to be patterned is utilized as a charge-conducting medium during lithography. The pattern delineated in the resist layer (56) is transferred into the film (16) and subsequently into an underlying layer (20). The film (16) is highly compatible with standard lithographic and etching processes used to fabricate LSI and VLSI circuits.
摘要:
An improved radio frequency (rf) powered radial flow cylindrical reactor utilizes a gas shield which substantially limits the glow plasma discharge reaction to a section of the reactor over the semiconductor substrates which are to be coated. The gas shield permits the use of higher rf input power which contributes to the formation of protective films that have desirable physical and electrical characteristics.
摘要:
The efficient production of sequential layers of silicon dioxide and polycrystalline silicon is possible using a specific set of reaction steps. This set of reaction steps includes the oxidation of silicon at low oxygen pressure and at temperatures of the magnitude of 900 degrees C., followed by the deposition of polycrystalline silicon at substantially the same temperature utilizing a dichloride silane chemical vapor deposition (CVD) process.
摘要:
The discovery that boron nitride and boron carbide films can be made in tension allows nondistorting radiation windows or masks to be realized. Both low and high pressure techniques for making the tensile films lead to related mask structures utilizing such films. The resulting structures are sufficiently distortion free to be useful for x-ray lithography.
摘要:
Disclosed is a method and structure for protecting circuit components from the ambient and in particular for protecting the contact metal from the adverse effects of moisture. A first layer of amorphous silicon is deposited over the circuit including the metal contacts. A second layer which may be silicon nitride or silicon dioxide is then deposited over the amorphous silicon. The amorphous silicon layer reduces cracking in the second layer and prevents cracks in the second layer from propagating to the circuit components.
摘要:
The invention is embodied in a method of determining an optimum de-chucking voltage for nullifying residual electrostatic forces on a wafer in an electrostatic chuck for removal of the wafer from the chuck, including holding the wafer on the electrostatic chuck by applying an electrostatic potential to the chuck, introducing a gas between the wafer and the chuck, reducing the electrostatic potential of the chuck while observing a rate of leakage of the gas from between the wafer and the chuck, and recording as the optimum dechucking voltage the value of the electrostatic potential obtaining when the rate of leakage exceeds a predetermined threshold.
摘要:
A method for fabricating a device which includes a tantalum silicide structure, and which is essentially free of conductive etch residues, is disclosed. The method includes the steps of depositing tantalum and silicon onto a substrate, patterning the tantalum and silicon, and then sintering the patterned tantalum and silicon to form a patterned layer of tantalum silicide.
摘要:
In a plasma-assisted etching apparatus and method designed to pattern silicon dioxide in a plasma derived from a mixture of trifluoromethane and ammonia, surfaces in the reaction chamber are coated with a layer of silicon. Contamination of wafers during the etching process is thereby substantially reduced. In practice, this leads to a significant increase in the yield of acceptable chips per wafer.
摘要:
The compounds TiSi.sub.2 and TaSi.sub.2 have been found to be suitable substitutes for polysilicon layers in semiconductor integrated circuits. Suitable conducting properties of the compounds are ensured by providing a relatively thin substrate of polysilicon.
摘要:
Insulation between first and second levels of aluminum metallization in semiconductor integrated circuit structures comprises a plasma planarized, deposited silicon dioxide layer and another silicon dioxide layer deposited upon said plasma planarized layer.