摘要:
Conventional fabrication of sidewall oxide around an ONO-type memory cell stack usually produces Bird's Beak because prior to the fabrication, there is an exposed sidewall of the ONO-type memory cell stack that exposes side parts of a plurality of material layers respectively composed of different materials. Certain materials in the stack such as silicon nitrides are more difficult to oxidize than other materials in the stack such polysilicon. As a result oxidation does not proceed uniformly along the multi-layered height of the sidewall. The present disclosure shows how radical-based fabrication of sidewall dielectric can help to reduce the Bird's Beak formation. More specifically, it is indicated that short-lived oxidizing agents (e.g., atomic oxygen) are able to better oxidize difficult to oxidize materials such as silicon nitride and the it is indicated that the short-lived oxidizing agents alternatively or additionally do not diffuse as deeply through already oxidized layers of the sidewall such as silicon oxide layers. As a result, a more uniform sidewall dielectric can be fabricated with more uniform breakdown voltages along it height.
摘要:
Aluminum oxide is deposited by atomic layer deposition to form a high-k dielectric for the interpoly dielectric layer of a non-volatile memory device. The increased capacitive coupling can allow a thicker oxide layer to be used between the floating gate and the control gate, resulting in improved reliability and longer lifetime of the memory cells fabricated according to this invention.
摘要:
Aluminum oxide is deposited by atomic layer deposition to form a high-k dielectric for the interpoly dielectric layer of a non-volatile memory device. The increased capacitive coupling can allow a thicker oxide layer to be used between the floating gate and the control gate, resulting in improved reliability and longer lifetime of the memory cells fabricated according to this invention.
摘要:
Conventional fabrication of sidewall oxide around an ONO-type memory cell stack usually produces Bird's Beak because prior to the fabrication, there is an exposed sidewall of the ONO-type memory cell stack that exposes side parts of a plurality of material layers respectively composed of different materials. Certain materials in the stack such as silicon nitrides are more difficult to oxidize than other materials in the stack such polysilicon. As a result oxidation does not proceed uniformly along the multi-layered height of the sidewall. The present disclosure shows how radical-based fabrication of sidewall dielectric can help to reduce the Bird's Beak formation. More specifically, it is indicated that short-lived oxidizing agents (e.g., atomic oxygen) are able to better oxidize difficult to oxidize materials such as silicon nitride and the it is indicated that the short-lived oxidizing agents alternatively or additionally do not diffuse as deeply through already oxidized layers of the sidewall such as silicon oxide layers. As a result, a more uniform sidewall dielectric can be fabricated with more uniform breakdown voltages along it height.
摘要:
Nonvolatile memory wordlines (160) are formed as sidewall spacers on sidewalls of row structures (280). Each row structure may contain floating and control gates (120, 140), or some other elements. Pedestals (340) are formed adjacent to the row structures before the conductive layer (160) for the wordlines is deposited. The pedestals are formed in the area of the contact openings (330.1) that will be etched in an overlying dielectric (310) to form contacts to the wordlines. The pedestals raise the top surface of the wordline layer near the contact openings, so the contact opening etch can be made shorter. The pedestals also increase the minimum thickness of the wordline layer near the contact openings, so the loss of the wordline layer during the etch of the contact openings becomes less critical, and the photolithographic tolerances required for patterning the contact openings can be relaxed. The pedestals can be dummy structures (they may have no electrical functionality).
摘要:
Phase change devices, and particularly multi-terminal phase change devices, include first and second active terminals bridged together by a phase-change material whose conductivity can be modified in accordance with a control signal applied to a control electrode. This structure allows an application in which an electrical connection can be created between the two active terminals, with the control of the connection being effected using a separate terminal or terminals. Accordingly, the resistance of the heater element can be increased independently from the resistance of the path between the two active terminals. This allows the use of smaller heater elements thus requiring less current to create the same amount of Joule heating per unit area. The resistance of the heating element does not impact the total resistance of the phase change device. The programming control can be placed outside of the main signal path through the phase change device, reducing the impact of the associated capacitance and resistance of the device.
摘要:
In each row of a nonvolatile memory array, the select gates of all the memory cells are connected together and are used to select a row for memory access. The control gates of each row are also connected together, and the source regions of each row are connected together. Also, the control gates of plural rows are connected together, and the source regions of plural rows are connected together, but if the source regions of two rows are connected together, then their control gates are not connected together. If one of the two rows is being accessed but the other one of the two rows is not being accessed, their control gates are driven to different voltages, reducing the probability of a punch-through in the non-accessed row.
摘要:
In this invention a stacked gate flash memory cell is disclosed which has a lightly doped drain (LDD) on the drain side of the device and uses the source to both program using hot electron generation and erase the floating gate using Fowler-Nordheim-tunneling. Disturb conditions are reduced by taking advantage of the LDD and the biasing of the cell that uses the source for both programming and erasure. The electric field of the drain is greatly reduced as a result of the LDD which reduces hot electron generation. The LDD also helps reduce bit line disturb conditions during programming. A transient bit line disturb condition in a non-selected cell is minimized by preconditioning the bit line to the non-selected cell to Vcc.
摘要:
A system and method for providing a memory cell on a semiconductor is disclosed. The memory cell has a source and a drain. The method and system include providing a source implant in the semiconductor, providing a pocket implant in the semiconductor, and providing a drain implant in the semiconductor after the pocket implant is provided. Thus, short channel effects are reduced.
摘要:
A memory with controlled gate current injection during memory cell programming wherein programming circuitry applies a time-varying voltage to a control gate of the memory cell during a programming cycle. The time-varying voltage yields a substantially constant rate of electron flow from the channel region to the floating gate during the programming cycle.