公开(公告)号：US10074590B1

公开(公告)日：2018-09-11

申请号：US15649459

申请日：2017-07-13

Applicant: Infineon Technologies AG

Inventor： Mark Pavier ,  Wolfram Hable ,  Angela Kessler ,  Michael Sielaff ,  Anton Pugatschow ,  Charles Rimbert-Riviere ,  Marco Sobkowiak

IPC: H01L23/498 ,  H01L23/373 ,  H01L23/31 ,  H01L23/50 ,  H01L23/00 ,  H01L23/29 ,  H01L25/18 ,  H01L21/48 ,  H01L21/56 ,  B60R16/02

CPC classification number: H01L23/3735 ,  B60R16/02 ,  H01L21/4807 ,  H01L21/4825 ,  H01L21/565 ,  H01L23/15 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49524 ,  H01L23/49531 ,  H01L23/49541 ,  H01L23/49555 ,  H01L23/49861 ,  H01L23/50 ,  H01L24/45 ,  H01L24/48 ,  H01L25/18 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45624 ,  H01L2224/48139 ,  H01L2224/48175 ,  H01L2224/4846 ,  H01L2924/00014 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/14252 ,  H01L2924/181 ,  H01L2924/2076 ,  H01L2924/00012 ,  H01L2924/206 ,  H01L2224/43848

Abstract: A package which comprises a chip carrier, at least one electronic chip mounted on the chip carrier, an electrically conductive contact structure electrically coupled with the at least one electronic chip, and a mold-type encapsulant encapsulating part of the electrically conductive contact structure, and at least part of the chip carrier and of the at least one electronic chip, wherein the chip carrier comprises a thermally conductive and electrically insulating core covered on both opposing main surfaces thereof by a respective brazed electrically conductive layer.

公开(公告)号：US10037972B2

公开(公告)日：2018-07-31

申请号：US15137062

申请日：2016-04-25

Applicant: Infineon Technologies AG

Inventor： Edward Fuergut ,  Martin Gruber ,  Wolfram Hable

IPC: H01L23/34 ,  H01L25/065 ,  H01L23/31 ,  H01L23/473 ,  H01L23/00 ,  H01L25/07 ,  H01L25/00 ,  H01L23/40

Abstract: Various embodiments provide an electronic module comprising a interposer comprising a fluid channel formed in an electrically isolating material and an electrically conductive structured layer; at least one electronic chip attached to the electrically conductive layer and in thermal contact to the fluid channel; and a molded encapsulation formed at least partially around the at least one electronic chip, wherein the electrically conductive structured layer is directly formed on the electrically isolating material.

公开(公告)号：US20180040537A1

公开(公告)日：2018-02-08

申请号：US15665574

申请日：2017-08-01

Applicant: Infineon Technologies AG

Inventor： Andreas GRASSMANN ,  Wolfram Hable ,  Juergen Hoegerl ,  Ivan Nikitin ,  Achim Strass

IPC: H01L23/473 ,  H01L21/56 ,  H01L23/433 ,  H01L21/48 ,  B60R16/02 ,  H01L23/31

Abstract: A power module which comprises a semiconductor chip, at least one cooling plate with at least one cooling channel thermally coupled to the semiconductor chip and being configured so that a coolant is guidable through the at least one cooling channel, and an encapsulant encapsulating at least part of the semiconductor chip and part of the at least one cooling channel, wherein at least part of a main surface of the cooling plate forms part of an external surface of the power module.

公开(公告)号：US11574889B2

公开(公告)日：2023-02-07

申请号：US13909133

申请日：2013-06-04

Applicant: Infineon Technologies AG

Inventor： Ottmar Geitner ,  Wolfram Hable ,  Andreas Grassmann ,  Frank Winter ,  Christian Neugirg ,  Ivan Nikitin

IPC: H01L23/48 ,  H01L23/52 ,  H01L23/00 ,  H01L23/495 ,  H01L23/373 ,  H01L23/31 ,  H01L25/00 ,  H01L23/433

Abstract: A method of manufacturing a power module comprising two substrates is provided, wherein the method comprises disposing a compensation layer of a first thickness above a first substrate; disposing a second substrate above the compensation layer; and reducing the thickness of the compensation layer from the first thickness to a second thickness after the second substrate is disposed on the compensation layer.

公开(公告)号：US20170154835A1

公开(公告)日：2017-06-01

申请号：US15432680

申请日：2017-02-14

Applicant: Infineon Technologies AG

Inventor： Christian Neugirg ,  Andreas Grassmann ,  Wolfram Hable ,  Ottmar Geitner ,  Frank Winter ,  Alexander Schwarz ,  Inpil Yoo

IPC: H01L23/373 ,  H01L21/56 ,  H01L21/48 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L23/3733 ,  H01L21/4853 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/373 ,  H01L23/49833 ,  H01L24/36 ,  H01L24/40 ,  H01L2224/40137 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/181 ,  Y10T29/4913 ,  Y10T29/49144 ,  H01L2924/00012 ,  H01L2224/37099

Abstract: An electronic module is provided, which comprises a first carrier; an electronic chip comprising at least one electronic component and arranged on the first carrier; a spacing element comprising a surface arranged on the electronic chip and being in thermal conductive connection with the at least one electronic component; a second carrier arranged on the spacing element; and a mold compound enclosing the electronic chip and the spacing element at least partially; wherein the spacing element comprises a material having a CTE value being matched with at least one other CTE.

公开(公告)号：US20150085446A1

公开(公告)日：2015-03-26

申请号：US14034669

申请日：2013-09-24

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Wolfram Hable ,  Andreas Grassmann ,  Frank Winter ,  Ottmar Geitner ,  Alexander Schwarz ,  Alexander Herbrandt

IPC: H05K1/02 ,  H05K3/32 ,  H05K1/03

CPC classification number: H05K1/021 ,  H01L21/4882 ,  H01L23/051 ,  H01L23/31 ,  H01L23/3107 ,  H01L23/3735 ,  H01L23/467 ,  H01L23/473 ,  H01L23/49833 ,  H01L2924/0002 ,  H05K1/0203 ,  H05K1/0306 ,  H05K3/32 ,  Y10T29/4913 ,  Y10T29/49146 ,  H01L2924/00

Abstract: In various embodiments, a substrate is provided. The substrate may include: a ceramic carrier having a first side and a second side opposite the first side; a first metal layer disposed over the first side of the ceramic carrier; a second metal layer disposed over the second side of the ceramic carrier; and a cooling structure formed into or over the second metal layer.

Abstract translation: 在各种实施例中，提供基板。 衬底可以包括：陶瓷载体，其具有与第一侧相对的第一侧和第二侧; 设置在陶瓷载体的第一侧上的第一金属层; 设置在陶瓷载体的第二侧上的第二金属层; 以及形成在第二金属层中或上方的冷却结构。

公开(公告)号：US10461017B2

公开(公告)日：2019-10-29

申请号：US15665574

申请日：2017-08-01

Applicant: Infineon Technologies AG

Inventor： Andreas Grassmann ,  Wolfram Hable ,  Juergen Hoegerl ,  Ivan Nikitin ,  Achim Strass

IPC: H01L23/473 ,  B60R16/02 ,  H01L21/56 ,  H01L23/31 ,  H01L23/433 ,  H01L23/46 ,  H01L21/48 ,  H01L23/373 ,  H01L23/42 ,  H01L23/00 ,  H01L25/07

Abstract: A power module which comprises a semiconductor chip, at least one cooling plate with at least one cooling channel thermally coupled to the semiconductor chip and being configured so that a coolant is guidable through the at least one cooling channel, and an encapsulant encapsulating at least part of the semiconductor chip and part of the at least one cooling channel, wherein at least part of a main surface of the cooling plate forms part of an external surface of the power module.

公开(公告)号：US09585241B2

公开(公告)日：2017-02-28

申请号：US14034669

申请日：2013-09-24

Applicant: Infineon Technologies AG

Inventor： Wolfram Hable ,  Andreas Grassmann ,  Frank Winter ,  Ottmar Geitner ,  Alexander Schwarz ,  Alexander Herbrandt

IPC: H05K7/20 ,  H05K1/02 ,  H05K3/32 ,  H01L23/31 ,  H01L23/373 ,  H01L21/48 ,  H05K1/03 ,  H01L23/467 ,  H01L23/473 ,  H01L23/498

CPC classification number: H05K1/021 ,  H01L21/4882 ,  H01L23/051 ,  H01L23/31 ,  H01L23/3107 ,  H01L23/3735 ,  H01L23/467 ,  H01L23/473 ,  H01L23/49833 ,  H01L2924/0002 ,  H05K1/0203 ,  H05K1/0306 ,  H05K3/32 ,  Y10T29/4913 ,  Y10T29/49146 ,  H01L2924/00

Abstract: In various embodiments, a substrate is provided. The substrate may include: a ceramic carrier having a first side and a second side opposite the first side; a first metal layer disposed over the first side of the ceramic carrier; a second metal layer disposed over the second side of the ceramic carrier; and a cooling structure formed into or over the second metal layer.

Abstract translation: 在各种实施例中，提供基板。 衬底可以包括：陶瓷载体，其具有与第一侧相对的第一侧和第二侧; 设置在陶瓷载体的第一侧上的第一金属层; 设置在陶瓷载体的第二侧上的第二金属层; 以及形成在第二金属层中或上方的冷却结构。

公开(公告)号：US09362193B2

公开(公告)日：2016-06-07

申请号：US13742456

申请日：2013-01-16

Applicant: Infineon Technologies AG

Inventor： Ralf Otremba ,  Josef Hoeglauer ,  Juergen Schredl ,  Xaver Schloegel ,  Wolfram Hable ,  Manfred Mengel ,  Joachim Mahler ,  Khalil Hosseini

IPC: H01L23/373 ,  H01L23/29 ,  H01L21/56 ,  H01L23/31 ,  H01L23/06 ,  H01L23/495 ,  H01L23/00

Abstract: A chip arrangement is provided, the chip arrangement, including a carrier; at least one chip electrically connected to a carrier top side; an encapsulation material at least partially surrounding the at least one chip and the carrier top side, wherein the encapsulation material is formed on one or more lateral sides of the carrier; and a ceramic material disposed on a carrier bottom side, and on at least one side of the encapsulation material.

公开(公告)号：US11862533B2

公开(公告)日：2024-01-02

申请号：US17557168

申请日：2021-12-21

Applicant: Infineon Technologies AG

Inventor： Andreas Grassmann ,  Wolfram Hable ,  Juergen Hoegerl ,  Ivan Nikitin ,  Achim Strass

IPC: H01L23/42 ,  H01L23/495 ,  H01L23/552 ,  H01L23/373 ,  H01L23/473 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/42 ,  H01L23/3735 ,  H01L23/473 ,  H01L23/49531 ,  H01L23/552 ,  H01L23/3121 ,  H01L23/49575 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L2224/291 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/1431 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2224/73265 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2224/291 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/73265 ,  H01L2224/32225 ,  H01L2224/48247 ,  H01L2924/00012 ,  H01L2224/73265 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2924/00

Abstract: A package includes: at least one electronic chip; an encapsulant encapsulating at least part of the at least one electronic chip; a shielding layer on at least part of an external surface of the encapsulant; and a first heat removal body thermally coupled to the at least one electronic chip and configured for removing thermal energy from the at least one electronic chip to a cooling fluid. The encapsulant has a surface portion that extends in a surface region extending laterally directly adjacent to the first heat removal body. The surface portion of the encapsulant delimits part of a cooling cavity configured to guide the cooling fluid. The shielding layer covers the surface portion of the encapsulant. A corresponding electronic device, method of manufacturing the package, method of manufacturing the electronic device, vehicle, and method of using the electronic device are also described.