公开(公告)号：US20240355759A1

公开(公告)日：2024-10-24

申请号：US18136775

申请日：2023-04-19

Applicant: Intel Corporation

Inventor： Phil Geng ,  Baris Bicen ,  Kai Xiao ,  Sanjoy Saha ,  Prasanna Raghavan

IPC: H01L23/00

CPC classification number: H01L23/562 ,  H01L23/3675 ,  H01L23/4006 ,  H01L2023/4081 ,  H01L2023/4087 ,  H01L23/427 ,  H01L24/32 ,  H01L24/71 ,  H01L2224/32245 ,  H01L2224/71

Abstract: Damping structures in integrated circuit (IC) devices, and techniques for forming the structures are discussed. An IC device includes, between an IC package and a socket, both a spring force and a damping structure adjacent an array of pins and corresponding lands. The damping structure may be of a dissipative, viscous, or viscoelastic material. The damping structure may be between the IC package and socket. The damping structure may be within a periphery of the socket. The damping structure may be coupled to the IC package or the socket by an adhesive or a press fit. A heatsink or a heat spreader may be coupled to the IC package over the socket.

公开(公告)号：US11322456B2

公开(公告)日：2022-05-03

申请号：US16611830

申请日：2017-06-30

Applicant: Intel Corporation

Inventor： Feras Eid ,  Venkata Suresh R. Guthikonda ,  Shankar Devasenathipathy ,  Chandra M. Jha ,  Je-Young Chang ,  Kyle Yazzie ,  Prasanna Raghavan ,  Pramod Malatkar

IPC: H05K1/18 ,  H01L23/00 ,  H01L21/50 ,  H01L23/544 ,  H01L25/065 ,  H05K1/02

Abstract: A foundation layer having a stiffener and methods of forming a stiffener are described. One or more dies are formed over the foundation layer. Each die has a front side surface that is electrically coupled to the foundation layer and a back side surface that is opposite from the front side surface. A stiffening layer (or a stiffener) is formed on the back side surface of at least one of the dies. The stiffening layer may be directly coupled to the back side surface of the one or more dies without an adhesive layer. The stiffening layer may include one or more materials, including at least one of a metal, a metal alloy, and a ceramic. The stiffening layer may be formed to reduce warpage based on the foundation layer and the dies. The one or more materials of the stiffening layer can be formed using a cold spray.

公开(公告)号：US10231338B2

公开(公告)日：2019-03-12

申请号：US14748496

申请日：2015-06-24

Applicant: INTEL CORPORATION

Inventor： Naga Sivakumar Yagnamurthy ,  Huiyang Fei ,  Pramod Malatkar ,  Prasanna Raghavan ,  Robert Nickerson

IPC: H01L23/28 ,  H01L23/538 ,  H01L25/065 ,  H05K1/18 ,  H05K1/11 ,  B29C70/84 ,  B29C70/70 ,  B29C70/88 ,  B29C37/00 ,  B29C33/00 ,  B29C69/00 ,  G11C11/401 ,  H01L23/48 ,  H01L23/498 ,  H01L25/10 ,  B29K63/00 ,  B29L31/34 ,  G11C5/04 ,  H05K1/14

Abstract: Methods of forming a package structures comprising a trench are described. An embodiment includes a first die disposed on a first substrate, and at least one interconnect structure disposed on a peripheral region of the first substrate. A molding compound is disposed on a portion of the first substrate and on the first die, wherein a trench opening is disposed in the molding compound that is located between the at least one interconnect structure and the first die.

公开(公告)号：US09633937B2

公开(公告)日：2017-04-25

申请号：US14778128

申请日：2014-12-16

Applicant: Intel Corporation

Inventor： Huiyang Fei ,  Prasanna Raghavan

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/498 ,  H01L23/13 ,  H01L23/16 ,  H01L25/065 ,  H01L25/18 ,  H01L25/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/49833 ,  H01L21/4853 ,  H01L21/565 ,  H01L23/13 ,  H01L23/16 ,  H01L23/293 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49883 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/14 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/3511 ,  H01L2924/37001 ,  H01L2924/384 ,  H01L2924/014 ,  H01L2924/00014

Abstract: The electronic package includes a substrate and an electronic component mounted to a surface of the substrate. An interposer is mounted to the surface of the substrate such that the interposer surrounds the electronic component and is electrically connected to the substrate. An over-mold covers the electronic component. In other forms, the example electronic package may be incorporated into an electronic assembly. The electronic assembly further includes a second electronic component mounted to the interposer. As an example, the second electronic component may be mounted to the interposer using solder bumps. It should be noted that any technique that is known now, or discovered in the future, may be used to mount the second electronic component to the interposer.

公开(公告)号：US20160381800A1

公开(公告)日：2016-12-29

申请号：US14748496

申请日：2015-06-24

Applicant: INTEL CORPORATION

Inventor： Naga Sivakumar Yagnamurthy ,  Huiyang Fei ,  Pramod Malatkar ,  Prasanna Raghavan ,  Robert Nickerson

IPC: H05K1/18 ,  B29C70/84 ,  B29C70/70 ,  G11C11/401 ,  B29C37/00 ,  B29C33/00 ,  B29C69/00 ,  H05K1/11 ,  B29C70/88

CPC classification number: H05K1/181 ,  B29C33/0033 ,  B29C37/0025 ,  B29C69/001 ,  B29C70/70 ,  B29C70/84 ,  B29C70/882 ,  B29K2063/00 ,  B29K2995/0005 ,  B29L2031/3481 ,  G11C5/04 ,  G11C11/401 ,  H01L23/48 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49838 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01L2924/1815 ,  H05K1/111 ,  H05K1/144 ,  H05K2201/0379 ,  H05K2201/09036 ,  H05K2201/10159 ,  H05K2203/041

Abstract: Methods of forming a package structures comprising a trench are described. An embodiment includes a first die disposed on a first substrate, and at least one interconnect structure disposed on a peripheral region of the first substrate. A molding compound is disposed on a portion of the first substrate and on the first die, wherein a trench opening is disposed in the molding compound that is located between the at least one interconnect structure and the first die.

Abstract translation: 描述形成包括沟槽的封装结构的方法。 实施例包括设置在第一基板上的第一管芯和设置在第一基板的周边区域上的至少一个互连结构。 在第一基板的一部分上和第一模具上设置模塑料，其中沟槽开口设置在位于至少一个互连结构和第一模之间的模塑料中。