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    Resistive Random Access Memory Cells Having Doped Current Limiting layers
    2.
    发明申请
    Resistive Random Access Memory Cells Having Doped Current Limiting layers 有权
    具有掺杂电流限制层的电阻随机存取存储器单元

    公开(公告)号：US20140124725A1

    公开(公告)日：2014-05-08

    申请号：US13671824

    申请日：2012-11-08

    Applicant: INTERMOLECULAR, INC.

    Inventor： David Chi ,  Vidyut Gopal ,  Minh Huu Le ,  Minh Anh Nguyen ,  Dipankar Pramanik ,  Milind Weling

    IPC: H01L45/00

    CPC classification number: H01L45/145 ,  G11C13/0007 ,  G11C2213/32 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/14 ,  H01L45/146 ,  H01L45/1616

    Abstract: Provided are semiconductor devices, such as resistive random access memory (ReRAM) cells, that include current limiting layers formed from doped metal oxides and/or nitrides. These current limiting layers may have resistivities of at least about 1 Ohm-cm. This resistivity level is maintained even when the layers are subjected to strong electrical fields and/or high temperature annealing. In some embodiments, the breakdown voltage of a current limiting layer may be at least about 8V. Some examples of such current limiting layers include titanium oxide doped with niobium, tin oxide doped with antimony, and zinc oxide doped with aluminum. Dopants and base materials may be deposited as separate sub-layers and then redistributed by annealing or may be co-deposited using reactive sputtering or co-sputtering. The high resistivity of the layers allows scaling down the size of the semiconductor devices including these layer while maintaining their performance.

    Abstract translation: 提供了诸如电阻随机存取存储器（ReRAM）单元的半导体器件，其包括由掺杂的金属氧化物和/或氮化物形成的限流层。 这些限流层可具有至少约1欧姆 - 厘米的电阻率。 即使当这些层受到强电场和/或高温退火时，也保持该电阻率水平。 在一些实施例中，限流层的击穿电压可以为至少约8V。 这种电流限制层的一些实例包括掺杂有铌的氧化钛，掺杂有锑的氧化锡和掺杂有铝的氧化锌。 掺杂剂和基材可以作为单独的子层沉积，然后通过退火重新分布，或者可以使用反应溅射或共溅射共沉积。 层的高电阻率允许在保持其性能的同时缩小包括这些层的半导体器件的尺寸。

    Silicon Texturing Formulations
    3.
    发明申请
    Silicon Texturing Formulations 审中-公开
    硅纹制剂

    公开(公告)号：US20140231704A1

    公开(公告)日：2014-08-21

    申请号：US14261739

    申请日：2014-04-25

    Applicant: Intermolecular, Inc.

    Inventor： Zhi-Wen Sun ,  Nikhil Kalyankar ,  Nitin Kumar ,  Minh Anh Nguyen ,  Sagar Vijay

    IPC: H01L31/0236

    CPC classification number: H01L31/02366 ,  C23F1/16 ,  H01L31/0236 ,  H01L31/02363 ,  Y02E10/50

    Abstract: The present disclosure includes a texture formulation that includes an aliphatic diol, an alkaline compound and water which provides a consistent textured region across a silicon surface suitable for solar cell applications. The current invention describes silicon texturing formulations that include at least one high boiling point additive. The high boiling point additive may be a derivative compound of propylene glycol or a derivative compound of ethylene glycol. Processes for texturing a crystalline silicon substrate using these formulations are also described. Additionally, a combinatorial method of optimizing the textured surface of a crystalline silicon substrate is described.

    Abstract translation: 本公开内容包括包含脂族二醇，碱性化合物和水的纹理制剂，其在适于太阳能电池应用的硅表面上提供一致的纹理区域。 本发明描述了包含至少一种高沸点添加剂的硅纹理配方。 高沸点添加剂可以是丙二醇或乙二醇的衍生化合物的衍生化合物。 还描述了使用这些制剂对晶体硅衬底进行纹理化的工艺。 另外，描述了优化结晶硅衬底的纹理表面的组合方法。

    Silicon texturing formulations
    4.
    发明授权
    Silicon texturing formulations 有权
    硅纹理配方

    公开(公告)号：US09099582B2

    公开(公告)日：2015-08-04

    申请号：US14261739

    申请日：2014-04-25

    Applicant: Intermolecular, Inc.

    Inventor： Zhi-Wen Sun ,  Nikhil Kalyankar ,  Nitin Kumar ,  Minh Anh Nguyen ,  Sagar Vijay

    IPC: C09K13/02 ,  H01L31/0236 ,  C23F1/16

    CPC classification number: H01L31/02366 ,  C23F1/16 ,  H01L31/0236 ,  H01L31/02363 ,  Y02E10/50

    Abstract: The present disclosure includes a texture formulation that includes an aliphatic diol, an alkaline compound and water which provides a consistent textured region across a silicon surface suitable for solar cell applications. The current invention describes silicon texturing formulations that include at least one high boiling point additive. The high boiling point additive may be a derivative compound of propylene glycol or a derivative compound of ethylene glycol. Processes for texturing a crystalline silicon substrate using these formulations are also described. Additionally, a combinatorial method of optimizing the textured surface of a crystalline silicon substrate is described.

    Abstract translation: 本公开内容包括包含脂族二醇，碱性化合物和水的纹理制剂，其在适于太阳能电池应用的硅表面上提供一致的纹理区域。 本发明描述了包含至少一种高沸点添加剂的硅纹理配方。 高沸点添加剂可以是丙二醇或乙二醇的衍生化合物的衍生化合物。 还描述了使用这些制剂对晶体硅衬底进行纹理化的工艺。 另外，描述了优化结晶硅衬底的纹理表面的组合方法。

    Resistive random access memory cells having doped current limiting layers
    5.
    发明授权
    Resistive random access memory cells having doped current limiting layers 有权
    具有掺杂限流层的电阻随机存取存储单元

    公开(公告)号：US08912518B2

    公开(公告)日：2014-12-16

    申请号：US13671824

    申请日：2012-11-08

    Applicant: Intermolecular, Inc.

    Inventor： David Chi ,  Vidyut Gopal ,  Minh Huu Le ,  Minh Anh Nguyen ,  Dipankar Pramanik ,  Milind Weling

    IPC: H01L29/02 ,  H01L47/00 ,  G11C11/00 ,  H01L45/00 ,  G11C13/00

    CPC classification number: H01L45/145 ,  G11C13/0007 ,  G11C2213/32 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/14 ,  H01L45/146 ,  H01L45/1616

    Abstract: Provided are semiconductor devices, such as resistive random access memory (ReRAM) cells, that include current limiting layers formed from doped metal oxides and/or nitrides. These current limiting layers may have resistivities of at least about 1 Ohm-cm. This resistivity level is maintained even when the layers are subjected to strong electrical fields and/or high temperature annealing. In some embodiments, the breakdown voltage of a current limiting layer may be at least about 8V. Some examples of such current limiting layers include titanium oxide doped with niobium, tin oxide doped with antimony, and zinc oxide doped with aluminum. Dopants and base materials may be deposited as separate sub-layers and then redistributed by annealing or may be co-deposited using reactive sputtering or co-sputtering. The high resistivity of the layers allows scaling down the size of the semiconductor devices including these layer while maintaining their performance.

    Abstract translation: 提供了诸如电阻随机存取存储器（ReRAM）单元的半导体器件，其包括由掺杂的金属氧化物和/或氮化物形成的限流层。 这些限流层可具有至少约1欧姆 - 厘米的电阻率。 即使当这些层受到强电场和/或高温退火时，也保持该电阻率水平。 在一些实施例中，限流层的击穿电压可以为至少约8V。 这种电流限制层的一些实例包括掺杂有铌的氧化钛，掺杂有锑的氧化锡和掺杂有铝的氧化锌。 掺杂剂和基材可以作为单独的子层沉积，然后通过退火重新分布，或者可以使用反应溅射或共溅射共沉积。 层的高电阻率允许在保持其性能的同时缩小包括这些层的半导体器件的尺寸。

    Electrochromic Device with Improved Transparent Conductor and Method for Forming the Same
    6.
    发明申请
    Electrochromic Device with Improved Transparent Conductor and Method for Forming the Same 审中-公开
    具有改进的透明导体的电致变色装置及其形成方法

    公开(公告)号：US20140092462A1

    公开(公告)日：2014-04-03

    申请号：US14102768

    申请日：2013-12-11

    Applicant: Intermolecular, Inc.

    Inventor： Minh Huu Le ,  Thai Cheng Chua ,  Guowen Ding ,  Minh Anh Nguyen ,  Yu Wang ,  Guizhen Zhang

    IPC: G02F1/155

    CPC classification number: G02F1/155

    Abstract: Embodiments provided herein describe electrochromic devices and methods for forming electrochromic devices. The electrochromic devices include a transparent substrate, a transparent conducting oxide layer coupled to the transparent substrate, and a layer of electrochromic material coupled to the transparent conducting oxide layer. The transparent conducting oxide layer includes indium and zinc.

    Abstract translation: 本文提供的实施例描述了用于形成电致变色器件的电致变色器件和方法。 电致变色器件包括透明衬底，耦合到透明衬底的透明导电氧化物层和耦合到透明导电氧化物层的电致变色材料层。 透明导电氧化物层包括铟和锌。

    Methods of Building Crystalline Silicon Solar Cells for Use in Combinatorial Screening
    7.
    发明申请
    Methods of Building Crystalline Silicon Solar Cells for Use in Combinatorial Screening 审中-公开
    构建用于组合筛选的结晶硅太阳能电池的方法

    公开(公告)号：US20130340805A1

    公开(公告)日：2013-12-26

    申请号：US13974433

    申请日：2013-08-23

    Applicant: INTERMOLECULAR, INC.

    Inventor： Jian Li ,  James Craig Hunter ,  Nikhil Kalyankar ,  Nitin Kumar ,  Minh Anh Nguyen

    IPC: H01L31/05

    CPC classification number: H01L31/0516 ,  H01L21/228 ,  H01L31/02363 ,  H01L31/068 ,  H01L31/0682 ,  H01L31/1804 ,  H02S50/10 ,  Y02B10/10 ,  Y02E10/547 ,  Y02P70/521

    Abstract: Embodiments of the current invention describe methods of forming different types of crystalline silicon based solar cells that can be combinatorially varied and evaluated. Examples of these different types of solar cells include front and back contact silicon based solar cells, all-back contact solar cells and selective emitter solar cells. These methodologies all incorporate the formation of site-isolated regions using a combinatorial processing tool and the use of these site-isolated regions to form the solar cell area. Therefore, multiple solar cells may be rapidly formed on a single crystalline silicon substrate for use in combinatorial methodologies. Any of the individual processes of the methods described may be varied combinatorially to test varied process conditions or materials.

    Abstract translation: 本发明的实施例描述了可以组合地改变和评估的不同类型的晶体硅基太阳能电池的形成方法。 这些不同类型的太阳能电池的实例包括正面和背面接触硅基太阳能电池，全背接触太阳能电池和选择性发射极太阳能电池。 这些方法都使用组合处理工具形成位点隔离区域，并且使用这些位置隔离区域形成太阳能电池区域。 因此，可以在用于组合方法的单晶硅衬底上快速形成多个太阳能电池。 可以组合地改变所描述的方法的任何单独过程以测试各种工艺条件或材料。

    Electrochromic device with improved transparent conductor and method for forming the same
    8.
    发明授权
    Electrochromic device with improved transparent conductor and method for forming the same 有权
    具有改进的透明导体的电致变色器件及其形成方法

    公开(公告)号：US09081245B2

    公开(公告)日：2015-07-14

    申请号：US14102768

    申请日：2013-12-11

    Applicant: Intermolecular, Inc.

    Inventor： Minh Huu Le ,  Thai Cheng Chua ,  Guowen Ding ,  Minh Anh Nguyen ,  Yu Wang ,  Guizhen Zhang

    IPC: G02F1/153 ,  G02F1/155

    CPC classification number: G02F1/155

    Abstract: Embodiments provided herein describe electrochromic devices and methods for forming electrochromic devices. The electrochromic devices include a transparent substrate, a transparent conducting oxide layer coupled to the transparent substrate, and a layer of electrochromic material coupled to the transparent conducting oxide layer. The transparent conducting oxide layer includes indium and zinc.

    Abstract translation: 本文提供的实施例描述了用于形成电致变色器件的电致变色器件和方法。 电致变色器件包括透明衬底，耦合到透明衬底的透明导电氧化物层和耦合到透明导电氧化物层的电致变色材料层。 透明导电氧化物层包括铟和锌。

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