公开(公告)号：US11854935B2

公开(公告)日：2023-12-26

申请号：US16794789

申请日：2020-02-19

Applicant: Intel Corporation

Inventor： Weston Bertrand ,  Kyle Arrington ,  Shankar Devasenathipathy ,  Aaron McCann ,  Nicholas Neal ,  Zhimin Wan

IPC: H01L23/433 ,  H01L25/065 ,  H01L23/367

CPC classification number: H01L23/433 ,  H01L23/3675 ,  H01L25/0657

Abstract: Embodiments of the present disclosure may generally relate to systems, apparatuses, techniques, and/or processes directed to packages that include stacked dies that use thermal conductivity features including thermally conductive through silicon vias (TSVs) filled with thermally conductive material located in passive areas of a first die to route heat from a first die away from a second die that is coupled with the first die. In embodiments, the first die may be referred to as a base die. Embodiments may include thermal blocks in the form of dummy dies that include TSVs at least partially filled with thermal energy conducting material such as copper, solder, or other alloy.

公开(公告)号：US11679407B2

公开(公告)日：2023-06-20

申请号：US16913986

申请日：2020-06-26

Applicant: Intel Corporation

Inventor： Kyle Jordan Arrington ,  Joseph Blaine Petrini ,  Aaron McCann ,  Shankar Devasenathipathy ,  James Christopher Matayabas, Jr. ,  Mostafa Aghazadeh ,  Jerrod Peterson

IPC: B05C1/02 ,  B05C1/00 ,  C23C28/00 ,  H05K7/20 ,  B05D1/28

CPC classification number: B05C1/02 ,  B05C1/00 ,  C23C28/00 ,  B05D1/28 ,  H05K7/2039

Abstract: To address technical problems facing silicon transient thermal management, a thermal interface material (TIM) may be used to provide improved thermal conduction. The TIM may include a liquid metal (LM) TIM, which may provide a significant reduction in thermal resistance, such as a thermal resistance RTIM≈0.01-0.025° C.-cm2/W. The LM TIM may be applied using a presoaked applicator, such as an open-cell polyurethane foam applicator that has been presoaked in a controlled amount of LM TIM. This LM presoaked applicator is then used to apply the LM TIM to one or more target thermal surfaces, thereby providing thermal and mechanical coupling between the LM TIM and the thermal surface. The resulting thermal surface and thermally conductive LM TIM may be used to improve thermal conduction for various silicon-based devices, including various high-power, high-performance system-on-chip (SoC) packages, such as may be used in portable consumer products.

公开(公告)号：US10576590B2

公开(公告)日：2020-03-03

申请号：US15358016

申请日：2016-11-21

Applicant: Intel Corporation

Inventor： Batsegaw K. Gebrehiwot ,  Joseph B. Petrini ,  Nicholas S. Haehn ,  Shankar Devasenathipathy ,  Robert L. Sankman ,  Alfredo G. Cardona

IPC: B23P19/06 ,  H05K1/02 ,  H01L23/40

Abstract: Embodiments herein relate to torque controlled drivers to simultaneously drive fasteners to secure a thermal transfer device to an integrated circuit package. In various embodiments, a torque controlled driver may include a gearbox, a driver with a torque controller and a motor with a rotating shank, a motor gear coupled concentrically with the rotating shank, a bit drive gear in rotational engagement with the motor gear to drive a bit sized to drive a fastener to secure a thermal transfer device to an integrated circuit package, where the gearbox is to hold the motor gear in a position about a motor gear rotational axis and the drive gear about a drive gear rotational axis such that the motor gear and the bit drive gear maintain rotational engagement as the motor gear rotates. Other embodiments may be described and/or claimed.

公开(公告)号：US20200051894A1

公开(公告)日：2020-02-13

申请号：US16100406

申请日：2018-08-10

Applicant: Intel Corporation

Inventor： Zhimin Wan ,  Je-Young Chang ,  Chia-Pin Chiu ,  Shankar Devasenathipathy ,  Betsegaw Kebede Gebrehiwot ,  Chandra Mohan Jha

IPC: H01L23/427 ,  H01L25/18

Abstract: Disclosed herein are thermal assemblies for multi-chip packages (MCPs), as well as related methods and devices. For example, in some embodiments, a thermal assembly for an MCP may include a heat pipe having a ring shape.

公开(公告)号：US20190067135A1

公开(公告)日：2019-02-28

申请号：US15685772

申请日：2017-08-24

Applicant: Intel Corporation

Inventor： Aastha Uppal ,  Je-Young Chang ,  Shankar Devasenathipathy ,  Joseph B. Petrini

IPC: H01L21/66 ,  G01K7/22 ,  H01L23/498

Abstract: Embodiments of the present disclosure provide techniques and configurations for inspection of a package assembly with a thermal solution, in accordance with some embodiments. In embodiments, an apparatus for inspection of a package assembly with a thermal solution may include a first fixture to house the package assembly on the apparatus, and a second fixture to house at least a portion of a thermal solution that is to be disposed on top of the package assembly. The apparatus may further include a load actuator, to apply a load to a die of the package assembly, via the thermal solution, and a plurality of sensors disposed around the thermal solution and the package assembly, to perform in situ thermal and/or mechanical measurements associated with the application of the load to the die of the package assembly. Other embodiments may be described and/or claimed.

公开(公告)号：US11502008B2

公开(公告)日：2022-11-15

申请号：US16612618

申请日：2017-06-30

Applicant: Intel Corporation

Inventor： Nicholas S. Haehn ,  Edvin Cetegen ,  Shankar Devasenathipathy

IPC: H01L25/065 ,  H01L21/48 ,  H01L23/10 ,  H01L23/538 ,  H01L23/58 ,  H01L23/00

Abstract: An integrated circuit assembly including a substrate having a surface including at least one area including contact points operable for connection with an integrated circuit die; and at least one ring surrounding the at least one area, the at least one ring including an electrically conductive material. A method of forming an integrated circuit assembly including forming a plurality of electrically conductive rings around a periphery of a die area of a substrate selected for attachment of at least one integrated circuit die, wherein the plurality of rings are formed one inside the other; and forming a plurality of contact points in the die area.

公开(公告)号：US20210125896A1

公开(公告)日：2021-04-29

申请号：US16662562

申请日：2019-10-24

Applicant: Intel Corporation

Inventor： Kyle J. Arrington ,  Aaron Mccann ,  Kelly Lofgreen ,  Aravindha R. Antoniswamy ,  Shankar Devasenathipathy

IPC: H01L23/373 ,  H01L23/532 ,  H01L21/48

Abstract: A thermal interface material may be formed comprising a liquid metal and a corrosion resistant filler material. The thermal interface material may be used in an integrated circuit assembly between at least one integrated circuit device and a heat dissipation device, wherein the corrosion resistant filler material changes the physical properties of the thermal interface material, which may prevent failure modes from occurring during the operation of the integrated circuit assembly and may assist in maintaining a bond line thickness between the at least one integrated circuit device and the heat dissipation device.

公开(公告)号：US20200303852A1

公开(公告)日：2020-09-24

申请号：US16361537

申请日：2019-03-22

Applicant: Intel Corporation

Inventor： Zhimin Wan ,  Steven A. Klein ,  Chia-Pin Chiu ,  Shankar Devasenathipathy

IPC: H01R12/70 ,  H01R12/71 ,  H01R13/24 ,  H01R13/50

Abstract: An integrated circuit (IC) socket comprising a housing with a land side, an opposing die side, and sidewalls around a perimeter of the housing. The housing comprises a first dielectric. A plurality of socket pins extends from the land side of the housing through socket pin holes in the housing over the die side of the housing. A second dielectric is within the interstitial regions between the socket pins and sidewalls of the socket pin holes. A frame structure extends around at least a portion of the perimeter of the housing, and a mesh structure is embedded within the first dielectric. The mesh structure has plurality of mesh filaments extending between the plurality of socket pin holes and coupled to the frame structure.

公开(公告)号：US20160211238A1

公开(公告)日：2016-07-21

申请号：US15062298

申请日：2016-03-07

Applicant: Intel Corporation

Inventor： Hemanth Dhavaleswarapu ,  Zhihua Li ,  Joseph Petrini ,  Steven B. Roach ,  Shankar Devasenathipathy ,  George S. Kostiew ,  Amram Eitan

IPC: H01L23/00 ,  B23K20/00 ,  B23K35/02 ,  B23K20/02 ,  B23K20/26

CPC classification number: H01L24/81 ,  B23K1/0016 ,  B23K3/04 ,  B23K3/08 ,  B23K3/085 ,  B23K20/002 ,  B23K20/023 ,  B23K20/026 ,  B23K20/26 ,  B23K35/0244 ,  B23K37/003 ,  B23K2101/42 ,  B33Y80/00 ,  H01L24/13 ,  H01L24/16 ,  H01L24/75 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/75102 ,  H01L2224/75252 ,  H01L2224/75266 ,  H01L2224/75301 ,  H01L2224/75502 ,  H01L2224/7555 ,  H01L2224/81097 ,  H01L2224/81098 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/81948 ,  H05K3/3436 ,  H05K3/3494 ,  H05K2203/04 ,  H05K2203/1121 ,  H01L2924/014 ,  H01L2924/00012

Abstract: Embodiments of a thermal compression bonding (TCB) process cooling manifold, a TCB process system, and a method for TCB using the cooling manifold are disclosed. In some embodiments, the cooling manifold comprises a pre-mixing chamber that is separated from a mixing chamber by a baffle. The baffle may comprise at least one concentric pattern formed through the baffle such that the primary cooling fluid in the pre-mixing chamber is substantially evenly distributed to the mixing chamber. The pre-mixing chamber may be coupled to a source of primary cooling fluid. The mixing chamber may have an input configured to accept the primary cooling fluid and an output to output the primary cooling fluid.

公开(公告)号：US12057369B2

公开(公告)日：2024-08-06

申请号：US18088478

申请日：2022-12-23

Applicant: Intel Corporation

Inventor： Weston Bertrand ,  Kyle Arrington ,  Shankar Devasenathipathy ,  Aaron McCann ,  Nicholas Neal ,  Zhimin Wan

IPC: H01L23/433 ,  H01L23/367 ,  H01L25/065

CPC classification number: H01L23/433 ,  H01L23/3675 ,  H01L25/0657

Abstract: Embodiments of the present disclosure may generally relate to systems, apparatuses, techniques, and/or processes directed to packages that include stacked dies that use thermal conductivity features including thermally conductive through silicon vias (TSVs) filled with thermally conductive material located in passive areas of a first die to route heat from a first die away from a second die that is coupled with the first die. In embodiments, the first die may be referred to as a base die. Embodiments may include thermal blocks in the form of dummy dies that include TSVs at least partially filled with thermal energy conducting material such as copper, solder, or other alloy.