公开(公告)号：US20130057195A1

公开(公告)日：2013-03-07

申请号：US13597663

申请日：2012-08-29

申请人： Jung Ik HA ,  Sung Min KIM ,  Seung Ki SUL ,  Yong Su HAN

发明人： Jung Ik HA ,  Sung Min KIM ,  Seung Ki SUL ,  Yong Su HAN

IPC分类号： H02K11/00 ,  H02P23/00

CPC分类号： H02P25/26 ,  H02P27/05

摘要： A single external power supply variable speed induction motor and a control method thereof are disclosed. An induction motor includes: a stator in which coils directly connected to a single-phase or 3-phase or more systematic power supply are wound; a rotor that is supported to be rotatable in the stator; a power conversion device that is attached to the rotor and controls a rotor current without connection of a separate external power supply; and a control circuit that is connected to the power conversion device and controls the power conversion device.

摘要翻译： 公开了一种外部电源变速感应电动机及其控制方法。 感应电动机包括：缠绕直接连接到单相或三相或更系统的电源的线圈的定子; 支承在所述定子中可旋转的转子; 功率转换装置，其连接到转子并控制转子电流，而不连接单独的外部电源; 以及连接到电力转换装置并控制电力转换装置的控制电路。

公开(公告)号：US20100091731A1

公开(公告)日：2010-04-15

申请号：US12578234

申请日：2009-10-13

申请人： Sung Min KIM ,  Chul Jin Kim ,  Eun Hwa Lee ,  Jung Hyeon Kim ,  Ji Hye Hur

发明人： Sung Min KIM ,  Chul Jin Kim ,  Eun Hwa Lee ,  Jung Hyeon Kim ,  Ji Hye Hur

IPC分类号： H04W72/04

CPC分类号： H04W16/14 ,  H04W24/00 ,  H04W84/12 ,  H04W88/10

摘要： A channel allocation method for use in a wireless communication environment, where Wireless Local Area Networks (WLANs) and Wireless Personal Area Networks (WPANs) coexist, includes collecting, at an access point, information on channels used by the WLANs and WPANs, determining available WLAN channels and available WPAN channels based on the channel information, allocating one of the available WLAN channels and one of the available WPAN channels to the access point, and informing the WLANs and WPANs of the allocated WLAN and WPAN channels.

摘要翻译： 一种在无线局域网（WLAN）和无线个人区域网络（WPAN）共存的无线通信环境中使用的信道分配方法包括在接入点收集关于WLAN和WPAN使用的信道的信息，确定可用 WLAN信道和可用的WPAN信道，将可用WLAN信道之一和可用WPAN信道中的一个分配给接入点，并向WLAN和WPAN通知所分配的WLAN和WPAN信道。

公开(公告)号：US20090197372A1

公开(公告)日：2009-08-06

申请号：US12345858

申请日：2008-12-30

申请人： Kwon Whan HAN ,  Chang Jun PARK ,  Seong Cheol KIM ,  Sung Min KIM ,  Hyeong Seok CHOI ,  Ha Na LEE

发明人： Kwon Whan HAN ,  Chang Jun PARK ,  Seong Cheol KIM ,  Sung Min KIM ,  Hyeong Seok CHOI ,  Ha Na LEE

IPC分类号： H01L21/00

CPC分类号： H01L24/16 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/11 ,  H01L24/17 ,  H01L24/90 ,  H01L24/97 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/05001 ,  H01L2224/05548 ,  H01L2224/13009 ,  H01L2224/13099 ,  H01L2224/90 ,  H01L2224/9202 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014

摘要： Manufacturing a wafer level stack package includes the steps of back-grinding a lower surface of a wafer including a plurality of first semiconductor chips. A support member is attached to a lower surface of the back-grinded wafer. One or more second semiconductor chips are stacked on the respective first semiconductor chips of the back-grinded wafer. First through-electrodes are formed to electrically connect the stacked first semiconductor chips and second semiconductor chips. Third semiconductor chips are attached to uppermost ones of the stacked second semiconductor chips, and the third semiconductor chips have second through-electrodes which are electrically connected to the first through-electrodes and re-distribution lines which are connected to the second through-electrodes. Outside connection terminals are attached to the re-distribution lines of the third semiconductor chips. The first semiconductor chips of a wafer level on which the second and third semiconductor chips are stacked are sawed to for semiconductor packages at a chip level.

摘要翻译： 制造晶片级堆叠封装包括对包括多个第一半导体芯片的晶片的下表面进行背面磨削的步骤。 支撑构件附接到后磨碎晶片的下表面。 一个或多个第二半导体芯片堆叠在背面研磨的晶片的相应的第一半导体芯片上。 形成第一贯通电极以电连接堆叠的第一半导体芯片和第二半导体芯片。 第三半导体芯片附着到堆叠的第二半导体芯片的最上面，第三半导体芯片具有与连接到第二贯通电极的第一贯通电极和再分配线电连接的第二贯通电极。 外部连接端子附接到第三半导体芯片的再分配线路。 第二半导体芯片和第三半导体芯片堆叠的晶片级的第一半导体芯片在芯片级被锯切以用于半导体封装。

公开(公告)号：US20090184414A1

公开(公告)日：2009-07-23

申请号：US12347020

申请日：2008-12-31

申请人： Chang Jun PARK ,  Kwon Whan HAN ,  Seong Cheol KIM ,  Sung Min KIM ,  Hyeong Seok CHOI ,  Ha Na LEE ,  Tac Keun OH ,  Sang Joon LIM

发明人： Chang Jun PARK ,  Kwon Whan HAN ,  Seong Cheol KIM ,  Sung Min KIM ,  Hyeong Seok CHOI ,  Ha Na LEE ,  Tac Keun OH ,  Sang Joon LIM

IPC分类号： H01L23/04 ,  H01L23/12 ,  H01L21/00 ,  H01L23/482 ,  H01L21/98

CPC分类号： H01L21/486 ,  H01L21/561 ,  H01L23/3114 ,  H01L23/367 ,  H01L23/552 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/94 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01059 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/3025 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00

摘要： A wafer level chip scale package having an enhanced heat exchange efficiency with an EMF shield is presented. The wafer level chip scale package includes a semiconductor chip, an insulation layer, and a metal plate. The semiconductor chip has a plurality of bonding pads on an upper face thereof. The insulation layer is disposed over the upper face of the semiconductor chip and has openings that expose some portions of the bonding pads. The metal plate covers an upper face of the insulation layer and side faces of the semiconductor chip in which the metal plate is electrically insulated from the bonding pads.

摘要翻译： 提出了具有增强的EMF屏蔽的热交换效率的晶片级芯片级封装。 晶片级芯片级封装包括半导体芯片，绝缘层和金属板。 半导体芯片在其上表面上具有多个接合焊盘。 绝缘层设置在半导体芯片的上表面上，并且具有暴露接合焊盘的一些部分的开口。 金属板覆盖绝缘层的上表面和半导体芯片的侧面，其中金属板与接合焊盘电绝缘。

公开(公告)号：US20210227925A1

公开(公告)日：2021-07-29

申请号：US17054501

申请日：2019-10-10

申请人： Sung Min KIM

发明人： Sung Min KIM

IPC分类号： A43B7/14

摘要： The present invention may provide shoes comprising an arch pad, the shoes comprising: an arch pad provided with a block seating groove that is formed in an area corresponding to the arch part of a foot; and an arch block positioned on the block seating groove and formed convexly so as to protrude from the upper surface of the arch pad such that the upper surface of the arch block pressurizes the arch part of the foot. The arch block comprises: a base portion fixed to the block seating groove; and a deformation portion which can be attached to/detached from the base portion such that the position in which the deformation portion pressurizes the arch part can be adjusted according to the position in which the deformation portion is installed on the base portion.

公开(公告)号：US20130010911A1

公开(公告)日：2013-01-10

申请号：US13335197

申请日：2011-12-22

申请人： Jung Cheol SHIN ,  Sang Kyun WOO ,  Yong Chan KIM ,  Sung Min KIM ,  Chae Joon LIM

发明人： Jung Cheol SHIN ,  Sang Kyun WOO ,  Yong Chan KIM ,  Sung Min KIM ,  Chae Joon LIM

IPC分类号： G21C17/06

CPC分类号： G21C17/06

摘要： Provided are a probe and an apparatus for measuring a thickness of an oxide layer of a fuel rod, capable of testing claddings of inner and outer fuel rods of a nuclear fuel assembly without disassembling the nuclear fuel assembly. The probe includes a fuel rod transfer region on which an eddy current sensor capable of continuously testing claddings of outer fuel rods of a fixed nuclear fuel assembly is mounted. Further, the apparatus includes a frame in which a cylinder driven in upward and downward directions is mounted, a first probe connected to one side of the cylinder in order to test claddings of outer fuel rods of a nuclear fuel assembly, and a second probe connected to the other side of the cylinder in order to test claddings of inner fuel rods of the nuclear fuel assembly.

摘要翻译： 提供了一种用于测量燃料棒的氧化物层的厚度的探针和装置，其能够在不拆卸核燃料组件的情况下测试核燃料组件的内燃料棒和外燃料棒的包层。 探头包括燃料棒传送区域，在该燃料棒传送区域上安装能够连续测试固定核燃料组件的外部燃料棒的包层的涡流传感器。 此外，该装置包括：框架，其中安装有沿上下方向驱动的气缸;第一探头，其连接到气缸的一侧，以测试核燃料组件的外部燃料棒的包层;以及第二探针， 到筒体的另一侧，以便测试核燃料组件的内燃料棒的包层。

公开(公告)号：US20110159630A1

公开(公告)日：2011-06-30

申请号：US13042684

申请日：2011-03-08

申请人： Sung Min KIM

发明人： Sung Min KIM

IPC分类号： H01L31/18

CPC分类号： H01L27/14618 ,  H01L27/14687 ,  H01L2224/13

摘要： An image sensor module includes a semiconductor chip. Photodiode units are disposed in an active region of the semiconductor chip to convert light into electric signals. Pads are disposed in a peripheral region formed around the active region and the pads are electrically connected to the photodiode units. A connecting region is formed around the peripheral region. Re-distribution layers are electrically connected to respective pads and extend to the connecting region. A transparent substrate covers the photodiode units and the pads and exposes at least a portion of the re-distribution layers. Connecting layers are electrically connected to the respective re-distribution layers and extend to a top surface of the transparent substrate. Connecting members are connected to the respective connecting layers disposed on the top surface of the transparent substrate.

摘要翻译： 图像传感器模块包括半导体芯片。 光电二极管单元设置在半导体芯片的有源区域中，以将光转换为电信号。 垫片设置在围绕有源区域形成的周边区域中，并且焊盘电连接到光电二极管单元。 围绕周边区域形成连接区域。 再分布层电连接到相应的焊盘并延伸到连接区域。 透明基板覆盖光电二极管单元和焊盘并暴露至少一部分再分布层。 连接层电连接到相应的再分布层并延伸到透明基底的顶表面。 连接构件连接到设置在透明基板的顶表面上的各个连接层。

公开(公告)号：US20080315395A1

公开(公告)日：2008-12-25

申请号：US11851741

申请日：2007-09-07

申请人： Sung Min KIM

发明人： Sung Min KIM

IPC分类号： H01L23/48 ,  H01L21/58

CPC分类号： H01L25/0657 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/3128 ,  H01L24/24 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05551 ,  H01L2224/0557 ,  H01L2224/13009 ,  H01L2224/16225 ,  H01L2224/24145 ,  H01L2224/821 ,  H01L2224/83 ,  H01L2224/9202 ,  H01L2224/92244 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2224/05552

摘要： Disclosed are a stacked semiconductor package and a method for manufacturing the same. The method for manufacturing a stacked semiconductor package includes preparing a substrate formed with a seed metal layer; laminating semiconductor chips having via holes aligned with one another on the seed metal layer to form a semiconductor chip module; and growing a conductive layer inside of the via holes using the seed metal layer to form a conductive growth layer inside of the via holes.

摘要翻译： 公开了层叠半导体封装及其制造方法。 层叠半导体封装的制造方法包括：准备形成有种子金属层的基板; 层叠具有在种子金属层上彼此对准的通孔的半导体芯片，以形成半导体芯片模块; 以及使用所述种子金属层在所述通孔内部生长导电层，以在所述通孔内部形成导电生长层。

公开(公告)号：US20160211168A1

公开(公告)日：2016-07-21

申请号：US15000425

申请日：2016-01-19

申请人： Sunhom Steve PAAK ,  Sung Min KIM

发明人： Sunhom Steve PAAK ,  Sung Min KIM

IPC分类号： H01L21/762 ,  H01L21/02 ,  H01L21/027 ,  H01L29/66 ,  H01L21/308

CPC分类号： H01L29/6656 ,  H01L21/3086 ,  H01L21/76232 ,  H01L27/1104 ,  H01L27/11524 ,  H01L27/11536

摘要： Methods for fabricating semiconductor devices are provided including sequentially stacking hardmask layers, a first sacrificial layer, and a second sacrificial layer on a substrate, forming first mandrels on the first sacrificial layer by etching the second sacrificial layer, forming first spacers on side walls of the first mandrels, forming a photoresist pattern disposed outside a region from which the first mandrels have been removed, forming second and third mandrels by etching the first sacrificial layer using the first spacers and the photoresist pattern as respective etching masks, forming second and third spacers on side walls of the second and third mandrels, forming first and second active patterns respectively having first and second pitches by etching the hardmask layer and at least a portion of the substrate, and forming a device isolation layer so that upper portions of the first and second active patterns protrude therefrom.

摘要翻译： 提供了制造半导体器件的方法，包括在衬底上顺序堆叠硬掩模层，第一牺牲层和第二牺牲层，通过蚀刻第二牺牲层在第一牺牲层上形成第一心轴，在第二牺牲层的侧壁上形成第一间隔物 第一心轴，形成设置在从其中去除第一心轴的区域之外的光致抗蚀剂图案，通过使用第一间隔物和光致抗蚀剂图案蚀刻第一牺牲层形成第二和第三心轴作为各自的蚀刻掩模，在第 第二和第三心轴的侧壁，通过蚀刻硬掩模层和至少一部分基底形成分别具有第一和第二间距的第一和第二有源图案，并且形成器件隔离层，使得第一和第二心轴的上部 活动图案突出。

公开(公告)号：US20120049385A1

公开(公告)日：2012-03-01

申请号：US13289365

申请日：2011-11-04

申请人： Chang Jun PARK ,  Kwon Whan HAN ,  Seong Cheol KIM ,  Sung Min KIM ,  Hyeong Seok CHOI ,  Ha Na LEE ,  Tac Keun OH ,  Sang Joon LIM

发明人： Chang Jun PARK ,  Kwon Whan HAN ,  Seong Cheol KIM ,  Sung Min KIM ,  Hyeong Seok CHOI ,  Ha Na LEE ,  Tac Keun OH ,  Sang Joon LIM

IPC分类号： H01L23/48 ,  H01L21/28

CPC分类号： H01L21/486 ,  H01L21/561 ,  H01L23/3114 ,  H01L23/367 ,  H01L23/552 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/94 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01059 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/3025 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00

摘要： A wafer level chip scale package having an enhanced heat exchange efficiency with an EMF shield is presented. The wafer level chip scale package includes a semiconductor chip, an insulation layer, and a metal plate. The semiconductor chip has a plurality of bonding pads on an upper face thereof. The insulation layer is disposed over the upper face of the semiconductor chip and has openings that expose some portions of the bonding pads. The metal plate covers an upper face of the insulation layer and side faces of the semiconductor chip in which the metal plate is electrically insulated from the bonding pads.

摘要翻译： 提出了具有增强的EMF屏蔽的热交换效率的晶片级芯片级封装。 晶片级芯片级封装包括半导体芯片，绝缘层和金属板。 半导体芯片在其上表面上具有多个接合焊盘。 绝缘层设置在半导体芯片的上表面上，并且具有暴露接合焊盘的一些部分的开口。 金属板覆盖绝缘层的上表面和半导体芯片的侧面，其中金属板与接合焊盘电绝缘。