公开(公告)号：US11862618B2

公开(公告)日：2024-01-02

申请号：US17369228

申请日：2021-07-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Manho Lee ,  Eunseok Song ,  Keung Beum Kim ,  Kyung Suk Oh ,  Eon Soo Jang

IPC: H01L25/18 ,  H01L23/48 ,  H01L23/528 ,  H01L23/522 ,  H01L23/00 ,  H01L27/01 ,  H01L49/02

CPC classification number: H01L25/18 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/5286 ,  H01L24/08 ,  H01L24/16 ,  H01L27/016 ,  H01L28/90 ,  H01L2224/08147 ,  H01L2224/16147

Abstract: A semiconductor package including a first semiconductor chip including a logic structure and a second semiconductor chip bonded to the first semiconductor chip may be provided. The first semiconductor chip may include signal lines on a first surface of a first semiconductor substrate and connected to the logic structure, a power delivery network on a second surface of the first semiconductor substrate, the second surface being opposite to the first surface, and penetration vias penetrating the first semiconductor substrate and connecting the power delivery network to the logic structure. The second semiconductor chip may include a capacitor layer that is on a second semiconductor substrate and is adjacent to the power delivery network.

公开(公告)号：US09842799B2

公开(公告)日：2017-12-12

申请号：US14885566

申请日：2015-10-16

Applicant: Samsung Electronics Co., Ltd

Inventor： Eon Soo Jang

IPC: H01L23/367 ,  H01L23/498 ,  H01L25/10 ,  H01L25/065

CPC classification number: H01L23/49838 ,  H01L23/367 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1438 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012

Abstract: A semiconductor package includes a lower package with a lower substrate and a lower semiconductor chip. A heat dissipation part is provided adjacent to a side of the lower package and covers a portion of the lower semiconductor chip, and an upper package is on the lower package and is laterally spaced apart from the heat dissipation part.

公开(公告)号：US11205604B2

公开(公告)日：2021-12-21

申请号：US16148471

申请日：2018-10-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae Choon Kim ,  Woo Hyun Park ,  Eon Soo Jang ,  Young Sang Cho

IPC: H01L23/36 ,  H01L23/367 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L21/48 ,  H01L21/683 ,  H01L23/13 ,  H01L25/10 ,  H01L23/498

Abstract: A semiconductor package includes a semiconductor chip having a first surface that is an active surface and a second surface opposing the first surface, a first redistribution portion disposed on the first surface, the first redistribution portion including a lower wiring layer electrically connected to the semiconductor chip, a thermal conductive layer disposed on the second surface of the semiconductor chip, a sealing layer surrounding a side surface of the semiconductor chip and a side surface of the thermal conductive layer, and a second redistribution portion disposed on the sealing layer, the second redistribution portion including a first upper wiring layer connected to the thermal conductive layer, the second redistribution portion including a second upper wiring layer electrically connected to the semiconductor chip.

公开(公告)号：US09029998B2

公开(公告)日：2015-05-12

申请号：US14243165

申请日：2014-04-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eon Soo Jang ,  Kyol Park ,  Yunhyeok Im

IPC: H01L23/02 ,  H01L23/34 ,  H01L23/12 ,  H01L23/31 ,  H01L25/10 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L23/34 ,  H01L23/12 ,  H01L23/3128 ,  H01L23/42 ,  H01L23/49811 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/29194 ,  H01L2224/2929 ,  H01L2224/29309 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1436 ,  H01L2924/1438 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package device includes a lower package including a lower semiconductor chip mounted on the lower package substrate, a lower molding compound layer disposed on the lower package substrate, a first trench formed in the lower molding compound layer to surround the lower semiconductor chip, and a second trench connected to the first trench to extend to an outer wall of the lower package, the second trench being formed in the lower molding compound layer, an upper package disposed on the lower package. The upper package includes an upper package substrate and at least one upper semiconductor chip mounted on the upper package substrate and a heat transfer member disposed between the lower package and the upper package.

Abstract translation: 半导体封装器件包括下封装，其包括安装在下封装基板上的下半导体芯片，设置在下封装基板上的下模塑复合层，形成在下模塑复合层中以围绕下半导体芯片的第一沟槽，以及 连接到所述第一沟槽以延伸到所述下封装的外壁的第二沟槽，所述第二沟槽形成在所述下模塑复合层中，所述上封装设置在所述下封装上。 上封装包括上封装基板和安装在上封装基板上的至少一个上半导体芯片和设置在下封装和上封装之间的传热构件。

公开(公告)号：US09653373B2

公开(公告)日：2017-05-16

申请号：US14976218

申请日：2015-12-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae Choon Kim ,  Heejung Hwang ,  Eon Soo Jang

IPC: H01L23/34 ,  H01L23/367 ,  H01L23/433 ,  H01L23/498 ,  H01L21/48 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L23/367 ,  H01L21/4871 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/4334 ,  H01L23/49816 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor package includes a semiconductor chip on a package substrate, a heat spreader on the semiconductor chip, a molding layer, an adhesive film between the semiconductor chip and the heat spreader, and a through-hole passing through the heat spreader. The heat spreader includes a first surface and a second surface. The molding layer covers sidewalls of the semiconductor chip and the heat spreader and exposes the first surface of the heat spreader. The adhesive film is on the second surface of the heat spreader.

公开(公告)号：US09190338B2

公开(公告)日：2015-11-17

申请号：US14188917

申请日：2014-02-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyol Park ,  Yunhyeok Im ,  Eon Soo Jang

IPC: H01L23/34 ,  H01L23/16 ,  H01L23/31 ,  H01L23/427 ,  H01L23/433 ,  H01L25/065 ,  H01L23/38

CPC classification number: H01L23/16 ,  H01L23/3128 ,  H01L23/38 ,  H01L23/4275 ,  H01L23/4334 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2924/15311 ,  H01L2924/00

Abstract: A semiconductor package includes a substrate. A lower semiconductor chip is disposed above the substrate. An upper semiconductor chip is disposed on the lower semiconductor chip. A top surface of the lower semiconductor chip at an end of the lower semiconductor chip is exposed. A heat slug disposed above the upper semiconductor chip. A molding layer is disposed between the substrate and the heat slug. The molding layer is configured to seal the lower semiconductor chip and the upper semiconductor chip. An upper spacer is disposed between the lower semiconductor chip and the heat slug. The upper spacer is disposed on the exposed surface of the lower semiconductor chip.

Abstract translation: 半导体封装包括衬底。 下半导体芯片设置在基板上方。 上半导体芯片设置在下半导体芯片上。 在下半导体芯片的一端的下半导体芯片的顶表面被暴露。 设置在上半导体芯片上方的散热片。 模制层设置在基板和热块之间。 模制层被配置为密封下半导体芯片和上半导体芯片。 上部间隔件设置在下部半导体芯片和热塞之间。 上隔板设置在下半导体芯片的暴露表面上。

公开(公告)号：US20140353813A1

公开(公告)日：2014-12-04

申请号：US14188917

申请日：2014-02-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyol Park ,  Yunhyeok Im ,  Eon Soo Jang

IPC: H01L23/34

CPC classification number: H01L23/16 ,  H01L23/3128 ,  H01L23/38 ,  H01L23/4275 ,  H01L23/4334 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2924/15311 ,  H01L2924/00

Abstract: A semiconductor package includes a substrate. A lower semiconductor chip is disposed above the substrate. An upper semiconductor chip is disposed on the lower semiconductor chip. A top surface of the lower semiconductor chip at an end of the lower semiconductor chip is exposed. A heat slug disposed above the upper semiconductor chip. A molding layer is disposed between the substrate and the heat slug. The molding layer is configured to seal the lower semiconductor chip and the upper semiconductor chip. An upper spacer is disposed between the lower semiconductor chip and the heat slug. The upper spacer is disposed on the exposed surface of the lower semiconductor chip.

Abstract translation: 半导体封装包括衬底。 下半导体芯片设置在基板上方。 上半导体芯片设置在下半导体芯片上。 在下半导体芯片的一端的下半导体芯片的顶表面被暴露。 设置在上半导体芯片上方的散热片。 模制层设置在基板和热块之间。 模制层被配置为密封下半导体芯片和上半导体芯片。 上部间隔件设置在下部半导体芯片和热塞之间。 上隔板设置在下半导体芯片的暴露表面上。