公开(公告)号：US5826567A

公开(公告)日：1998-10-27

申请号：US827650

申请日：1997-04-10

申请人： Yukio Sakaguchi ,  Noboru Nagai ,  Shigeru Sato ,  Yasuharu Sato

发明人： Yukio Sakaguchi ,  Noboru Nagai ,  Shigeru Sato ,  Yasuharu Sato

IPC分类号： F02P13/00 ,  F02B23/08 ,  F02B25/14 ,  F02B63/02 ,  F02B75/02 ,  F02F1/00 ,  F02F1/22 ,  F02F3/00 ,  F02B19/16

CPC分类号： F02F1/002 ,  F02B63/02 ,  F02F1/22 ,  F02B2075/025

摘要： In a two-stroke internal combustion engine, total hydrocarbon (THC) exhaust is decreased as a result of small structural changes and without loss of output power. A Schnurle scavenging-type combustion chamber has a hemispherical main surface and an annular skirt-like squish band, and a spark plug is disposed for a spark point to be substantially at the center of the combustion chamber. The squish band has minimized width.

摘要翻译： 在二冲程内燃机中，总碳氢化合物（THC）排气由于结构变化小而不损失输出功率而减少。 Schn + E，uml u + EE清除式燃烧室具有半球形主表面和环形裙状挤压带，火花塞设置为基本上位于燃烧室的中心。 挤压带具有最小的宽度。

公开(公告)号：US5881687A

公开(公告)日：1999-03-16

申请号：US827651

申请日：1997-04-10

申请人： Yukio Sakaguchi ,  Noboru Nagai ,  Shigeru Sato ,  Yasuharu Sato

发明人： Yukio Sakaguchi ,  Noboru Nagai ,  Shigeru Sato ,  Yasuharu Sato

IPC分类号： F02B25/14 ,  F02B25/16 ,  F02B29/08 ,  F02B75/02 ,  F02B23/00

CPC分类号： F02B25/14 ,  F02B25/16 ,  F02B2075/025

摘要： In a two-stroke internal combustion engine, output power is increased and total hydrocarbon (THC) exhaust is decreased as a result of small structural changes. An exhaust port and scavenging ports are configured and disposed such that they are open in a reduced period of the combustion cycle.

摘要翻译： 在二冲程内燃机中，由于结构变化小，输出功率增加，总碳氢化合物（THC）排气量减少。 排气口和扫气口被构造和布置成使得它们在燃烧循环的减少的时段内打开。

公开(公告)号：US5902971A

公开(公告)日：1999-05-11

申请号：US15447

申请日：1998-01-29

申请人： Yasuharu Sato ,  Yukio Sakaguchi ,  Kengo Kubo

发明人： Yasuharu Sato ,  Yukio Sakaguchi ,  Kengo Kubo

IPC分类号： F01N1/08 ,  F01N1/14 ,  F01N3/28 ,  F01N3/30 ,  F01N3/32 ,  F01N3/34 ,  F01N7/00 ,  F02B63/02 ,  F02B75/02 ,  F04B43/06

CPC分类号： F01N13/14 ,  F01N1/14 ,  F01N13/002 ,  F01N3/2882 ,  F01N3/2885 ,  F01N3/303 ,  F01N3/32 ,  F01N3/34 ,  F01N2230/04 ,  F01N2450/30 ,  F01N2470/30 ,  F01N2590/06 ,  F02B2075/025 ,  F02B63/02 ,  Y02T10/20

摘要： A muffler for a two-stroke internal combustion engine includes an expansion chamber into which exhaust gas ejected from the exhaust port of the engine is introduced. An air-supplying device is adapted to supply outside air to the expansion chamber. The air-supplying device is actuated by taking advantage of the pressure pulsation in the crank case of the engine, and is constituted by a diaphragm pump.

摘要翻译： 用于二冲程内燃机的消声器包括从引擎的排气口排出的废气被引入的膨胀室。 供气装置适于向膨胀室供应外部空气。 通过利用发动机的曲轴箱中的压力脉动来驱动供气装置，并且由隔膜泵构成。

公开(公告)号：US5738184A

公开(公告)日：1998-04-14

申请号：US773978

申请日：1996-12-26

申请人： Isao Masuda ,  Shigeru Sato ,  Yasuharu Sato ,  Kengo Kubo

发明人： Isao Masuda ,  Shigeru Sato ,  Yasuharu Sato ,  Kengo Kubo

IPC分类号： F01N1/02 ,  F01N1/08 ,  F01N1/14 ,  F01N3/20 ,  F01N3/26 ,  F01N3/28 ,  F01N3/34

CPC分类号： F01N13/002 ,  F01N1/089 ,  F01N1/14 ,  F01N3/2885 ,  F01N3/34 ,  F01N2290/04 ,  F01N2470/30 ,  F01N2590/06 ,  Y02T10/20

摘要： A muffler for a two-stroke internal combustion engine has an expansion chamber into which a rush of exhaust gas is introduced from the engine. In the vicinity of an exhaust gas inlet from the engine into the expansion chamber, the muffler has an external air intake for external air to be suctionally introduced into the expansion chamber by the rush of exhaust gas. With the external air introduced, carbon monoxide (CO) emission into the ambient is reduced.

摘要翻译： 用于二冲程内燃机的消音器具有膨胀室，从发动机引入废气的排气。 在从发动机到膨胀室的排气入口附近，消声器具有用于外部空气的外部空气入口，其通过排出气体被抽吸引入膨胀室。 随着引入外部空气，减少了一氧化碳（CO）排放到环境中。

公开(公告)号：US08154710B2

公开(公告)日：2012-04-10

申请号：US12400677

申请日：2009-03-09

申请人： Shoji Mimotogi ,  Yasuharu Sato

发明人： Shoji Mimotogi ,  Yasuharu Sato

IPC分类号： G03B27/32 ,  G03B27/52

CPC分类号： G03B27/32 ,  G03F7/705

摘要： A lithography process window analyzing method for setting a process window based on ranges of exposure amounts and focus positions, and giving evaluation of reliability of the set process window, includes setting, based on a plurality of process conditions including exposure amounts and focus positions in the performed exposure processing, analysis reliability M for process conditions including an arbitrary exposure amount and an arbitrary focus position; calculating reliability R of the process window based on the analysis reliability M concerning the process conditions included in the process window; and comparing a magnitude relation between the reliability R and a predetermined threshold and determining presence or absence of reliability of the process window according to a result of the comparison.

摘要翻译： 一种用于基于曝光量和焦点位置的范围来设置处理窗口的光刻处理窗口分析方法，以及对设置的处理窗口的可靠性的评估，包括基于多个处理条件，包括曝光量和焦点位置 执行曝光处理，包括任意曝光量和任意焦点位置的处理条件的分析可靠度M; 基于与处理窗口中包含的处理条件有关的分析可靠度M来计算处理窗口的可靠度R; 以及根据比较结果比较可靠度R和预定阈值之间的大小关系，并确定处理窗口的可靠性的存在与否。

公开(公告)号：US07907434B2

公开(公告)日：2011-03-15

申请号：US11984932

申请日：2007-11-26

申请人： Yasurou Matsuzaki ,  Yasuharu Sato ,  Tadao Aikawa ,  Masafumi Yamazaki ,  Takaaki Suzuki

发明人： Yasurou Matsuzaki ,  Yasuharu Sato ,  Tadao Aikawa ,  Masafumi Yamazaki ,  Takaaki Suzuki

IPC分类号： G11C5/06

CPC分类号： G11C5/06 ,  G11C5/00 ,  G11C5/04 ,  G11C5/063 ,  H01L25/0652 ,  H01L25/0657 ,  H01L27/105 ,  H01L2224/48091 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06562 ,  H01L2924/13091 ,  H04L12/40 ,  H04L12/4625 ,  H01L2924/00014 ,  H01L2924/00

摘要： In a semiconductor apparatus of the present invention, a plurality of circuit components are provided. A first bus interconnects the circuit components. A second bus interconnects the circuit components. A switching unit outputs a select signal that causes each circuit component to select one of the first bus and the second bus when transmitting a signal from one of the circuit components to another. The second bus has a size larger than a size of the first bus.

摘要翻译： 在本发明的半导体装置中，设置有多个电路部件。 第一条总线将电路组件互连。 第二总线将电路组件互连。 当从一个电路部件发送信号到另一个电路部件时，切换单元输出使每个电路部件选择第一总线和第二总线中的一个的选择信号。 第二个总线的大小大于第一个总线的大小。

公开(公告)号：US20080142847A1

公开(公告)日：2008-06-19

申请号：US11984932

申请日：2007-11-26

申请人： Yasurou Matsuzaki ,  Yasuharu Sato ,  Tadao Aikawa ,  Masafumi Yamazaki ,  Takaaki Suzuki

发明人： Yasurou Matsuzaki ,  Yasuharu Sato ,  Tadao Aikawa ,  Masafumi Yamazaki ,  Takaaki Suzuki

IPC分类号： H01L23/50

CPC分类号： G11C5/06 ,  G11C5/00 ,  G11C5/04 ,  G11C5/063 ,  H01L25/0652 ,  H01L25/0657 ,  H01L27/105 ,  H01L2224/48091 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06562 ,  H01L2924/13091 ,  H04L12/40 ,  H04L12/4625 ,  H01L2924/00014 ,  H01L2924/00

摘要： In a semiconductor apparatus of the present invention, a plurality of circuit components are provided. A first bus interconnects the circuit components. A second bus interconnects the circuit components. A switching unit outputs a select signal that causes each circuit component to select one of the first bus and the second bus when transmitting a signal from one of the circuit components to another. The second bus has a size larger than a size of the first bus.

摘要翻译： 在本发明的半导体装置中，设置有多个电路部件。 第一条总线将电路组件互连。 第二总线将电路组件互连。 当从一个电路部件发送信号到另一个电路部件时，切换单元输出使每个电路部件选择第一总线和第二总线中的一个的选择信号。 第二个总线的大小大于第一个总线的大小。

公开(公告)号：US20050242864A1

公开(公告)日：2005-11-03

申请号：US11055784

申请日：2005-02-11

申请人： Kenichi Kawasaki ,  Yasuharu Sato ,  Terumasa Kitahara ,  Masao Nakano ,  Masao Taguchi ,  Yoshihiro Takemae ,  Yasurou Matsuzaki ,  Koichi Nishimura ,  Yoshinori Okajima ,  Naoharu Shinozaki ,  Hiroko Douchi

发明人： Kenichi Kawasaki ,  Yasuharu Sato ,  Terumasa Kitahara ,  Masao Nakano ,  Masao Taguchi ,  Yoshihiro Takemae ,  Yasurou Matsuzaki ,  Koichi Nishimura ,  Yoshinori Okajima ,  Naoharu Shinozaki ,  Hiroko Douchi

IPC分类号： G06F13/42 ,  G11C7/10 ,  G11C7/22 ,  H03H11/26 ,  H03K5/00 ,  H03K5/13 ,  H03L7/081

CPC分类号： G11C7/106 ,  G06F13/4243 ,  G11C7/1006 ,  G11C7/1039 ,  G11C7/1051 ,  G11C7/1066 ,  G11C7/1069 ,  G11C7/1072 ,  G11C7/22 ,  G11C7/222 ,  G11C2207/002 ,  G11C2207/108 ,  H03K5/133 ,  H03K2005/00058 ,  H03L7/0805 ,  H03L7/0814

摘要： Disclosed is a semiconductor device for outputting an output signal with a given phase held relative to an external clock despite a difference in characteristic, a change in temperature, and a fluctuation in supply voltage. The semiconductor device comprises an input circuit for inputting the external clock and outputting a reference signal, an output circuit for receiving an output timing signal and outputting an output signal according to the timing of the output timing signal, and an output timing control circuit for controlling the output timing so that the output signal exhibits a given phase relative to the external clock. The output timing control circuit includes a delay circuit for delaying the reference signal by a specified magnitude and generating an output timing signal, a phase comparison circuit for comparing the phase of the output timing signal with the phase of the reference signal, and a delay control circuit for specifying the magnitude of a delay to be produced by the delay circuit according to the result of comparison performed by the phase comparison circuit.

摘要翻译： 公开了一种用于输出具有相对于外部时钟保持的给定相位的输出信号的半导体器件，尽管特性差，温度变化和电源电压波动。 该半导体器件包括用于输入外部时钟并输出参考信号的输入电路，用于接收输出定时信号并根据输出定时信号的定时输出输出信号的输出电路和用于控制的输出定时控制电路 输出定时，使得输出信号相对于外部时钟呈现给定的相位。 输出定时控制电路包括用于将参考信号延迟指定幅度并产生输出定时信号的延迟电路，用于将输出定时信号的相位与参考信号的相位进行比较的相位比较电路和延迟控制 电路，用于根据由相位比较电路执行的比较结果来指定由延迟电路产生的延迟的大小。

公开(公告)号：US06727533B2

公开(公告)日：2004-04-27

申请号：US09956973

申请日：2001-09-21

申请人： Yasurou Matsuzaki ,  Yasuharu Sato ,  Tadao Aikawa ,  Masafumi Yamazaki ,  Takaaki Suzuki

发明人： Yasurou Matsuzaki ,  Yasuharu Sato ,  Tadao Aikawa ,  Masafumi Yamazaki ,  Takaaki Suzuki

IPC分类号： H01L31112

CPC分类号： G11C5/06 ,  G11C5/00 ,  G11C5/04 ,  G11C5/063 ,  H01L25/0652 ,  H01L25/0657 ,  H01L27/105 ,  H01L2224/48091 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06562 ,  H01L2924/13091 ,  H04L12/40 ,  H04L12/4625 ,  H01L2924/00014 ,  H01L2924/00

摘要： In a semiconductor apparatus of the present invention, a plurality of circuit components are provided. A first bus interconnects the circuit components. A second bus interconnects the circuit components. A switching unit outputs a select signal that causes each circuit component to select one of the first bus and the second bus when transmitting a signal from one of the circuit components to another. The second bus has a size larger than a size of the first bus.

公开(公告)号：US06427197B1

公开(公告)日：2002-07-30

申请号：US09394891

申请日：1999-09-13

申请人： Yasuharu Sato ,  Tadao Aikawa ,  Shinya Fujioka ,  Waichiro Fujieda ,  Hitoshi Ikeda ,  Hiroyuki Kobayashi

发明人： Yasuharu Sato ,  Tadao Aikawa ,  Shinya Fujioka ,  Waichiro Fujieda ,  Hitoshi Ikeda ,  Hiroyuki Kobayashi

IPC分类号： G11C800

CPC分类号： G11C7/1072 ,  G11C7/1039

摘要： The present invention is a memory circuit for writing prescribed numbers of bits of write data, determined according to the burst length, in response to write command, comprising: a first stage for inputting, and then holding, row addresses and column addresses simultaneously with the write command; a second stage having a memory core connected to the first stage via a pipeline switch, wherein the row addresses and column addresses are decoded, and word line and sense amps are activated; a third stage for inputting the write data serially and sending the write data to the memory core in parallel; and a serial data detection circuit for generating write-pipeline control signal for making the pipeline switch conduct, after the prescribed number of bits of write data has been inputted. According to the present invention, in an FCRAM exhibiting a pipeline structure, the memory core in the second stage can be activated after safely fetching the write data in the burst length. When writing successively or reading successively, moreover, the command cycle can made short irrespective of the burst length.

摘要翻译： 本发明是一种存储电路，用于响应于写命令，写入根据突发长度确定的指定数量的写入数据，包括：第一级，用于与第一级同时输入，然后保持行地址和列地址 写命令 第二级具有经由流水线开关连接到第一级的存储器核，其中行地址和列地址被解码，字线和检测放大器被激活; 用于串行输入写入数据并且将写入数据并行地发送到存储器核心的第三级; 以及串行数据检测电路，用于在输入了规定数量的写入数据之后，产生用于使流水线开关导通的写入流水线控制信号。 根据本发明，在呈现流水线结构的FCRAM中，可以在以突发长度安全地取出写入数据之后激活第二级中的存储器核心。 此外，当连续写入或连续读取时，无论突发长度如何，命令循环可以变短。