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公开(公告)号:US20240363694A1
公开(公告)日:2024-10-31
申请号:US18686448
申请日:2022-04-26
发明人: Wang MA , Long CHEN , Jingyun CHENG , Zuyao CHEN , Hongchao WANG , Li YUAN
IPC分类号: H01L29/207 , H01L21/02 , H01L29/20 , H01L29/778
CPC分类号: H01L29/207 , H01L21/0262 , H01L21/02694 , H01L29/2003 , H01L21/0254 , H01L29/7787
摘要: The epitaxy sequentially includes from bottom to top a C-doped c-GaN high-resistance layer (11), an intrinsic u-GaN channel layer (12), an AlGaN barrier layer (13), a magnesium diffusion blocking layer (14), and a Mg-doped p-GaN cap layer (15) that are formed on a substrate (10). The magnesium diffusion blocking layer (14) includes a Mg-doped p-AlGaN layer (141). Mg in the Mg-doped p-AlGaN layer (141) is sufficiently passivated to in the Mg-H bond form, to reduce the activity of Mg. A doping concentration of Mg in the Mg-doped p-AlGaN layer (141) is greater than that of Mg in the Mg-doped p-GaN cap layer (15). A specific concentration difference of Mg is formed between them, so that Mg in the Mg-doped p-GaN cap layer (15) can be effectively blocked from diffusing downward into the AlGaN barrier layer (13) and the intrinsic u-GaN channel layer (12), thereby improving conducting performance of the device.
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2.
公开(公告)号:US20240347604A1
公开(公告)日:2024-10-17
申请号:US18754464
申请日:2024-06-26
申请人: NGK INSULATORS, LTD.
IPC分类号: H01L29/20 , H01L21/02 , H01L21/66 , H01L29/207
CPC分类号: H01L29/2003 , H01L21/02362 , H01L22/26 , H01L29/207
摘要: A Group-III element nitride semiconductor substrate includes a first surface and a second surface. A minimum value of a specific resistance in the first surface is 1×107 Ω·cm or more, and the minimum value of the specific resistance in the first surface is 0.01 or more times as large as a maximum value of the specific resistance in the first surface.
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公开(公告)号:US20240339492A1
公开(公告)日:2024-10-10
申请号:US18618394
申请日:2024-03-27
发明人: Yoshinobu Narita
IPC分类号: H01L29/06 , H01L29/20 , H01L29/207
CPC分类号: H01L29/0603 , H01L29/2003 , H01L29/207
摘要: A multilayered substrate comprises: an underlying substrate; and a gallium nitride layer epitaxially grown above the underlying substrate and comprising gallium nitride containing silicon; the gallium nitride layer having a top surface with a radius of 50 mm or more, the gallium nitride layer having a thickness of 4 μm or more, wherein a silicon concentration on the top surface of the gallium nitride layer has a distribution in which an outer circumferential silicon concentration at a radial position 10 mm from an edge of the top surface is higher than a central silicon concentration at a center of the top surface, the central silicon concentration is 4×1015 cm−3 or more and less than 2×1016 cm−3, and an outer circumferential silicon contamination concentration, which is an excess of the outer circumferential silicon concentration from the central silicon concentration, is 1.2×1015 cm−3 or less.
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4.
公开(公告)号:US11967642B2
公开(公告)日:2024-04-23
申请号:US17465881
申请日:2021-09-03
IPC分类号: H01L29/778 , H01L21/02 , H01L23/29 , H01L23/31 , H01L29/20 , H01L29/205 , H01L29/207 , H01L29/66
CPC分类号: H01L29/7787 , H01L21/0254 , H01L21/02576 , H01L21/02579 , H01L23/291 , H01L23/3171 , H01L29/2003 , H01L29/205 , H01L29/207 , H01L29/66462
摘要: A semiconductor structure includes a buffer layer, a channel layer, a barrier layer, a doped compound semiconductor layer, and a composition gradient layer. The buffer layer is disposed on a substrate, the channel layer is disposed on the buffer layer, the barrier layer is disposed on the channel layer, the doped compound semiconductor layer is disposed on the barrier layer, and the composition gradient layer is disposed between the barrier layer and the doped compound semiconductor layer. The barrier layer and the composition gradient layer include a same group III element and a same group V element, and the atomic percentage of the same group III element in the composition gradient layer is gradually increased in the direction from the barrier layer to the doped compound semiconductor layer. A high electron mobility transistor and a fabrication method thereof are also provided.
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公开(公告)号:US11923422B2
公开(公告)日:2024-03-05
申请号:US17027712
申请日:2020-09-22
发明人: Ming-Shien Hu , Chien-Jen Sun , I-Ching Li , Wen-Ching Hsu
IPC分类号: H01L29/207 , H01L29/20 , H01L29/36 , H01L29/778 , H01L29/10
CPC分类号: H01L29/207 , H01L29/365 , H01L29/1075 , H01L29/2003 , H01L29/7786
摘要: A semiconductor device includes a substrate, an initial layer, and a superlattice stack. The initial layer is located on the substrate and includes aluminum nitride (AlN). The superlattice stack is located on the initial layer and includes a plurality of first films, a plurality of second films and at least one doped layer, and the first films and the second films are alternately stacked on the initial layer, wherein the at least one doped layer is arranged in one of the first films and the second films, and dopants of the at least one doped layer are selected from a group consisting of carbon, iron, and the combination thereof.
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公开(公告)号:US11887848B2
公开(公告)日:2024-01-30
申请号:US17046714
申请日:2019-04-10
申请人: AIXTRON SE
IPC分类号: H01L21/02 , C23C16/02 , C23C16/30 , C30B25/16 , C30B25/18 , C30B29/40 , H01L29/207 , H01L29/66 , H01L29/778 , H01L29/20 , H01L29/205
CPC分类号: H01L21/02576 , C23C16/0218 , C23C16/303 , C30B25/165 , C30B25/183 , C30B29/403 , H01L21/0254 , H01L21/0262 , H01L21/02381 , H01L21/02458 , H01L21/02502 , H01L29/207 , H01L29/66462 , H01L29/7786 , H01L29/2003 , H01L29/205
摘要: A nucleation layer comprised of group III and V elements is directly deposited onto the surface of a substrate made of a group IV element. Together with a first gaseous starting material containing a group III element, a second gaseous starting material containing a group V element is introduced at a process temperature of greater than 500° C. into a process chamber containing the substrate. It is essential that at least at the start of the deposition process of the nucleation layer, a third gaseous starting material containing a group IV element is fed into the process chamber, together with the first and second gaseous starting material. The third gaseous starting material develops an n-doping effect in the deposited III-V crystal, which causes a decrease in damping at a dopant concentration of less than 1×1018 cm−3.
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公开(公告)号:US11869963B2
公开(公告)日:2024-01-09
申请号:US17733009
申请日:2022-04-29
发明人: John Twynam , Albert Birner , Helmut Brech
IPC分类号: H01L29/778 , H01L21/02 , H01L21/265 , H01L29/04 , H01L29/06 , H01L29/10 , H01L29/20 , H01L29/205 , H01L29/207 , H01L29/32 , H01L29/66
CPC分类号: H01L29/7786 , H01L21/0254 , H01L21/26546 , H01L29/04 , H01L29/0684 , H01L29/1029 , H01L29/2003 , H01L29/205 , H01L29/207 , H01L29/32 , H01L29/66462
摘要: A semiconductor device includes a support substrate having a first surface capable of supporting the epitaxial growth of at least one III-V semiconductor and a second surface opposing the first surface, at least one mesa positioned on the first surface, each mesa including an epitaxial III-V semiconductor-based multi-layer structure on the first surface of the support substrate, the III-V semiconductor-based multi-layer structure forming a boundary with the first surface and a parasitic channel suppression region positioned laterally adjacent the boundary.
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公开(公告)号:US11804544B2
公开(公告)日:2023-10-31
申请号:US17575655
申请日:2022-01-14
发明人: Shin-Chuan Huang , Chih-Tung Yeh , Chun-Ming Chang , Bo-Rong Chen , Wen-Jung Liao , Chun-Liang Hou
IPC分类号: H01L29/778 , H01L29/66 , H01L21/265 , H01L29/205 , H01L29/20 , H01L29/207 , H01L29/423 , H01L29/417 , H01L21/28
CPC分类号: H01L29/7786 , H01L21/26546 , H01L29/2003 , H01L29/205 , H01L29/207 , H01L29/66462 , H01L21/2654 , H01L21/28264 , H01L29/41766 , H01L29/4236
摘要: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.
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公开(公告)号:US20230343830A1
公开(公告)日:2023-10-26
申请号:US18306341
申请日:2023-04-25
发明人: Boram KIM , Jongseob KIM , Woochul JEON , Joonyong KIM , Junhyuk PARK , Jaejoon OH , Sunkyu HWANG , Injun HWANG
IPC分类号: H01L29/15 , H01L29/20 , H01L29/207 , H01L29/778
CPC分类号: H01L29/157 , H01L29/2003 , H01L29/207 , H01L29/7786
摘要: Provided are a nitride semiconductor buffer structure and a semiconductor device including the same. The buffer structure may include a plurality of buffer layers between a substrate and an active layer. The active layer may include a nitride semiconductor. The plurality of buffer layers may be stacked on each other on the substrate. Each of the plurality of buffer layers may have a super lattice structure and may include a doped nitride semiconductor. The plurality of buffer layers may have different compositions from each other. Adjacent buffer layers, among the plurality of buffer layers, may have different doping concentrations from each other.
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10.
公开(公告)号:US20230207323A1
公开(公告)日:2023-06-29
申请号:US18116000
申请日:2023-03-01
发明人: Travis J. Anderson , James C. Gallagher , Marko J. Tadjer , Alan G. Jacobs , Boris N. Feigelson
IPC分类号: H01L21/265 , H01L29/20 , H01L29/207 , H01L21/285 , H01L29/45 , H01L21/266 , H01L21/324 , H01L29/36
CPC分类号: H01L21/26546 , H01L29/2003 , H01L29/207 , H01L21/28575 , H01L29/452 , H01L21/266 , H01L21/3245 , H01L29/36
摘要: A method for activating implanted dopants and repairing damage to dopant-implanted GaN to form n-type or p-type GaN. A GaN substrate is implanted with n- or p-type ions and is subjected to a high-temperature anneal to activate the implanted dopants and to produce planar n- or p-type doped areas within the GaN having an activated dopant concentration of about 1018-1022 cm−3. An initial annealing at a temperature at which the GaN is stable at a predetermined process temperature for a predetermined time can be conducted before the high-temperature anneal. A thermally stable cap can be applied to the GaN substrate to suppress nitrogen evolution from the GaN surface during the high-temperature annealing step. The high-temperature annealing can be conducted under N2 pressure to increase the stability of the GaN. The annealing can be conducted using laser annealing or rapid thermal annealing (RTA).
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