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    ERROR VECTOR READOUT FROM A MEMORY DEVICE
    92.
    发明申请
    ERROR VECTOR READOUT FROM A MEMORY DEVICE 有权
    错误的向量从存储器设备中读取

    公开(公告)号：US20160328285A1

    公开(公告)日：2016-11-10

    申请号：US14724901

    申请日：2015-05-29

    Applicant: International Business Machines Corporation

    Inventor： Michael B. Healy ,  Hillery C. Hunter ,  Charles A. Kilmer ,  Kyu-hyoun Kim ,  Warren E. Maule

    IPC: G06F11/10 ,  G06F3/06

    CPC classification number: G06F11/1008 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0673 ,  G06F11/08 ,  G06F11/1032 ,  G06F11/1048 ,  G06F11/106 ,  G06F11/1072 ,  G06F11/1076 ,  G11C7/1006 ,  G11C7/1051 ,  G11C29/52 ,  G11C2029/0411

    Abstract: A memory management system and method of managing output data resulting from a memory device storing raw data and error correction coding (ECC) bits are described. The system includes a controller to receive a read command and control a memory device based on the read command, the memory device to store raw data and error correction coding (ECC) bits and output the raw data and the ECC bits corresponding with memory addresses specified in the read command, and an ECC decoder to output an error vector associated with the memory addresses based on the raw data and the ECC bits corresponding with the memory addresses output by the memory device, the error vector associated with the memory addresses indicating errors in the raw data corresponding with the memory addresses. The system also includes a multiplexer (MUX) to output the error vector based on a selection indicated in the read command.

    Abstract translation: 描述了存储管理系统和管理由存储原始数据和纠错编码（ECC）位的存储器件产生的输出数据的方法。 该系统包括控制器，用于接收读取命令并基于读取命令控制存储器件，存储器件存储原始数据和纠错编码（ECC）位，并输出与指定的存储器地址对应的原始数据和ECC位 在读取命令中，以及ECC解码器，基于原始数据和与存储器件输出的存储器地址相对应的ECC位来输出与存储器地址相关联的错误向量，与存储器地址相关联的错误向量指示错误 原始数据对应于存储器地址。 该系统还包括多路复用器（MUX），用于根据读取命令中指示的选择来输出误差向量。

    IMPLEMENTING DRAM ROW HAMMER AVOIDANCE
    94.
    发明申请
    IMPLEMENTING DRAM ROW HAMMER AVOIDANCE 审中-公开
    实施DRAM方式避免危害

    公开(公告)号：US20160180899A1

    公开(公告)日：2016-06-23

    申请号：US14573142

    申请日：2014-12-17

    Applicant: International Business Machines Corporation

    Inventor： Charles A. Kilmer ,  Anil B. Lingambudi ,  Warren E. Maule ,  Diyanesh B.C. Vidyapoornachary

    IPC: G11C7/10 ,  G11C11/406

    CPC classification number: G11C7/103 ,  G06F13/1668 ,  G11C11/408

    Abstract: A method and apparatus for implementing row hammer avoidance in a dynamic random access memory (DRAM) in a computer system. Hammer detection logic identifies a hit count of repeated activations at a specific row in the DRAM. Monitor and control logic receiving an output of the hammer detection logic compares the identified hit count with a programmable threshold value. Responsive to a specific count as determined by the programmable threshold value, the monitor and control logic captures the address where a selected row hammer avoidance action is provided.

    Abstract translation: 一种用于在计算机系统中的动态随机存取存储器（DRAM）中实现行锤避免的方法和装置。 锤检测逻辑识别DRAM中特定行重复激活的命中计数。 接收锤检测逻辑的输出的监视和控制逻辑将识别的命中计数与可编程阈值进行比较。 响应于由可编程阈值确定的特定计数，监视和控制逻辑捕获提供所选行锤回避动作的地址。

    SECURING THE CONTENTS OF A MEMORY DRIVE
    98.
    发明申请
    SECURING THE CONTENTS OF A MEMORY DRIVE 有权
    保护内存驱动器的内容

    公开(公告)号：US20140223117A1

    公开(公告)日：2014-08-07

    申请号：US13792720

    申请日：2013-03-11

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： Michele M. Franceschini ,  Hillery C. Hunter ,  Ashish Jagmohan ,  Charles A. Kilmer ,  Kyu-hyoun Kim ,  Luis A. Lastras-Montano ,  Warren E. Maule

    IPC: G06F12/02

    CPC classification number: G06F12/16 ,  G06F12/1483 ,  G06F21/00 ,  G06F21/62 ,  G06F2221/2143

    Abstract: A memory device may be equipped with quick erase capability to secure the contents of the memory device. The quick erase capability may effectively permanently disable access to data stored in the memory device instantaneously upon a command being issued, making all previous data written to the memory device unreadable. The quick erase capability may allow use of the memory device for new write operations and for reading the newly written data immediately once the erase command is received and executed. The quick erase capability may begin a physical erase process of data not newly written without altering other aspects of the quick erase. Aspects may be accomplished with one or more bits per row in a memory device.

    Abstract translation: 存储器件可以配备快速擦除功能以保护存储器件的内容。 快速擦除功能可以在发出命令时立即有效地永久地禁止存储在存储设备中的数据，使得写入存储器设备的所有以前的数据不可读。 快速擦除功能可以允许使用存储器件进行新的写入操作，并且一旦接收和执行擦除命令就立即读取新写入的数据。 快速擦除功能可以开始不新写的数据的物理擦除过程，而不会改变快速擦除的其他方面。 方面可以用存储器件中的每行一个或多个比特来完成。

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