摘要:
The present invention provides an electro-chemical deposition system that is designed with a flexible architecture that is expandable to accommodate future designs and gap fill requirements and provides satisfactory throughput to meet the demands of other processing systems. The electro-chemical deposition system generally comprises a mainframe having a mainframe wafer transfer robot, a loading station disposed in connection with the mainframe, one or more processing cells disposed in connection with the mainframe, and an electrolyte supply fluidly connected to the one or more electrical processing cells. Preferably, the electro-chemical deposition system includes an edge bead removal/spin-rinse-dry (EBR/SRD) station disposed on the mainframe adjacent the loading station, a rapid thermal anneal chamber attached to the loading station, a seed layer repair station disposed on the mainframe, and a system controller for controlling the electro-chemical deposition process and the components of the electro-chemical deposition system.
摘要:
The present invention generally provides an electro-chemical deposition system that is designed with a flexible architecture that is expandable to accommodate future designs rules and gap fill requirements and provides satisfactory throughput to meet the demands of other processing systems. The electro-chemical deposition system generally comprises a front-end loading station, a mainframe including one or more processing cells, and an electrolyte replenishing system fluidly connected to the one or more electrical processing cells. The electrolyte replenishing system comprises a main electrolyte supply tank and an analyzer module and dosing module coupled thereto. The analyzer module includes one or more chemical analyzers to monitor the concentrations of various chemicals in the main electrolyte supply tank. Information provided by the analyzer module is transmitted via a central control system to the dosing module. Source tanks in the dosing module communicate with the main supply tank to deliver the desired proportions of chemicals thereto. Preferably, the electrolyte analysis is performed continuously during processing to provide real-time data and electrolyte adjustments.
摘要:
A dry-in/dry-out system is disclosed for wafer electroless plating. The system includes an upper zone for wafer ingress/egress and drying operations. Proximity heads are provided in the upper zone to perform the drying operations. The system also includes a lower zone for electroless plating operations. The lower zone includes an electroless plating apparatus that implements a wafer submersion by fluid upwelling method. The upper and lower zones of the system are enclosed by a dual-walled chamber, wherein the inner wall is a chemically inert plastic and the outer wall is a structural metal. The system interfaces with a fluid handling system which provides the necessary chemistry supply and control for the system. The system is ambient controlled. Also, the system interfaces with an ambient controlled managed transfer module (MTM).
摘要:
A number of apertures are defined within a wall of a chamber defined to maintain an electrolyte solution. A cation exchange membrane is disposed within the chamber over the number of apertures. The electrolyte solution pressure within the chamber causes the cation exchange membrane to extend through the apertures beyond an outer surface of the chamber. A cathode is disposed within the chamber. The cathode is maintained at a negative bias voltage relative to a top surface of a wafer to be planarized. When the top surface of the wafer is brought into proximity of the cation exchange membrane extending through the apertures, and a deionized water layer is disposed between the top surface of the wafer and the cation exchange membrane, a cathode half-cell is established such that metal cations are liberated from the top surface of the wafer and plated on the cathode in the chamber.
摘要:
A semiconductor wafer electroless plating apparatus includes a platen and a fluid bowl. The platen has a top surface defined to support a wafer, and an outer surface extending downward from a periphery of the top surface to a lower surface of the platen. The fluid bowl has an inner volume defined by an interior surface so as to receive the platen, and wafer to be supported thereon, within the inner volume. A seal is disposed around the interior surface of the fluid bowl so as to form a liquid tight barrier when engaged between the interior surface of the fluid bowl and the outer surface of the platen. A number of fluid dispense nozzles are positioned to dispense electroplating solution within the fluid bowl above the seal so as to rise up and flow over the platen, thereby flowing over the wafer when present on the platen.
摘要:
A method for forming copper on a substrate including inputting a copper source solution into a mixer, inputting a reducing solution into the mixer, mixing copper source solution and the reducing solution to form a plating solution having a pH of greater than about 6.5 and applying the plating solution to a substrate, the substrate including a catalytic layer wherein applying the plating solution to the substrate includes forming a catalytic layer, maintaining the catalytic layer in a controlled environment and forming copper on the catalytic layer. A system for forming copper structures is also disclosed.
摘要:
Embodiments of the invention may further provide an electrochemical plating cell. The cell includes a fluid basin configured to contain an electrolyte plating solution, a fluid tank in fluid communication with the fluid basin and being configured to supply the electrolyte plating solution thereto, and an electrolyte solution stabilization device in fluid communication with the fluid tank. The stabilization device includes a fluid container having a fluid inlet and a fluid outlet, and an absorbent material positioned in the fluid container in a fluid path between the fluid inlet and the fluid outlet, wherein the absorbent material is configured to leach a solution additive into the electrolyte plating solution to maintain the solution additive within a processing window during an electrochemical plating process.
摘要:
Back-End of Line (BEoL) interconnect structures, and methods for their manufacture, are provided. The structures are characterized by narrower conductive lines and reduced overall dielectric constant values. Conformal diffusion barrier layers, and selectively formed capping layers, are used to isolate the conductive lines and vias from surrounding dielectric layers in the interconnect structures. The methods of the invention employ techniques to narrow the openings in photoresist masks in order to define narrower vias. More narrow vias increase the amount of misalignment that can be tolerated between the vias and the conductive lines.
摘要:
A semiconductor wafer electroless plating apparatus includes a platen and a fluid bowl. The platen has a top surface defined to support a wafer, and an outer surface extending downward from a periphery of the top surface to a lower surface of the platen. The fluid bowl has an inner volume defined by an interior surface so as to receive the platen, and wafer to be supported thereon, within the inner volume. A seal is disposed around the interior surface of the fluid bowl so as to form a liquid tight barrier when engaged between the interior surface of the fluid bowl and the outer surface of the platen. A number of fluid dispense nozzles are positioned to dispense electroplating solution within the fluid bowl above the seal so as to rise up and flow over the platen, thereby flowing over the wafer when present on the platen.
摘要:
A method for producing a normalized surface on a substrate for a chemical mechanical planarization process is provided. The method initiates with grinding a surface of the substrate with a first surface associated with a first planarization length. The method includes planarizing the surface of the substrate with a second surface associated with a second planarization length. Here, the second planarization length being less than the first planarization length. A system for processing a semiconductor substrate is also provided.