公开(公告)号：US06706618B2

公开(公告)日：2004-03-16

申请号：US10206214

申请日：2002-07-29

申请人： Toru Takisawa ,  Takao Yonehara ,  Kenji Yamagata

发明人： Toru Takisawa ,  Takao Yonehara ,  Kenji Yamagata

IPC分类号： H01L2176

CPC分类号： H01L21/67092 ,  H01L21/2007

摘要： The spaces in chuck grooves 3a and 3b are evacuated to chuck the entire surface of a wafer 1 to the chuck surface of a wafer support table 3 and curve the wafer 1. A wafer 2 is horizontally opposed to the wafer 1, and the center of the wafer 2 is pressed by a press pin 6a. The centers of the two wafers 1 and 2 are contacted, and the contact portion gradually spreads to the vicinity of the periphery of a central portion 3c and takes a substantially circular shape. After that, the chuck by the chuck grooves 3a is stopped. Consequently, the wafer 1 flattens, and the entire surfaces of the wafers 1 and 2 are contacted.

摘要翻译： 吸盘槽3a和3b中的空间被抽真空以将晶片1的整个表面吸附到晶片支撑台3的卡盘表面并使晶片1弯曲。晶片2与晶片1水平相对， 晶片2被压销6a按压。 两个晶片1和2的中心接触，并且接触部分逐渐扩展到中心部分3c的周边附近并呈现大致圆形。 之后，由卡盘槽3a卡住停止。 因此，晶片1变平，晶片1和2的整个表面接触。

公开(公告)号：US06326279B1

公开(公告)日：2001-12-04

申请号：US09532079

申请日：2000-03-21

申请人： Yasuo Kakizaki ,  Takao Yonehara ,  Nobuhiko Sato

发明人： Yasuo Kakizaki ,  Takao Yonehara ,  Nobuhiko Sato

IPC分类号： H01L2176

CPC分类号： H01L21/76259

摘要： To lessen the number of steps and reduce cost in the manufacture of high-quality SOI substrate, a process for producing a semiconductor article comprises the steps of forming a porous semiconductor layer at at least one surface of a first substrate, forming a non-porous single-crystal semiconductor layer on the porous semiconductor layer, bonding the first substrate to a second substrate with the former's non-porous single-crystal semiconductor layer facing the latter in contact, to form a bonded structure, and dividing the bonded structure at the porous semiconductor layer, wherein the process further comprises the step of previously forming on the one surface of the first substrate an epitaxial silicon layer in a thickness at least n-times (n≧2) the thickness of the porous semiconductor layer.

摘要翻译： 为了减少步骤数量并降低制造高质量SOI衬底的成本，制造半导体产品的方法包括以下步骤：在第一衬底的至少一个表面上形成多孔半导体层，形成无孔 在多孔半导体层上形成单晶半导体层，将第一衬底与第二衬底接合，使前者的无孔单晶半导体层面向后面的非多孔单晶半导体层接触，形成接合结构，并将接合结构分为多孔 半导体层，其中所述工艺还包括以下步骤：在所述第一衬底的所述一个表面上形成厚度至少为所述多孔半导体层的厚度的n倍（n≥2）的厚度的外延硅层。

公开(公告)号：US5755914A

公开(公告)日：1998-05-26

申请号：US675844

申请日：1996-07-05

申请人： Takao Yonehara

发明人： Takao Yonehara

IPC分类号： H01L21/02 ,  H01L21/20 ,  H01L27/12

CPC分类号： H01L21/2007 ,  H01L2224/83894 ,  Y10S148/012 ,  Y10S148/135

摘要： A semiconductor substrate comprises a plurality of substrates to be bonded, wherein a bond promotion layer into which silicon atoms are implanted is provided in an interface between the substrates to be bonded, and the substrates are bonded to each other with the interposition of the bond promotion layer.

摘要翻译： 半导体衬底包括多个待接合的衬底，其中在待结合的衬底之间的界面中提供注入有硅原子的键促进层，并且通过插入键促进来将衬底彼此接合 层。\！

公开(公告)号：US5463975A

公开(公告)日：1995-11-07

申请号：US90626

申请日：1993-07-12

申请人： Takao Yonehara

发明人： Takao Yonehara

IPC分类号： C30B25/00 ,  C30B23/02 ,  C30B25/02 ,  C30B25/10 ,  C30B25/18 ,  C30B33/00 ,  C30B33/02 ,  H01L21/02 ,  H01L21/20 ,  H01L21/205 ,  H01L21/84 ,  H01L27/12 ,  C30B1/08

CPC分类号： C30B25/18 ,  C30B23/02 ,  C30B25/02 ,  C30B25/105 ,  H01L21/0237 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/02647

摘要： A process for producing a crystal comprises the step of applying crystal forming treatment on a light-transmissive substrate having a non-nucleation surface (S.sub.NDS) of a small nucleation density and a nucleation surface (S.sub.NDL) of a nucleation density (ND.sub.L) greater than the nucleation density (N.sub.DS) of said non-nucleation surface (S.sub.NDS) and formed of an amorphous material (M.sub.L) different from the material (M.sub.S) forming the non-nucleation surface (S.sub.NDS) at a small area sufficient to effect crystal growth from only a single nucleus to form a single crystal nucleus on the nucleation surface (S.sub.NDL), thereby growing a single crystal from the single nucleus, and the step of reducing the crystal defects of the crystal in the vicinity of the interface with the substrate by irradiation of light from the side of the substrate.

摘要翻译： 制造晶体的方法包括以下步骤：对具有小成核密度的非成核面（SNDS）和成核密度（NDL）的成核面（SNDL）的透光性基板进行结晶化处理， 所述非成核表面（SNDS）的成核密度（NDS）由不同于形成非成核表面（SNDS）的材料（MS）的非晶材料（ML）形成，并且在不足以实现晶体生长的小面积上形成 仅在核成核面（SNDL）上形成单晶核，由此从单个核生长单晶，以及通过照射降低与基板界面附近的晶体的晶体缺陷的步骤 的光从基板的一侧。

公开(公告)号：US5201681A

公开(公告)日：1993-04-13

申请号：US848727

申请日：1992-03-09

申请人： Masahiko Okunuki ,  Akira Suzuki ,  Isamu Shimoda ,  Tetsuya Kaneko ,  Takeo Tsukamoto ,  Toshihiko Takeda ,  Takao Yonehara ,  Takeshi Ichikawa

发明人： Masahiko Okunuki ,  Akira Suzuki ,  Isamu Shimoda ,  Tetsuya Kaneko ,  Takeo Tsukamoto ,  Toshihiko Takeda ,  Takao Yonehara ,  Takeshi Ichikawa

IPC分类号： H01J1/304 ,  H01J3/02 ,  H01J9/02 ,  H01J31/12

CPC分类号： H01J9/025 ,  H01J1/3042 ,  H01J3/022 ,  H01J31/127 ,  H01J2201/30446

摘要： A method of emitting electrons by applying a voltage between a voltage application electrode and a target to be irradiated with the electrons emitted from an electron emission electrode with a conical portion in an electron emission device. The voltage application electrode is formed to oppose the electron emission electrode so as to sandwich an insulating layer therebetween and the target. A charge of the electron emission electrode which is lost by electron emission during an electron emission operation is supplied after the electron emission operation is completed.

摘要翻译： 通过在电子发射装置中通过在电压施加电极和被电子发射电子发射的电子与电子发射电极发射的锥形部分之间施加电压来照射电子的方法。 电压施加电极形成为与电子发射电极相对以在其间夹有绝缘层和靶。 在电子发射操作完成之后，供给在电子发射操作期间被电子发射损失的电子发射电极的电荷。

公开(公告)号：US4999313A

公开(公告)日：1991-03-12

申请号：US528916

申请日：1990-05-29

申请人： Shiro Arikawa ,  Takao Yonehara

发明人： Shiro Arikawa ,  Takao Yonehara

IPC分类号： H01L21/20 ,  H01L21/761 ,  H01L21/762

CPC分类号： H01L21/02381 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/761 ,  H01L21/762 ,  Y10S117/913 ,  Y10S148/15 ,  Y10S148/152 ,  Y10S257/928

摘要： There is provided a semiconductor article together with a process for producing the same which article has a plurality of semiconductor single crystal regions comprising a semiconductor single crystal region of one electroconductive type and a semiconductor single crystal region of the opposite electroconductive type on the same insulator substrate. At least the semiconductor single crystal region of one electroconductive type being provided by forming a different material which is sufficiently greater in nucleation density than the material of the insulator substrate and sufficiently fine to the extent that only one single nucleus of the semiconductor material can grow and then permitting the semiconductor material to grow around the single nucleus formed as the center.

公开(公告)号：US08999058B2

公开(公告)日：2015-04-07

申请号：US12774667

申请日：2010-05-05

申请人： George D. Kamian ,  Somnath Nag ,  Subbu Tamilmani ,  Mehrdad M. Moslehi ,  Karl-Josef Kramer ,  Takao Yonehara

发明人： George D. Kamian ,  Somnath Nag ,  Subbu Tamilmani ,  Mehrdad M. Moslehi ,  Karl-Josef Kramer ,  Takao Yonehara

IPC分类号： C30B1/10 ,  C25D11/32 ,  H01L31/18 ,  C25D17/00 ,  C25D17/06 ,  C25D11/00

CPC分类号： C25D11/32 ,  C25D11/005 ,  C25D17/001 ,  C25D17/06 ,  C25F3/12 ,  C25F7/00 ,  H01L31/1892 ,  Y02E10/50

摘要： This disclosure enables high-productivity fabrication of semiconductor-based separation layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers), optical reflectors (made of multi-layer/multi-porosity porous semiconductors such as porous silicon), formation of porous semiconductor (such as porous silicon) for anti-reflection coatings, passivation layers, and multi-junction, multi-band-gap solar cells (for instance, by forming a variable band gap porous silicon emitter on a crystalline silicon thin film or wafer-based solar cell). Other applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further the disclosure is applicable to the general fields of Photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

摘要翻译： 本公开使得能够高生产率地制造基于半导体的分离层（由单层或多层多孔半导体（例如多孔硅，包括单孔隙率或多孔度层构成），光反射器（由多层/多孔多孔半导体 孔隙度多孔半导体如多孔硅），用于防反射涂层的多孔半导体（例如多孔硅）的形成，钝化层和多结的多带隙太阳能电池（例如，通过形成可变带隙 晶体硅薄膜或晶圆太阳能电池上的多孔硅发射器）。 其他应用包括制造用于脱模和MEMS器件制造，膜形成和浅沟槽隔离（STI）多孔硅的MEMS分离和牺牲层（使用具有最佳孔隙率并随后氧化的多孔硅形成）。 此外，本公开可应用于光伏，MEMS（包括传感器和致动器）的独立或集成半导体微电子，半导体微电子芯片和光电子学的一般领域。

公开(公告)号：US08906218B2

公开(公告)日：2014-12-09

申请号：US13288721

申请日：2011-11-03

申请人： Karl-Josef Kramer ,  Mehrdad M. Moslehi ,  Subramanian Tamilmani ,  George Kamian ,  Jay Ashjaee ,  Takao Yonehara

发明人： Karl-Josef Kramer ,  Mehrdad M. Moslehi ,  Subramanian Tamilmani ,  George Kamian ,  Jay Ashjaee ,  Takao Yonehara

IPC分类号： C25D5/18 ,  C25D7/12 ,  C25D11/32 ,  C25F7/00 ,  C25D11/02

CPC分类号： C25D11/005 ,  C25D7/12 ,  C25D11/022 ,  C25D11/024 ,  C25D11/32 ,  C25D17/001 ,  C25D17/008 ,  C25D17/08 ,  C25D21/04 ,  C25F7/00

摘要： This disclosure enables high-productivity controlled fabrication of uniform porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

摘要翻译： 本公开使得能够高生产率控制制造均匀的多孔半导体层（由单层或多层多孔半导体（例如多孔硅，包括单孔隙或多孔层）制成）。 一些应用包括制造用于脱模和MEMS器件制造，膜形成和浅沟槽隔离（STI）多孔硅的MEMS分离和牺牲层（使用具有最佳孔隙率的多孔硅形成及其随后的氧化）。 此外，本公开适用于光伏技术的MEMS领域，包括传感器和执行器，独立的或与集成半导体微电子，半导体微电子芯片和光电子集成。

公开(公告)号：US20130180847A1

公开(公告)日：2013-07-18

申请号：US13244466

申请日：2011-09-24

申请人： Takao Yonehara ,  Subramanian Tamilmani ,  Karl-Josef Kramer ,  Jay Ashjaee ,  Mehrdad M. Moslehi ,  Yasuyoshi Miyaji ,  Noriyuki Hayashi ,  Takamitsu Inahara

发明人： Takao Yonehara ,  Subramanian Tamilmani ,  Karl-Josef Kramer ,  Jay Ashjaee ,  Mehrdad M. Moslehi ,  Yasuyoshi Miyaji ,  Noriyuki Hayashi ,  Takamitsu Inahara

IPC分类号： H01L21/02

CPC分类号： C25D11/005 ,  C25D11/32 ,  C25F3/12 ,  C25F7/02 ,  H01L21/0203 ,  H01L21/67086 ,  H01L21/67781 ,  H01L21/68721 ,  H01L21/68771 ,  H01L21/68785 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

摘要： This disclosure enables high-productivity fabrication of porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

摘要翻译： 本公开使得可以高产率地制造多孔半导体层（由诸如多孔硅的单层或多层多孔半导体制成，包括单孔隙率或多孔隙率层）。 一些应用包括制造用于脱模和MEMS器件制造，膜形成和浅沟槽隔离（STI）多孔硅的MEMS分离和牺牲层（使用具有最佳孔隙率的多孔硅形成及其随后的氧化）。 此外，本公开适用于光伏技术的MEMS领域，包括传感器和执行器，独立的或与集成半导体微电子，半导体微电子芯片和光电子集成。

公开(公告)号：US20120085278A1

公开(公告)日：2012-04-12

申请号：US13157250

申请日：2011-06-09

申请人： Mehrdad M. Moslehi ,  Karl-Josef Kramer ,  Jay Ashjaee ,  George D. Kamian ,  David Mordo ,  Takao Yonehara

发明人： Mehrdad M. Moslehi ,  Karl-Josef Kramer ,  Jay Ashjaee ,  George D. Kamian ,  David Mordo ,  Takao Yonehara

IPC分类号： C30B23/06 ,  H01L21/673 ,  C30B23/02 ,  C23C16/455 ,  C23C16/46

CPC分类号： H01L21/67754 ,  C23C16/45585 ,  C23C16/481 ,  C23C16/54 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/6719 ,  H01L21/67757

摘要： High productivity thin film deposition methods and tools are provided wherein a thin film semiconductor material layer with a thickness in the range of less than 1 micron to 100 microns is deposited on a plurality of wafers in a reactor. The wafers are loaded on a batch susceptor and the batch susceptor is positioned in the reactor such that a tapered gas flow space is created between the susceptor and an interior wall of the reactor. Reactant gas is then directed into the tapered gas space and over each wafer thereby improving deposition uniformity across each wafer and from wafer to wafer.

摘要翻译： 提供了高生产率薄膜沉积方法和工具，其中厚度在小于1微米至100微米范围内的薄膜半导体材料层沉积在反应器中的多个晶片上。 将晶片装载在分批基座上，并且批量基座位于反应器中，使得在基座和反应器的内壁之间形成锥形气体流动空间。 然后将反应性气体引导到锥形气体空间中并遍及每个晶片，从而改善每个晶片和从晶片到晶片的沉积均匀性。