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公开(公告)号:US20180350930A1
公开(公告)日:2018-12-06
申请号:US16057998
申请日:2018-08-08
IPC分类号: H01L29/423 , H01L29/788 , G11C14/00 , H01L29/66 , H01L29/51 , H01L29/49 , H01L27/11524 , H01L27/11521 , H01L21/44 , H01L21/28 , G11C16/04 , G11C16/08 , H01L21/24 , H01L21/265
摘要: Memory devices might include an array of memory cells and a control logic to control access of the array of memory cells, where a memory cell of the array of memory cells might include a first dielectric adjacent a semiconductor, a control gate, a second dielectric between the control gate and the first dielectric, and a charge storage structure between the first dielectric and the second dielectric, wherein the charge storage structure comprises a charge-storage material and a gettering agent.
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公开(公告)号:US10134582B2
公开(公告)日:2018-11-20
申请号:US15298275
申请日:2016-10-20
发明人: Seung-min Ryu , Takanori Koide , Naoki Yamada , Jae-soon Lim , Tsubasa Shiratori , Youn-joung Cho
IPC分类号: H01L21/44 , H01L23/52 , H01L21/02 , C07F9/00 , C23C16/16 , C23C16/34 , C23C16/40 , C23C16/44 , C23C16/455
摘要: A tantalum compound, a method of forming a thin film, and a method of fabricating an integrated circuit device, the tantalum compound being represented by the following General Formula (I):
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公开(公告)号:US10103120B2
公开(公告)日:2018-10-16
申请号:US15813649
申请日:2017-11-15
发明人: Takeshi Yuzawa , Masatoshi Tagaki
IPC分类号: H01L29/40 , H01L21/44 , H01L23/00 , H01L23/498
摘要: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire couple part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.
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公开(公告)号:US10079177B1
公开(公告)日:2018-09-18
申请号:US15694354
申请日:2017-09-01
发明人: Ko-Wei Lin , Ying-Lien Chen , Chun-Ling Lin , Huei-Ru Tsai , Hung-Miao Lin , Sheng-Yi Su , Tzu-Hao Liu
IPC分类号: H01L21/44 , H01L21/768 , H01L21/288
CPC分类号: H01L21/76873 , H01L21/28556 , H01L21/288 , H01L21/76843 , H01L21/76846 , H01L21/76847 , H01L21/76862 , H01L23/53238
摘要: A method is provided for forming copper material over a substrate. The method includes forming a barrier layer over a substrate. Then, a depositing-soaking-treatment (DST) process is performed over the barrier layer. A copper layer is formed on the cobalt layer. The DST process includes depositing a cobalt layer on the barrier layer. Then, the cobalt layer is soaked with H2 gas at a first pressure. The cobalt layer is treated with a H2 plasma at a second pressure. The second pressure is lower than the first pressure.
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公开(公告)号:US10069020B2
公开(公告)日:2018-09-04
申请号:US13800592
申请日:2013-03-13
发明人: Alan Frederick Carroll , Kenneth Warren Hang , Brian J. Laughlin , Kurt Richard Mikeska , Carmine Torardi , Paul Douglas Vernooy
IPC分类号: H01L31/00 , H01L21/44 , H01B1/02 , H01B1/22 , H01L31/0224 , B22F1/00 , B22F7/04 , B22F7/08 , C03C8/10 , C03C8/12 , C04B35/01 , H01B1/16 , H01L31/18 , H01L31/0264
CPC分类号: H01L31/022425 , B22F1/0059 , B22F1/007 , B22F7/04 , B22F7/08 , B22F2007/047 , C03C8/10 , C03C8/12 , C04B35/01 , H01B1/16 , H01B1/22 , H01L31/0264 , H01L31/1884 , H01L2924/0002 , Y02E10/50 , Y02E10/52 , H01L2924/00
摘要: The present invention provides a thick-film paste for printing the front-side of a solar cell device having one or more insulating layers. The thick-film paste comprises an electrically conductive metal, and a lead-tellurium-oxide dispersed in an organic medium.
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公开(公告)号:US10068844B2
公开(公告)日:2018-09-04
申请号:US14871593
申请日:2015-09-30
发明人: Ming-Yen Chiu , Hsien-Wei Chen
IPC分类号: H01L23/48 , H01L23/52 , H01L29/40 , H01L21/44 , H01L23/522 , H01L21/56 , H01L21/768 , H01L23/31 , H01L23/528 , H01L25/065 , H01L23/538 , H01L23/498
摘要: A semiconductor device includes a molding compound and a through via extending through the molding compound. A via connection is disposed over the through via and a cap is disposed over the via connection. A plurality of holes are formed in a section of the cap.
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公开(公告)号:US10068774B2
公开(公告)日:2018-09-04
申请号:US15829563
申请日:2017-12-01
发明人: Yi-Min Huang , Hsiu-Ting Chen , Shih-Chieh Chang
IPC分类号: H01L21/44 , H01L21/48 , H01L21/50 , H01L31/0328 , H01L31/0336 , H01L31/072 , H01L31/109 , H01L21/285 , H01L23/535 , H01L21/768 , H01L29/66 , H01L29/78 , H01L29/06 , H01L29/08 , H01L29/165 , H01L29/161
摘要: A method of manufacturing a source structure for a p-type metal-oxide-semiconductor (PMOS) field effect transistor (FET) is provided. In the method, a first epitaxial layer comprising Si1−xGex is formed on a source region of an FET, a second epitaxial layer comprising Si1−yGey is formed on the first epitaxial layer, a third epitaxial layer comprising Si1−zGez is formed on the second epitaxial layer. Z is smaller than y.
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公开(公告)号:US20180247907A1
公开(公告)日:2018-08-30
申请号:US15966934
申请日:2018-04-30
发明人: Yi-Li Hsiao , Chen-Hua Yu , Shin-Puu Jeng , Chih-Hang Tung , Cheng-Chang Wei
IPC分类号: H01L23/00 , H01L21/768 , H01L23/498 , H01L23/52 , H01L21/44
摘要: A semiconductor device includes a solder bump overlying and electrically connected to a pad region, and a metal cap layer formed on at least a portion of the solder bump. The metal cap layer has a melting temperature greater than the melting temperature of the solder bump.
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公开(公告)号:US10062691B2
公开(公告)日:2018-08-28
申请号:US15460897
申请日:2017-03-16
发明人: Hyerim Moon , Myounghun Choi
IPC分类号: H01L29/40 , H01L21/44 , H01L27/088 , H01L27/092 , H01L21/8234 , H01L27/02 , H01L27/06 , H01L23/528
CPC分类号: H01L27/0886 , H01L21/823431 , H01L21/823475 , H01L23/5283 , H01L27/0207 , H01L27/0629 , H01L27/0924 , H01L29/0649 , H01L29/0657 , H01L29/41791 , H01L29/861
摘要: A semiconductor device includes merged contact plugs. A multi-fin active having N sub-fins is formed in a substrate. A contact plug is formed on the impurity areas. N is an integer between about eight (8) and about one thousand (1000). The N sub-fins include a first sub-fin formed in the outermost portion of the multi-fin active and a second sub-fin formed near the first sub-fin. A straight line perpendicular to a surface of the substrate and passes through a virtual bottom edge of the contact plug is disposed between the first sub-fin and the second sub-fin, or through the second sub-fin. The virtual bottom edge of the contact plug is defined at a cross point of a correlation line extending on a side surface of the contact plug and a horizontal line in contact with a lowermost end of the contact plug and parallel to the surface of the substrate.
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公开(公告)号:US10062560B1
公开(公告)日:2018-08-28
申请号:US15497647
申请日:2017-04-26
申请人: GLOBALFOUNDRIES INC.
IPC分类号: H01L21/44 , H01L21/02 , C25F1/00 , H01L21/768 , H01L21/027
CPC分类号: H01L21/76877 , C25F1/00 , H01L21/02063
摘要: Aspects of the present disclosure provide a method of cleaning a semiconductor device. The method includes providing a semiconductor wafer having an exposed cobalt surface and rinsing the exposed cobalt surface with cathode water having a pH greater than 9 and an oxidation reduction potential of less than 0.0.
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