公开(公告)号：US09733579B2

公开(公告)日：2017-08-15

申请号：US14581632

申请日：2014-12-23

Applicant: Applied Materials, Inc.

Inventor： Sang Ki Nam ,  Peng Xie ,  Qiwei Liang ,  Ludovic Godet

IPC: G03F7/38 ,  G03F7/20 ,  G03F7/40

CPC classification number: G03F7/70733 ,  G03F7/38 ,  G03F7/40 ,  G03F7/70325

Abstract: A method of processing a substrate is disclosed herein. The method includes applying a photoresist layer comprising a photoacid generator to a substrate, wherein a first portion of the photoresist layer has been exposed unprotected by a photomask to a radiation light in a lithographic exposure process. The method also includes applying an electric field to alter movement of photoacid generated from the photoacid generator substantially in a vertical direction, wherein the electric field is applied by a first alternating pair of a positive voltage electrode and a negative voltage electrode and a second alternating pair of a positive voltage electrode and a negative voltage electrode.

公开(公告)号：US09716005B1

公开(公告)日：2017-07-25

申请号：US15075046

申请日：2016-03-18

Applicant: APPLIED MATERIALS, INC.

Inventor： Ludovic Godet ,  Srinivas D. Nemani ,  Tobin Kaufman-Osborn

IPC: H01L21/02 ,  H01L21/027 ,  H01L21/285 ,  H01L21/263

CPC classification number: H01L21/263 ,  H01L21/0228 ,  H01L21/02315 ,  H01L21/0243 ,  H01L21/02639 ,  H01L21/0274 ,  H01L21/28556 ,  H01L21/3105 ,  H01L21/321

Abstract: Atomic layer deposition in selected zones of a workpiece surface is accomplished by transforming the surfaces outside the selected zones to a hydrophobic state while the materials in the selected zones remain hydrophilic.

公开(公告)号：US20170154797A1

公开(公告)日：2017-06-01

申请号：US14989488

申请日：2016-01-06

Applicant: Applied Materials, Inc.

Inventor： Viachslav Babayan ,  Douglas A. Buchberger, JR. ,  Qiwei Liang ,  Ludovic Godet ,  Srinivas D. Nemani ,  Daniel J. Woodruff ,  Randy Harris ,  Robert B. Moore

IPC: H01L21/67 ,  G03F7/20

CPC classification number: G03F7/2035 ,  G03F7/168 ,  G03F7/26 ,  G03F7/38 ,  H01L21/68764

Abstract: Embodiments described herein relate to methods and apparatus for performing immersion field guided post exposure bake processes. Embodiments of apparatus described herein include a chamber body defining a processing volume. A pedestal may be disposed within the processing volume and a first electrode may be coupled to the pedestal. A moveable stem may extend through the chamber body opposite the pedestal and a second electrode may be coupled to the moveable stem. In certain embodiments, a fluid containment ring may be coupled to the pedestal and a dielectric containment ring may be coupled to the second electrode.

公开(公告)号：US09480140B2

公开(公告)日：2016-10-25

申请号：US14549829

申请日：2014-11-21

Applicant: APPLIED MATERIALS, INC.

Inventor： Sang Ki Nam ,  Ludovic Godet

IPC: H05H3/02 ,  H05H3/06 ,  H01J37/32

CPC classification number: H05H3/06 ,  H01J37/32357 ,  H01J37/32366 ,  H01J37/32422 ,  H01J2237/0041 ,  H05H3/02

Abstract: A neutral beam is scanned across a workpiece surface and the beam angle is controlled in a manner that avoids variation in the beam source-to-workpiece distance during scanning.

Abstract translation: 在工件表面上扫描中性光束，并且以避免扫描期间光束源到工件距离变化的方式控制光束角度。

公开(公告)号：US09379021B2

公开(公告)日：2016-06-28

申请号：US14505167

申请日：2014-10-02

Applicant: Applied Materials, Inc.

Inventor： Ellie Y. Yieh ,  Ludovic Godet ,  Srinivas D. Nemani

IPC: B44C1/22 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00 ,  H01L21/302 ,  H01L21/461 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/28 ,  H01L21/04 ,  H01L21/225 ,  H01L21/3115 ,  H01L21/223

CPC classification number: H01L21/823462 ,  H01L21/0415 ,  H01L21/046 ,  H01L21/2236 ,  H01L21/2253 ,  H01L21/28185 ,  H01L21/31155 ,  H01L21/823431 ,  H01L29/66545 ,  H01L29/66803 ,  H01L29/6681 ,  H01L29/785

Abstract: Embodiments described herein generally relate to methods for forming gate structures. Various processes may be performed on a gate dielectric material to reduce the K value of the dielectric material. The gate dielectric having a reduced K value may provide for reduced parasitic capacitance and an overall reduced capacitance. The gate dielectric may be modified without thermodynamic constraint.

Abstract translation: 本文描述的实施例通常涉及用于形成栅极结构的方法。 可以在栅极电介质材料上进行各种工艺以降低电介质材料的K值。 具有减小的K值的栅极电介质可以提供减小的寄生电容和整体减小的电容。 可以在没有热力学约束的情况下修改栅极电介质。

公开(公告)号：US09253868B1

公开(公告)日：2016-02-02

申请号：US14549854

申请日：2014-11-21

Applicant: APPLIED MATERIALS, INC.

Inventor： Sang Ki Nam ,  Ludovic Godet

IPC: H05H3/02

CPC classification number: H05H3/02

Abstract: A neutral beam source has a plasma sheath-shaping neutralization grid that shapes a plasma sheath near a beam-forming slit of the neutralization grid in accordance with a desired entry angle of incoming ions in the slit.

Abstract translation: 中性束源具有等离子体鞘整形中和栅格，其根据所述狭缝中入射离子的期望入射角度，在中和栅格的波束形成狭缝附近形成等离子体鞘。

公开(公告)号：US12229940B2

公开(公告)日：2025-02-18

申请号：US17492958

申请日：2021-10-04

Applicant: Applied Materials, Inc.

Inventor： Yangyang Sun ,  Jinxin Fu ,  Kazuya Daito ,  Ludovic Godet

IPC: G06T7/00 ,  G01J1/42 ,  G01J1/44 ,  G01N21/958 ,  G02B27/01 ,  G06T7/80 ,  G06T7/90 ,  H04N23/56 ,  H04N23/74 ,  H04N23/90

Abstract: Embodiments of the present disclosure relate to optical devices for augmented, virtual, and/or mixed reality applications. In one or more embodiments, an optical device metrology system is configured to measure a plurality of first metrics and one or more second metrics for optical devices, the one or more second metrics including a display leakage metric.

公开(公告)号：US12216243B2

公开(公告)日：2025-02-04

申请号：US16905703

申请日：2020-06-18

Applicant: Applied Materials, Inc.

Inventor： Ludovic Godet ,  Tapashree Roy ,  Prerna Sonthalia Goradia ,  Srobona Sen ,  Robert Jan Visser ,  Nitin Deepak ,  Tapash Chakraborty

IPC: G02F1/1339 ,  B32B3/20 ,  G02B1/06

Abstract: Embodiments described herein relate to flat optical devices and methods of forming flat optical devices. One embodiment includes a substrate having a first arrangement of a first plurality of pillars formed thereon. The first arrangement of the first plurality of pillars includes pillars having a height h and a lateral distance d, and a gap g corresponding to a distance between adjacent pillars of the first plurality of pillars. An aspect ratio of the gap g to the height h is between about 1:1 and about 1:20. A first encapsulation layer is disposed over the first arrangement of the first plurality of pillars. The first encapsulation layer has a refractive index of about 1.0 to about 1.5. The first encapsulation layer, the substrate, and each of the pillars of the first arrangement define a first space therebetween. The first space has a refractive index of about 1.0 to about 1.5.

公开(公告)号：US12203747B2

公开(公告)日：2025-01-21

申请号：US18408193

申请日：2024-01-09

Applicant: Applied Materials, Inc.

Inventor： Yangyang Sun ,  Jinxin Fu ,  Ludovic Godet

IPC: G01B11/26

Abstract: Embodiments described herein provide for devices and methods of measuring a pitch P of optical device structures and an orientation angle ϕ of the optical device structures. One embodiment of the system includes an optical arm coupled to an arm actuator. The optical arm includes a light source. The light source emits a light path operable to be diffracted to the stage. The optical arm further includes a first beam splitter and a second beam splitter positioned in the light path. The first beam splitter directs the light path through a first lens and the second beam splitter directs the light path through a first dove prism and a second lens. The optical arm further includes a first detector operable to detect the light path from the first lens and second detector operable to detect the light path from the second lens.

公开(公告)号：US12153344B2

公开(公告)日：2024-11-26

申请号：US18241705

申请日：2023-09-01

Applicant: Applied Materials, Inc.

Inventor： Yongan Xu ,  Jinxin Fu ,  Jhenghan Yang ,  Ludovic Godet

IPC: G03F7/00 ,  G02B6/122 ,  G02B6/136 ,  H01L21/3065

Abstract: The present disclosure generally relates to methods of forming optical devices comprising nanostructures disposed on transparent substrates. A first process of forming the nanostructures comprises depositing a first layer of a first material on a glass substrate, forming one or more trenches in the first layer, and depositing a second layer of a second material in the one or more holes to trenches a first alternating layer of alternating first portions of the first material and second portions of the second material. The first process is repeated one or more times to form additional alternating layers over the first alternating layer. Each first portion of each alternating layer is disposed in contact with and offset a distance from an adjacent first portion in adjacent alternating layers. A second process comprises removing either the first or the second portions from each alternating layer to form the plurality of nanostructures.