公开(公告)号：US06441420B1

公开(公告)日：2002-08-27

申请号：US09576971

申请日：2000-05-24

申请人： Yoshihisa Nagano ,  Yasuhiro Uemoto

发明人： Yoshihisa Nagano ,  Yasuhiro Uemoto

IPC分类号： H01L2994

CPC分类号： H01L27/10894 ,  H01L27/10852 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55

摘要： A protective insulating film is deposited over first and second field-effect transistors formed on a semiconductor substrate. A capacitor composed of a capacitor lower electrode, a capacitor insulating film composed of an insulating metal oxide film, and a capacitor upper electrode is formed on the protective insulating film. A first contact plug formed in the protective insulating film provides a direct connection between the capacitor lower electrode and an impurity diffusion layer of the first field-effect transistor. A second contact plug formed in the protective insulating film provides a direct connection between the capacitor upper electrode and an impurity diffusion layer of the second field-effect transistor.

公开(公告)号：US06169304A

公开(公告)日：2001-01-02

申请号：US09071534

申请日：1998-05-04

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L2976

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 1021 atoms/cm3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US5780351A

公开(公告)日：1998-07-14

申请号：US844108

申请日：1997-04-28

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115 ,  H01L21/20 ,  H01L21/00

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semi conductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种半导体器件，其在形成集成电路的半导体衬底上通过层间绝缘层形成电容器。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US5661319A

公开(公告)日：1997-08-26

申请号：US681093

申请日：1996-07-22

申请人： Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Tooru Nasu ,  Akihiro Matsuda ,  Tatsuo Ootsuki

发明人： Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Tooru Nasu ,  Akihiro Matsuda ,  Tatsuo Ootsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L27/108 ,  H01L27/12 ,  H01L29/786 ,  H01L29/92 ,  H01L29/94 ,  H01G7/06

CPC分类号： H01L29/94 ,  H01L27/10808 ,  H01L27/10852 ,  H01L27/1203 ,  H01L28/55 ,  H01L29/78654 ,  H01L28/75

摘要： This is a semiconductor device having an integrated circuit and a capacitor formed on a semiconductor substrate. The capacitor comprises a bottom electrode serving also as a part of a diffusion layer of the integrated circuit, a dielectric film being formed on the bottom electrode, and a top electrode of a conductive film being formed on the dielectric film. In particular, it is preferred to form the dielectric film in two layers of dielectric film, and compose the dielectric film contacting with the bottom electrode of a dielectric material in a composition possessing an excess of a metal element than the stoichiometric composition.

摘要翻译： 这是具有形成在半导体衬底上的集成电路和电容器的半导体器件。 电容器包括还用作集成电路的扩散层的一部分的底部电极，形成在底部电极上的电介质膜和形成在电介质膜上的导电膜的顶部电极。 特别地，优选将电介质膜形成为两层电介质膜，并且构成与具有比化学计量组成更多的金属元素的组成的与电介质材料的底电极接触的电介质膜。

公开(公告)号：US08593068B2

公开(公告)日：2013-11-26

申请号：US13032297

申请日：2011-02-22

申请人： Shingo Hashizume ,  Ayanori Ikoshi ,  Hiroto Yamagiwa ,  Yasuhiro Uemoto ,  Manabu Yanagihara

发明人： Shingo Hashizume ,  Ayanori Ikoshi ,  Hiroto Yamagiwa ,  Yasuhiro Uemoto ,  Manabu Yanagihara

IPC分类号： H05B39/02

CPC分类号： H01L29/808 ,  H01L29/2003 ,  H01L29/42316 ,  H03K17/12 ,  H03K2217/0009

摘要： A two-wire AC switch suppressing heat from a bidirectional switch element inside the switch is provided. The two-wire AC switch 100a connected between an AC power supply 101 and a load 102 includes: a bidirectional switch element 103 which flows passing current bi-directionally, selects whether to flow or block the current, is connected in series with the AC power supply 101 and the load 102 to form a closed-loop circuit, and is made of a group-III nitride semiconductor; a full-wave rectifier 104 performing full-wave rectification on power supplied from the AC power supply 101; a power supply circuit 105 smoothing a voltage after the full-wave rectification to generate DC power; a first gate drive circuit 107 and a second gate drive circuit 108 each outputting a control signal to the bidirectional switch element 103; and a control circuit 106 controlling the first and second gate drive circuits 107 and 108.

摘要翻译： 提供一种抑制来自开关内的双向开关元件的热量的二线交流开关。 连接在交流电源101和负载102之间的二线交流开关100a包括：双向开关元件103，其双向开关元件103，其双向开关元件103，其双向开关元件103，其双向开关元件103，其双向开关元件103，其双向开关元件103， 电源101和负载102以形成闭环电路，并且由III族氮化物半导体制成; 全波整流器104对从AC电源101提供的电力进行全波整流; 电源电路105，对全波整流后的电压进行平滑化，生成直流电力; 每个向双向开关元件103输出控制信号的第一栅极驱动电路107和第二栅极驱动电路108; 以及控制电路106，其控制第一和第二栅极驱动电路107和108。

公开(公告)号：US08497581B2

公开(公告)日：2013-07-30

申请号：US13220054

申请日：2011-08-29

申请人： Ayanori Ikoshi ,  Yasuhiro Uemoto ,  Manabu Yanagihara ,  Tatsuo Morita

发明人： Ayanori Ikoshi ,  Yasuhiro Uemoto ,  Manabu Yanagihara ,  Tatsuo Morita

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/495 ,  H01L23/34

CPC分类号： H01L24/11 ,  H01L23/295 ,  H01L23/3192 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/4824 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1146 ,  H01L2224/1191 ,  H01L2224/13021 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29076 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor device includes: a semiconductor chip; a protective film and an insulating film sequentially stacked over the semiconductor chip, and each having openings that expose source, drain, and gate pads; a heat dissipation terminal made of a material having a higher thermal conductivity than the insulating film; connection terminals formed on the source, drain, and gate pads and surrounded by the insulating film; and a mount substrate having connection pads. The semiconductor chip has a source electrode having a plurality of source fingers, a drain electrode having a plurality of drain fingers, and a gate electrode having a plurality of gate fingers. The source, drain, and gate pads are connected to the source electrode, the drain electrode, and the gate electrode, respectively. The connection terminals are respectively connected to the connection pads. The heat dissipation terminal is in close contact with the mount substrate.

摘要翻译： 半导体器件包括：半导体芯片; 依次堆叠在半导体芯片上的保护膜和绝缘膜，并且每个具有暴露源极，漏极和栅极焊盘的开口; 由具有比绝缘膜高的导热性的材料制成的散热端子; 形成在源极，漏极和栅极焊盘上并被绝缘膜包围的连接端子; 以及具有连接焊盘的安装基板。 半导体芯片具有具有多个源极指的源极，具有多个漏极指的漏电极和具有多个栅极指的栅电极。 源极，漏极和栅极焊盘分别连接到源电极，漏极电极和栅电极。 连接端子分别连接到连接焊盘。 散热端与安装基板紧密接触。

公开(公告)号：US20120001200A1

公开(公告)日：2012-01-05

申请号：US13220054

申请日：2011-08-29

申请人： Ayanori Ikoshi ,  Yasuhiro Uemoto ,  Manabu Yanagihara ,  Tatsuo Morita

发明人： Ayanori Ikoshi ,  Yasuhiro Uemoto ,  Manabu Yanagihara ,  Tatsuo Morita

IPC分类号： H01L29/161 ,  H01L23/48

CPC分类号： H01L24/11 ,  H01L23/295 ,  H01L23/3192 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/4824 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1146 ,  H01L2224/1191 ,  H01L2224/13021 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29076 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor device includes: a semiconductor chip; a protective film and an insulating film sequentially stacked over the semiconductor chip, and each having openings that expose source, drain, and gate pads; a heat dissipation terminal made of a material having a higher thermal conductivity than the insulating film; connection terminals formed on the source, drain, and gate pads and surrounded by the insulating film; and a mount substrate having connection pads. The semiconductor chip has a source electrode having a plurality of source fingers, a drain electrode having a plurality of drain fingers, and a gate electrode having a plurality of gate fingers. The source, drain, and gate pads are connected to the source electrode, the drain electrode, and the gate electrode, respectively. The connection terminals are respectively connected to the connection pads. The heat dissipation terminal is in close contact with the mount substrate.

摘要翻译： 半导体器件包括：半导体芯片; 依次堆叠在半导体芯片上的保护膜和绝缘膜，并且每个具有暴露源极，漏极和栅极焊盘的开口; 由具有比绝缘膜高的导热性的材料制成的散热端子; 形成在源极，漏极和栅极焊盘上并被绝缘膜包围的连接端子; 以及具有连接焊盘的安装基板。 半导体芯片具有具有多个源极指的源极，具有多个漏极指的漏电极和具有多个栅极指的栅电极。 源极，漏极和栅极焊盘分别连接到源电极，漏极电极和栅电极。 连接端子分别连接到连接焊盘。 散热端与安装基板紧密接触。

公开(公告)号：US20100321363A1

公开(公告)日：2010-12-23

申请号：US12518005

申请日：2008-06-19

申请人： Tatsuo Morita ,  Manabu Yanagihara ,  Hidetoshi Ishida ,  Yasuhiro Uemoto ,  Manabu Inoue

发明人： Tatsuo Morita ,  Manabu Yanagihara ,  Hidetoshi Ishida ,  Yasuhiro Uemoto ,  Manabu Inoue

IPC分类号： G09G3/28

CPC分类号： G09G3/294 ,  G09G3/2965

摘要： A plasma display panel driving device includes an electrode driving unit for generating a drive pulse to be applied to an electrode of a plasma display panel. The electrode driving unit has a plurality of switches. At least one of the plurality of switches is a switch device including a dual-gate semiconductor device. The dual-gate semiconductor device 10 has a semiconductor multilayer 13 formed on a substrate 11 and made of a nitride semiconductor or a silicon carbide semiconductor, a source electrode 16 and a drain electrode 17 formed and spaced apart from each other on the semiconductor multilayer 13, and a first gate electrode 18A and a second gate electrode 18B formed between the source electrode 16 and the drain electrode 17, successively from the source electrode 16 side.

摘要翻译： 等离子体显示面板驱动装置包括用于产生施加到等离子体显示面板的电极的驱动脉冲的电极驱动单元。 电极驱动单元具有多个开关。 多个开关中的至少一个是包括双栅极半导体器件的开关器件。 双栅极半导体器件10具有形成在基板11上并由氮化物半导体或碳化硅半导体形成的半导体层叠体13，在半导体层叠体13上形成并隔开的源电极16和漏电极17 以及从源极电极16侧依次形成在源极电极16和漏极电极17之间的第一栅极电极18A和第二栅极电极18B。

公开(公告)号：USRE41368E1

公开(公告)日：2010-06-08

申请号：US11076585

申请日：2005-03-09

申请人： Yasuhiro Uemoto ,  Katsushige Yamashita ,  Takashi Miura

发明人： Yasuhiro Uemoto ,  Katsushige Yamashita ,  Takashi Miura

IPC分类号： H01L31/0392

CPC分类号： H01L29/7812 ,  H01L21/76286 ,  H01L29/0615 ,  H01L29/063 ,  H01L29/7394 ,  H01L29/7436 ,  H01L29/78 ,  H01L29/7824 ,  H01L29/7835 ,  H01L29/78606 ,  H01L29/78624 ,  H01L29/78654 ,  H01L29/8611

摘要： In an SOI (Silicon On Insulator) semiconductor device, a first semiconductor layer overlies a semiconductor substrate so as to sandwich an insulating layer, and second and third semiconductor layers with a different conductivity type from the second semiconductor layer are formed on the surface of the first semiconductor layer. At the interface between the first semiconductor layer and the insulating layer, a fourth semiconductor layer with a different conductivity type from the first semiconductor layer is formed. The fourth semiconductor layer includes an impurity of larger than 3×1012/cm2 so as not to be completely depleted even though a reverse bias voltage is applied between the second and third semiconductor layers.

摘要翻译： 在SOI（绝缘体上硅）半导体器件中，第一半导体层覆盖在半导体衬底上以夹住绝缘层，并且在第二半导体层的表面上形成具有与第二半导体层不同的导电类型的第二和第三半导体层 第一半导体层。 在第一半导体层和绝缘层之间的界面处，形成具有与第一半导体层不同的导电类型的第四半导体层。 第四半导体层包括大于3×10 12 / cm 2的杂质，即使在第二和第三半导体层之间施加反向偏置电压也不会完全耗尽。

公开(公告)号：US07595680B2

公开(公告)日：2009-09-29

申请号：US12020163

申请日：2008-01-25

申请人： Tatsuo Morita ,  Manabu Yanagihara ,  Hidetoshi Ishida ,  Yasuhiro Uemoto ,  Manabu Inoue

发明人： Tatsuo Morita ,  Manabu Yanagihara ,  Hidetoshi Ishida ,  Yasuhiro Uemoto ,  Manabu Inoue

IPC分类号： H03K17/687

CPC分类号： H03K17/687 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/7787 ,  H03K17/302 ,  H03K17/567 ,  H03K17/6877 ,  H03K17/74 ,  H03K17/78 ,  H03K17/795 ,  H03K2217/0036

摘要： A bidirectional switch includes a field-effect transistor having a first ohmic electrode, a second ohmic electrode and a gate electrode, and a control circuit for controlling between a conduction state and a cut-off state by applying a bias voltage to the gate electrode. The control circuit applies the bias voltage from the first ohmic electrode as a reference when a potential of the second ohmic electrode is higher than the potential of the first ohmic electrode, and applies the bias voltage from the second ohmic electrode as a reference when the potential of the second electrode is lower than the potential of the first ohmic electrode.

摘要翻译： 双向开关包括具有第一欧姆电极，第二欧姆电极和栅电极的场效应晶体管，以及通过向栅电极施加偏压来控制导通状态和截止状态的控制电路。 当第二欧姆电极的电位高于第一欧姆电极的电位时，控制电路施加来自第一欧姆电极的偏置电压作为参考，并且当第二欧姆电极的电位为电位时施加来自第二欧姆电极的偏置电压作为参考 的第二电极的电位低于第一欧姆电极的电位。